diff options
Diffstat (limited to 'debian/patches/branch-updates.diff')
| -rw-r--r-- | debian/patches/branch-updates.diff | 8159 |
1 files changed, 2028 insertions, 6131 deletions
diff --git a/debian/patches/branch-updates.diff b/debian/patches/branch-updates.diff index e18c611..a83015f 100644 --- a/debian/patches/branch-updates.diff +++ b/debian/patches/branch-updates.diff @@ -1,6320 +1,2217 @@ -# DP: updates from the binutils-2.26 branch +# DP: updates from the binutils-2.28 branch -# git diff 2c49145108878e9914173cd9c3aa36ab0cede6b3 0a2ba2faf315f945afde25416a2351275d12506d +# git diff d1b878ec9a4e6a92e2863a8929e9794dd12b13b9 de33d5aed37edb1f2467adab7c2402aef36045b4 diff --git a/bfd/ChangeLog b/bfd/ChangeLog -index e860c3e..4741b19 100644 +index 9809bcf..a51642b 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog -@@ -1,3 +1,156 @@ -+2016-03-17 H.J. Lu <hongjiu.lu@intel.com> +@@ -1,3 +1,83 @@ ++2017-05-01 Palmer Dabbelt <palmer@dabbelt.com> + -+ Backport from master -+ 2016-03-15 H.J. Lu <hongjiu.lu@intel.com> ++ * config.bfd (riscv32-*): Enable rv64. + -+ PR ld/19827 -+ * elf32-i386.c (elf_i386_check_relocs): Bind defined symbol -+ locally in PIE. -+ (elf_i386_relocate_section): Likewise. -+ * elf64-x86-64.c (elf_x86_64_check_relocs): Likewise. -+ (elf_x86_64_relocate_section): Likewise. ++2017-04-03 Palmer Dabbelt <palmer@dabbelt.com> + -+2016-03-15 H.J. Lu <hongjiu.lu@intel.com> ++ * elfnn-riscv.c (GP_NAME): Delete. ++ (riscv_global_pointer_value): Change GP_NAME to RISCV_GP_SYMBOL. ++ (_bfd_riscv_relax_lui): Likewise. + -+ Backport from master -+ 2016-01-30 H.J. Lu <hongjiu.lu@intel.com> ++2017-01-17 Kuan-Lin Chen <kuanlinchentw@gmail.com> + -+ PR ld/19539 -+ * elf32-i386.c (elf_i386_reloc_type_class): Check relocation -+ against STT_GNU_IFUNC symbol only with dynamic symbols. -+ * elf64-x86-64.c (elf_x86_64_reloc_type_class): Likewise. ++ * elfnn-riscv.c (riscv_elf_object_p): New function. + -+2016-03-15 Nick Clifton <nickc@redhat.com> ++2017-04-26 Maciej W. Rozycki <macro@imgtec.com> + -+ Backport from master: -+ 2016-03-09 Leon Winter <winter-gcc@bfw-online.de> ++ PR ld/21334 ++ * elf-bfd.h (elf_backend_data): Add `always_renumber_dynsyms' ++ member. ++ * elfxx-target.h [!elf_backend_always_renumber_dynsyms] ++ (elf_backend_always_renumber_dynsyms): Define. ++ (elfNN_bed): Initialize `always_renumber_dynsyms' member. ++ * elfxx-mips.h (elf_backend_always_renumber_dynsyms): Define. ++ * elflink.c (bfd_elf_size_dynsym_hash_dynstr): Also call ++ `_bfd_elf_link_renumber_dynsyms' if the backend has requested ++ it. ++ (elf_gc_sweep): Likewise. + -+ PR ld/19623 -+ * cofflink.c (_bfd_coff_generic_relocate_section): Do not apply -+ relocations against absolute symbols. ++2017-04-26 Maciej W. Rozycki <macro@imgtec.com> + -+2016-03-14 H.J. Lu <hongjiu.lu@intel.com> ++ * elflink.c (elf_gc_sweep): Only call ++ `_bfd_elf_link_renumber_dynsyms' if dynamic sections have been ++ created. + -+ Backport from master -+ 2016-01-28 H.J. Lu <hongjiu.lu@intel.com> ++2017-04-24 H.J. Lu <hongjiu.lu@intel.com> + -+ PR binutils/19523 -+ * dwarf2.c (_bfd_dwarf2_slurp_debug_info): Set BFD_DECOMPRESS to -+ decompress debug sections. ++ PR ld/21425 ++ * elf32-i386.c (ELF_MAXPAGESIZE): Set to 0x1000 for VxWorks. + -+2016-03-09 H.J. Lu <hongjiu.lu@intel.com> ++2017-03-28 Hans-Peter Nilsson <hp@axis.com> + -+ PR ld/19579 -+ Backport from master -+ 2016-03-08 H.J. Lu <hongjiu.lu@intel.com> -+ -+ * elflink.c (_bfd_elf_merge_symbol): Group common symbol checking -+ together. -+ -+ 2016-03-04 H.J. Lu <hongjiu.lu@intel.com> -+ -+ * elflink.c (_bfd_elf_merge_symbol): Treat common symbol in -+ executable as definition if the new definition comes from a -+ shared library. -+ -+2016-03-09 Nick Clifton <nickc@redhat.com> -+ Alan Modra <amodra@gmail.com> -+ -+ PR binutils/19775 -+ * archive.c (bfd_generic_openr_next_archived_file): Allow zero -+ length elements in the archive. -+ * coff-alpha.c (alpha_ecoff_openr_next_archived_file): Likewise. -+ -+2016-03-01 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR ld/19752 -+ Backport from master -+ 2015-12-18 H.J. Lu <hongjiu.lu@intel.com> -+ -+ * coff-x86_64.c (coff_amd64_reloc): Fix formatting. -+ -+ 2015-12-18 Nick Clifton <nickc@redhat.com> -+ -+ * coff-i386.c (coff_i386_reloc): Fix formatting. -+ -+2016-02-26 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-02-24 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR ld/19698 -+ * elflink.c (bfd_elf_record_link_assignment): Set versioned if -+ symbol version is unknown. -+ -+2016-02-26 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-02-01 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR ld/19553 -+ * elflink.c (elf_link_add_object_symbols): Don't add DT_NEEDED -+ if a symbol from a library loaded via DT_NEEDED doesn't match -+ the symbol referenced by regular object. -+ -+2016-02-26 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-02-24 H.J. Lu <hongjiu.lu@intel.com> -+ -+ * elf32-i386.c (elf_i386_allocate_dynrelocs): Set plt_got.offset -+ to (bfd_vma) -1 when setting needs_plt to 0. -+ * elf64-x86-64.c (elf_x86_64_allocate_dynrelocs): Likewise. -+ -+2016-02-26 Alan Modra <amodra@gmail.com> -+ -+ * elf64-ppc.c (create_linkage_sections): Create sfpr when -+ save_restore_funcs, rest of sections when not relocatable. -+ (ppc64_elf_init_stub_bfd): Always call create_linkage_sections. -+ (sfpr_define): Define all symbols on emitted code. -+ (ppc64_elf_func_desc_adjust): Adjust for sfpr now being created -+ when relocatable. Move sfpr_define loop earlier. -+ -+2016-02-25 Jiong Wang <jiong.wang@arm.com> -+ -+ Backport from master -+ 2016-01-21 Jiong Wang <jiong.wang@arm.com> -+ -+ * elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch -+ veneer for sym_sec != input_sec. -+ (elfNN_aarch64_size_stub): Support STT_SECTION symbol. -+ (elfNN_aarch64_final_link_relocate): Take rela addend into account when -+ calculation destination. -+ -+2016-02-10 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-02-10 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR ld/19601 -+ * elf32-i386.c (elf_i386_relocate_section): Mask off the least -+ significant bit in GOT offset for R_386_GOT32X. -+ -+2016-02-02 H.J. Lu <hongjiu.lu@intel.com> ++ PR ld/16044 ++ * elf32-cris.c (elf_cris_adjust_gotplt_to_got): Adjust BFD_ASSERT ++ to handle a local symbol with a hash-symbol-entry; without PLT. ++ Add BFD_ASSERT for an incidental case with GOT entry present. ++ (cris_elf_check_relocs): Increment PLT refcount only if the symbol ++ isn't forced-or-set local. + -+ Backport from master -+ 2016-02-02 H.J. Lu <hongjiu.lu@intel.com> ++2017-04-13 Alan Modra <amodra@gmail.com> + -+ PR ld/19542 -+ * elf64-x86-64.c (elf_x86_64_convert_load): Store the estimated -+ distances in the compressed_size field of the output section. ++ * elf32-arm.c (arm_type_of_stub): Supply missing args to "long ++ branch veneers" error. Fix double space and format message. ++ * elf32-avr.c (avr_add_stub): Do not pass NULL as %B arg. ++ * elf64-ppc.c (tocsave_find): Supply missing %B arg. + -+2016-02-01 John David Anglin <danglin@gcc.gnu.org> ++2017-04-10 H.J. Lu <hongjiu.lu@intel.com> + -+ PR ld/19526 -+ * elf32-hppa.c (elf32_hppa_final_link): Don't sort non-regular output -+ files. -+ * elf64-hppa.c (elf32_hppa_final_link): Likewise. Remove retval. -+ -+2016-01-25 Tristan Gingold <gingold@adacore.com> -+ -+ * version.m4: Bump version to 2.26.0 -+ * configure: Regenerate. -+ - 2016-01-25 Tristan Gingold <gingold@adacore.com> - - * version.m4: Bump version to 2.26 -@@ -119,7 +272,7 @@ - * configure: Regenerate. - - 2015-11-11 Alan Modra <amodra@gmail.com> -- Peter Bergner <bergner@vnet.ibm.com> -+ Peter Bergner <bergner@vnet.ibm.com> - - * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA. - (ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA. -@@ -179,8 +332,8 @@ - - 2015-10-29 Catherine Moore <clm@codesourcery.com> - -- * elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output -- section to bfd_abs_section_ptr if the stub is discarded. -+ * elfxx-mips.c (mips_elf_check_mips16_stubs): Set a stub's output -+ section to bfd_abs_section_ptr if the stub is discarded. - - 2015-10-29 Ed Schouten <ed@nuxi.nl> - -@@ -232,7 +385,7 @@ - * bfd-in2.h: Regenerate. - - 2015-10-27 Laurent Alfonsi <laurent.alfonsi@st.com> -- Christophe Monat <christophe.monat@st.com> -+ Christophe Monat <christophe.monat@st.com> - - * bfd-in2.h: Regenerate. - * bfd-in.h (bfd_arm_stm32l4xx_fix): New enum. Specify how -@@ -1225,115 +1378,115 @@ - - 2015-08-18 H.J. Lu <hongjiu.lu@intel.com> - -- * bfd/aoutx.h: Replace shared, executable, relocatable and pie -+ * aoutx.h: Replace shared, executable, relocatable and pie - fields with bfd_link_executable, bfd_link_dll, - bfd_link_relocatable, bfd_link_pic and bfd_link_pie. -- * bfd/bout.c: Likewise. -- * bfd/coff-alpha.c: Likewise. -- * bfd/coff-arm.c: Likewise. -- * bfd/coff-i386.c: Likewise. -- * bfd/coff-i960.c: Likewise. -- * bfd/coff-m68k.c: Likewise. -- * bfd/coff-mcore.c: Likewise. -- * bfd/coff-mips.c: Likewise. -- * bfd/coff-ppc.c: Likewise. -- * bfd/coff-rs6000.c: Likewise. -- * bfd/coff-sh.c: Likewise. -- * bfd/coff-tic80.c: Likewise. -- * bfd/coff-x86_64.c: Likewise. -- * bfd/coff64-rs6000.c: Likewise. -- * bfd/coffgen.c: Likewise. -- * bfd/cofflink.c: Likewise. -- * bfd/ecoff.c: Likewise. -- * bfd/ecofflink.c: Likewise. -- * bfd/elf-bfd.h: Likewise. -- * bfd/elf-eh-frame.c: Likewise. -- * bfd/elf-ifunc.c: Likewise. -- * bfd/elf-m10200.c: Likewise. -- * bfd/elf-m10300.c: Likewise. -- * bfd/elf-s390-common.c: Likewise. -- * bfd/elf-vxworks.c: Likewise. -- * bfd/elf.c: Likewise. -- * bfd/elf32-arm.c: Likewise. -- * bfd/elf32-avr.c: Likewise. -- * bfd/elf32-bfin.c: Likewise. -- * bfd/elf32-cr16.c: Likewise. -- * bfd/elf32-cr16c.c: Likewise. -- * bfd/elf32-cris.c: Likewise. -- * bfd/elf32-crx.c: Likewise. -- * bfd/elf32-d10v.c: Likewise. -- * bfd/elf32-dlx.c: Likewise. -- * bfd/elf32-epiphany.c: Likewise. -- * bfd/elf32-fr30.c: Likewise. -- * bfd/elf32-frv.c: Likewise. -- * bfd/elf32-ft32.c: Likewise. -- * bfd/elf32-h8300.c: Likewise. -- * bfd/elf32-hppa.c: Likewise. -- * bfd/elf32-i370.c: Likewise. -- * bfd/elf32-i386.c: Likewise. -- * bfd/elf32-i860.c: Likewise. -- * bfd/elf32-ip2k.c: Likewise. -- * bfd/elf32-iq2000.c: Likewise. -- * bfd/elf32-lm32.c: Likewise. -- * bfd/elf32-m32c.c: Likewise. -- * bfd/elf32-m32r.c: Likewise. -- * bfd/elf32-m68hc11.c: Likewise. -- * bfd/elf32-m68hc1x.c: Likewise. -- * bfd/elf32-m68k.c: Likewise. -- * bfd/elf32-mcore.c: Likewise. -- * bfd/elf32-mep.c: Likewise. -- * bfd/elf32-metag.c: Likewise. -- * bfd/elf32-microblaze.c: Likewise. -- * bfd/elf32-moxie.c: Likewise. -- * bfd/elf32-msp430.c: Likewise. -- * bfd/elf32-mt.c: Likewise. -- * bfd/elf32-nds32.c: Likewise. -- * bfd/elf32-nios2.c: Likewise. -- * bfd/elf32-or1k.c: Likewise. -- * bfd/elf32-ppc.c: Likewise. -- * bfd/elf32-rl78.c: Likewise. -- * bfd/elf32-rx.c: Likewise. -- * bfd/elf32-s390.c: Likewise. -- * bfd/elf32-score.c: Likewise. -- * bfd/elf32-score7.c: Likewise. -- * bfd/elf32-sh-symbian.c: Likewise. -- * bfd/elf32-sh.c: Likewise. -- * bfd/elf32-sh64.c: Likewise. -- * bfd/elf32-spu.c: Likewise. -- * bfd/elf32-tic6x.c: Likewise. -- * bfd/elf32-tilepro.c: Likewise. -- * bfd/elf32-v850.c: Likewise. -- * bfd/elf32-vax.c: Likewise. -- * bfd/elf32-visium.c: Likewise. -- * bfd/elf32-xc16x.c: Likewise. -- * bfd/elf32-xstormy16.c: Likewise. -- * bfd/elf32-xtensa.c: Likewise. -- * bfd/elf64-alpha.c: Likewise. -- * bfd/elf64-hppa.c: Likewise. -- * bfd/elf64-ia64-vms.c: Likewise. -- * bfd/elf64-mmix.c: Likewise. -- * bfd/elf64-ppc.c: Likewise. -- * bfd/elf64-s390.c: Likewise. -- * bfd/elf64-sh64.c: Likewise. -- * bfd/elf64-x86-64.c: Likewise. -- * bfd/elflink.c: Likewise. -- * bfd/elfnn-aarch64.c: Likewise. -- * bfd/elfnn-ia64.c: Likewise. -- * bfd/elfxx-mips.c: Likewise. -- * bfd/elfxx-sparc.c: Likewise. -- * bfd/elfxx-tilegx.c: Likewise. -- * bfd/i386linux.c: Likewise. -- * bfd/linker.c: Likewise. -- * bfd/m68klinux.c: Likewise. -- * bfd/pdp11.c: Likewise. -- * bfd/pe-mips.c: Likewise. -- * bfd/peXXigen.c: Likewise. -- * bfd/reloc.c: Likewise. -- * bfd/reloc16.c: Likewise. -- * bfd/sparclinux.c: Likewise. -- * bfd/sunos.c: Likewise. -- * bfd/vms-alpha.c: Likewise. -- * bfd/xcofflink.c: Likewise. -+ * bout.c: Likewise. -+ * coff-alpha.c: Likewise. -+ * coff-arm.c: Likewise. -+ * coff-i386.c: Likewise. -+ * coff-i960.c: Likewise. -+ * coff-m68k.c: Likewise. -+ * coff-mcore.c: Likewise. -+ * coff-mips.c: Likewise. -+ * coff-ppc.c: Likewise. -+ * coff-rs6000.c: Likewise. -+ * coff-sh.c: Likewise. -+ * coff-tic80.c: Likewise. -+ * coff-x86_64.c: Likewise. -+ * coff64-rs6000.c: Likewise. -+ * coffgen.c: Likewise. -+ * cofflink.c: Likewise. -+ * ecoff.c: Likewise. -+ * ecofflink.c: Likewise. -+ * elf-bfd.h: Likewise. -+ * elf-eh-frame.c: Likewise. -+ * elf-ifunc.c: Likewise. -+ * elf-m10200.c: Likewise. -+ * elf-m10300.c: Likewise. -+ * elf-s390-common.c: Likewise. -+ * elf-vxworks.c: Likewise. -+ * elf.c: Likewise. -+ * elf32-arm.c: Likewise. -+ * elf32-avr.c: Likewise. -+ * elf32-bfin.c: Likewise. -+ * elf32-cr16.c: Likewise. -+ * elf32-cr16c.c: Likewise. -+ * elf32-cris.c: Likewise. -+ * elf32-crx.c: Likewise. -+ * elf32-d10v.c: Likewise. -+ * elf32-dlx.c: Likewise. -+ * elf32-epiphany.c: Likewise. -+ * elf32-fr30.c: Likewise. -+ * elf32-frv.c: Likewise. -+ * elf32-ft32.c: Likewise. -+ * elf32-h8300.c: Likewise. -+ * elf32-hppa.c: Likewise. -+ * elf32-i370.c: Likewise. -+ * elf32-i386.c: Likewise. -+ * elf32-i860.c: Likewise. -+ * elf32-ip2k.c: Likewise. -+ * elf32-iq2000.c: Likewise. -+ * elf32-lm32.c: Likewise. -+ * elf32-m32c.c: Likewise. -+ * elf32-m32r.c: Likewise. -+ * elf32-m68hc11.c: Likewise. -+ * elf32-m68hc1x.c: Likewise. -+ * elf32-m68k.c: Likewise. -+ * elf32-mcore.c: Likewise. -+ * elf32-mep.c: Likewise. -+ * elf32-metag.c: Likewise. -+ * elf32-microblaze.c: Likewise. -+ * elf32-moxie.c: Likewise. -+ * elf32-msp430.c: Likewise. -+ * elf32-mt.c: Likewise. -+ * elf32-nds32.c: Likewise. -+ * elf32-nios2.c: Likewise. -+ * elf32-or1k.c: Likewise. -+ * elf32-ppc.c: Likewise. -+ * elf32-rl78.c: Likewise. -+ * elf32-rx.c: Likewise. -+ * elf32-s390.c: Likewise. -+ * elf32-score.c: Likewise. -+ * elf32-score7.c: Likewise. -+ * elf32-sh-symbian.c: Likewise. -+ * elf32-sh.c: Likewise. -+ * elf32-sh64.c: Likewise. -+ * elf32-spu.c: Likewise. -+ * elf32-tic6x.c: Likewise. -+ * elf32-tilepro.c: Likewise. -+ * elf32-v850.c: Likewise. -+ * elf32-vax.c: Likewise. -+ * elf32-visium.c: Likewise. -+ * elf32-xc16x.c: Likewise. -+ * elf32-xstormy16.c: Likewise. -+ * elf32-xtensa.c: Likewise. -+ * elf64-alpha.c: Likewise. -+ * elf64-hppa.c: Likewise. -+ * elf64-ia64-vms.c: Likewise. -+ * elf64-mmix.c: Likewise. -+ * elf64-ppc.c: Likewise. -+ * elf64-s390.c: Likewise. -+ * elf64-sh64.c: Likewise. -+ * elf64-x86-64.c: Likewise. -+ * elflink.c: Likewise. -+ * elfnn-aarch64.c: Likewise. -+ * elfnn-ia64.c: Likewise. -+ * elfxx-mips.c: Likewise. -+ * elfxx-sparc.c: Likewise. -+ * elfxx-tilegx.c: Likewise. -+ * i386linux.c: Likewise. -+ * linker.c: Likewise. -+ * m68klinux.c: Likewise. -+ * pdp11.c: Likewise. -+ * pe-mips.c: Likewise. -+ * peXXigen.c: Likewise. -+ * reloc.c: Likewise. -+ * reloc16.c: Likewise. -+ * sparclinux.c: Likewise. -+ * sunos.c: Likewise. -+ * vms-alpha.c: Likewise. -+ * xcofflink.c: Likewise. - - 2015-08-18 Alan Modra <amodra@gmail.com> - -@@ -1387,7 +1540,7 @@ - - 2015-08-11 Jiong Wang <jiong.wang@arm.com> - -- * bfd/elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec". -+ * elfnn-aarch64.c (aarch64_type_of_stub): New parameter "sym_sec". - Loose the check for symbol from ABS section. - (elfNN_aarch64_size_stubs): Pass sym_sec. - -@@ -1688,10 +1841,10 @@ - - 2015-07-10 H.J. Lu <hongjiu.lu@intel.com> - -- PR binutils/18656 -- * bfd.c (bfd_convert_section_size): New function. -- (bfd_convert_section_contents): Likewise. -- * bfd-in2.h: Regenerated. -+ PR binutils/18656 -+ * bfd.c (bfd_convert_section_size): New function. -+ (bfd_convert_section_contents): Likewise. -+ * bfd-in2.h: Regenerated. - - 2015-07-09 Catherine Moore <clm@codesourcery.com> - -@@ -2004,7 +2157,6 @@ - Bernd Schmidt <bernds@codesourcery.com> - Paul Brook <paul@codesourcery.com> - -- bfd/ - * bfd-in2.h: Regenerated. - * elf-bfd.h (DWARF2_EH_HDR, COMPACT_EH_HDR): Define. - (COMPACT_EH_CANT_UNWIND_OPCODE): Define. -@@ -2913,7 +3065,7 @@ - 2015-03-18 H.J. Lu <hongjiu.lu@intel.com> - - * compress.c (bfd_compress_section_contents): Make it static. -- * bfd/bfd-in2.h: Regenerated. -+ * bfd-in2.h: Regenerated. - - 2015-03-18 Eric Youngdale <eyoungdale@ptc.com> - -@@ -3062,8 +3214,8 @@ - - 2015-02-27 Marcus Shawcroft <marcus.shawcroft@arm.com> - -- * bfd/bfd-in2.h: Regenerate. -- * bfd/libbfd.h: Regenerate. -+ * bfd-in2.h: Regenerate. -+ * libbfd.h: Regenerate. - - 2015-02-26 Marcus Shawcroft <marcus.shawcroft@arm.com> - -@@ -3534,7 +3686,7 @@ - is weak or pointer_equality_needed is FALSE. - - * elf32-arm.c (elf32_arm_finish_dynamic_symbol): Improve -- comment discussing why we clear st_value for some symbols. -+ comment discussing why we clear st_value for some symbols. - - 2015-02-02 Kuan-Lin Chen <kuanlinchentw@gmail.com> - -diff --git a/bfd/archive.c b/bfd/archive.c -index b3d03d3..1fc3a94 100644 ---- a/bfd/archive.c -+++ b/bfd/archive.c -@@ -802,7 +802,7 @@ bfd_generic_openr_next_archived_file (bfd *archive, bfd *last_file) - Note that last_file->origin can be odd in the case of - BSD-4.4-style element with a long odd size. */ - filestart += filestart % 2; -- if (filestart <= last_file->proxy_origin) -+ if (filestart < last_file->proxy_origin) ++ PR ld/19579 ++ PR ld/21306 ++ * elf32-s390.c (elf_s390_finish_dynamic_symbol): Check ++ ELF_COMMON_DEF_P for common symbols. ++ * elf64-s390.c (elf_s390_finish_dynamic_symbol): Likewise. ++ * elf64-x86-64.c (elf_x86_64_relocate_section): Likewise. ++ * elflink.c (_bfd_elf_merge_symbol): Revert commits ++ 202ac193bbbecc96a4978d1ac3d17148253f9b01 and ++ 07492f668d2173da7a2bda3707ff0985e0f460b6. ++ ++2017-03-07 Alan Modra <amodra@gmail.com> ++ ++ PR 21224 ++ PR 20519 ++ * elf64-ppc.c (ppc64_elf_relocate_section): Add missing ++ dyn_relocs check. ++ ++2017-03-07 Alan Modra <amodra@gmail.com> ++ ++ Apply from master ++ 2017-03-02 Alan Modra <amodra@gmail.com> ++ * elf32-ppc.c (ppc_elf_vle_split16): Correct insn mask typo. ++ + 2017-03-02 Tristan Gingold <gingold@adacore.com> + + * version.m4: Bump version to 2.28.0 +diff --git a/bfd/config.bfd b/bfd/config.bfd +index 1b28016..c031216 100644 +--- a/bfd/config.bfd ++++ b/bfd/config.bfd +@@ -1439,10 +1439,9 @@ case "${targ}" in + #ifdef BFD64 + riscv32-*-*) + targ_defvec=riscv_elf32_vec +- targ_selvecs="riscv_elf32_vec" ++ targ_selvecs="riscv_elf32_vec riscv_elf64_vec" + want64=true + ;; +- + riscv64-*-*) + targ_defvec=riscv_elf64_vec + targ_selvecs="riscv_elf32_vec riscv_elf64_vec" +diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h +index 5de9ab6..dc4bd87 100644 +--- a/bfd/elf-bfd.h ++++ b/bfd/elf-bfd.h +@@ -1478,6 +1478,10 @@ struct elf_backend_data + /* Address of protected data defined in the shared library may be + external, i.e., due to copy relocation. */ + unsigned extern_protected_data : 1; ++ ++ /* True if `_bfd_elf_link_renumber_dynsyms' must be called even for ++ static binaries. */ ++ unsigned always_renumber_dynsyms : 1; + }; + + /* Information about reloc sections associated with a bfd_elf_section_data +diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c +index 0a78595..e04caef 100644 +--- a/bfd/elf32-arm.c ++++ b/bfd/elf32-arm.c +@@ -4024,10 +4024,12 @@ arm_type_of_stub (struct bfd_link_info *info, + if (!thumb_only) + { + if (input_sec->flags & SEC_ELF_PURECODE) +- _bfd_error_handler (_("\ +-%B(%A): warning: long branch veneers used in section with SHF_ARM_PURECODE section \ +-attribute is only supported for M-profile targets that implement the movw instruction."), +- input_sec); ++ _bfd_error_handler ++ (_("%B(%A): warning: long branch veneers used in" ++ " section with SHF_ARM_PURECODE section" ++ " attribute is only supported for M-profile" ++ " targets that implement the movw instruction."), ++ input_bfd, input_sec); + + stub_type = (bfd_link_pic (info) | globals->pic_veneer) + /* PIC stubs. */ +@@ -4056,10 +4058,12 @@ attribute is only supported for M-profile targets that implement the movw instru + else + { + if (input_sec->flags & SEC_ELF_PURECODE) +- _bfd_error_handler (_("\ +-%B(%A): warning: long branch veneers used in section with SHF_ARM_PURECODE section \ +-attribute is only supported for M-profile targets that implement the movw instruction."), +- input_sec); ++ _bfd_error_handler ++ (_("%B(%A): warning: long branch veneers used in" ++ " section with SHF_ARM_PURECODE section" ++ " attribute is only supported for M-profile" ++ " targets that implement the movw instruction."), ++ input_bfd, input_sec); + + stub_type = (bfd_link_pic (info) | globals->pic_veneer) + /* PIC stub. */ +@@ -4073,13 +4077,12 @@ attribute is only supported for M-profile targets that implement the movw instru + else { - /* Prevent looping. See PR19256. */ - bfd_set_error (bfd_error_malformed_archive); -diff --git a/bfd/coff-alpha.c b/bfd/coff-alpha.c -index 7478f2f..fffb9f7 100644 ---- a/bfd/coff-alpha.c -+++ b/bfd/coff-alpha.c -@@ -2208,7 +2208,7 @@ alpha_ecoff_openr_next_archived_file (bfd *archive, bfd *last_file) - BSD-4.4-style element with a long odd size. */ - filestart = last_file->proxy_origin + size; - filestart += filestart % 2; -- if (filestart <= last_file->proxy_origin) -+ if (filestart < last_file->proxy_origin) + if (input_sec->flags & SEC_ELF_PURECODE) +- _bfd_error_handler (_("%B(%s): warning: long branch " +- " veneers used in section with " +- "SHF_ARM_PURECODE section " +- "attribute is only supported" +- " for M-profile targets that " +- "implement the movw " +- "instruction.")); ++ _bfd_error_handler ++ (_("%B(%A): warning: long branch veneers used in" ++ " section with SHF_ARM_PURECODE section" ++ " attribute is only supported" " for M-profile" ++ " targets that implement the movw instruction."), ++ input_bfd, input_sec); + + /* Thumb to arm. */ + if (sym_sec != NULL +@@ -4126,13 +4129,12 @@ attribute is only supported for M-profile targets that implement the movw instru + || r_type == R_ARM_TLS_CALL) + { + if (input_sec->flags & SEC_ELF_PURECODE) +- _bfd_error_handler (_("%B(%s): warning: long branch " +- " veneers used in section with " +- "SHF_ARM_PURECODE section " +- "attribute is only supported" +- " for M-profile targets that " +- "implement the movw " +- "instruction.")); ++ _bfd_error_handler ++ (_("%B(%A): warning: long branch veneers used in" ++ " section with SHF_ARM_PURECODE section" ++ " attribute is only supported for M-profile" ++ " targets that implement the movw instruction."), ++ input_bfd, input_sec); + if (branch_type == ST_BRANCH_TO_THUMB) { - /* Prevent looping. See PR19256. */ - bfd_set_error (bfd_error_malformed_archive); -diff --git a/bfd/coff-i386.c b/bfd/coff-i386.c -index a9725c4..1b1a815 100644 ---- a/bfd/coff-i386.c -+++ b/bfd/coff-i386.c -@@ -139,41 +139,41 @@ coff_i386_reloc (bfd *abfd, - #define DOIT(x) \ - x = ((x & ~howto->dst_mask) | (((x & howto->src_mask) + diff) & howto->dst_mask)) - -- if (diff != 0) -- { -- reloc_howto_type *howto = reloc_entry->howto; -- unsigned char *addr = (unsigned char *) data + reloc_entry->address; -+ if (diff != 0) -+ { -+ reloc_howto_type *howto = reloc_entry->howto; -+ unsigned char *addr = (unsigned char *) data + reloc_entry->address; -+ -+ switch (howto->size) -+ { -+ case 0: -+ { -+ char x = bfd_get_8 (abfd, addr); -+ DOIT (x); -+ bfd_put_8 (abfd, x, addr); -+ } -+ break; - -- switch (howto->size) -+ case 1: - { -- case 0: -- { -- char x = bfd_get_8 (abfd, addr); -- DOIT (x); -- bfd_put_8 (abfd, x, addr); -- } -- break; -- -- case 1: -- { -- short x = bfd_get_16 (abfd, addr); -- DOIT (x); -- bfd_put_16 (abfd, (bfd_vma) x, addr); -- } -- break; -- -- case 2: -- { -- long x = bfd_get_32 (abfd, addr); -- DOIT (x); -- bfd_put_32 (abfd, (bfd_vma) x, addr); -- } -- break; -- -- default: -- abort (); -+ short x = bfd_get_16 (abfd, addr); -+ DOIT (x); -+ bfd_put_16 (abfd, (bfd_vma) x, addr); - } -- } -+ break; -+ -+ case 2: -+ { -+ long x = bfd_get_32 (abfd, addr); -+ DOIT (x); -+ bfd_put_32 (abfd, (bfd_vma) x, addr); -+ } -+ break; -+ -+ default: -+ abort (); -+ } -+ } - - /* Now let bfd_perform_relocation finish everything up. */ - return bfd_reloc_continue; -diff --git a/bfd/coff-x86_64.c b/bfd/coff-x86_64.c -index 4e6420a..9d7c845 100644 ---- a/bfd/coff-x86_64.c -+++ b/bfd/coff-x86_64.c -@@ -138,59 +138,61 @@ coff_amd64_reloc (bfd *abfd, - #define DOIT(x) \ - x = ((x & ~howto->dst_mask) | (((x & howto->src_mask) + diff) & howto->dst_mask)) - -- if (diff != 0) -- { -- reloc_howto_type *howto = reloc_entry->howto; -- unsigned char *addr = (unsigned char *) data + reloc_entry->address; -- -- /* FIXME: We do not have an end address for data, so we cannot -- accurately range check any addresses computed against it. -- cf: PR binutils/17512: file: 1085-1761-0.004. -- For now we do the best that we can. */ -- if (addr < (unsigned char *) data || addr > ((unsigned char *) data) + input_section->size) -+ if (diff != 0) -+ { -+ reloc_howto_type *howto = reloc_entry->howto; -+ unsigned char *addr = (unsigned char *) data + reloc_entry->address; -+ -+ /* FIXME: We do not have an end address for data, so we cannot -+ accurately range check any addresses computed against it. -+ cf: PR binutils/17512: file: 1085-1761-0.004. -+ For now we do the best that we can. */ -+ if (addr < (unsigned char *) data -+ || addr > ((unsigned char *) data) + input_section->size) -+ { -+ bfd_set_error (bfd_error_bad_value); -+ return bfd_reloc_notsupported; -+ } -+ -+ switch (howto->size) -+ { -+ case 0: -+ { -+ char x = bfd_get_8 (abfd, addr); -+ DOIT (x); -+ bfd_put_8 (abfd, x, addr); -+ } -+ break; -+ -+ case 1: -+ { -+ short x = bfd_get_16 (abfd, addr); -+ DOIT (x); -+ bfd_put_16 (abfd, (bfd_vma) x, addr); -+ } -+ break; -+ -+ case 2: - { -- bfd_set_error (bfd_error_bad_value); -- return bfd_reloc_notsupported; -+ long x = bfd_get_32 (abfd, addr); -+ DOIT (x); -+ bfd_put_32 (abfd, (bfd_vma) x, addr); - } -+ break; - -- switch (howto->size) -+ case 4: - { -- case 0: -- { -- char x = bfd_get_8 (abfd, addr); -- DOIT (x); -- bfd_put_8 (abfd, x, addr); -- } -- break; -- -- case 1: -- { -- short x = bfd_get_16 (abfd, addr); -- DOIT (x); -- bfd_put_16 (abfd, (bfd_vma) x, addr); -- } -- break; -- -- case 2: -- { -- long x = bfd_get_32 (abfd, addr); -- DOIT (x); -- bfd_put_32 (abfd, (bfd_vma) x, addr); -- } -- break; -- case 4: -- { -- long long x = bfd_get_64 (abfd, addr); -- DOIT (x); -- bfd_put_64 (abfd, (bfd_vma) x, addr); -- } -- break; -- -- default: -- bfd_set_error (bfd_error_bad_value); -- return bfd_reloc_notsupported; -+ long long x = bfd_get_64 (abfd, addr); -+ DOIT (x); -+ bfd_put_64 (abfd, (bfd_vma) x, addr); - } -- } -+ break; -+ -+ default: -+ bfd_set_error (bfd_error_bad_value); -+ return bfd_reloc_notsupported; -+ } -+ } + /* Arm to thumb. */ +diff --git a/bfd/elf32-avr.c b/bfd/elf32-avr.c +index 56b143d..0f6c188 100644 +--- a/bfd/elf32-avr.c ++++ b/bfd/elf32-avr.c +@@ -3284,8 +3284,7 @@ avr_add_stub (const char *stub_name, + if (hsh == NULL) + { + /* xgettext:c-format */ +- _bfd_error_handler (_("%B: cannot create stub entry %s"), +- NULL, stub_name); ++ _bfd_error_handler (_("cannot create stub entry %s"), stub_name); + return NULL; + } - /* Now let bfd_perform_relocation finish everything up. */ - return bfd_reloc_continue; -diff --git a/bfd/cofflink.c b/bfd/cofflink.c -index 8d98fec..88eb2b3 100644 ---- a/bfd/cofflink.c -+++ b/bfd/cofflink.c -@@ -2977,6 +2977,12 @@ _bfd_coff_generic_relocate_section (bfd *output_bfd, - else - { - sec = sections[symndx]; -+ -+ /* PR 19623: Relocations against symbols in -+ the absolute sections should ignored. */ -+ if (bfd_is_abs_section (sec)) -+ continue; -+ - val = (sec->output_section->vma - + sec->output_offset - + sym->n_value); -diff --git a/bfd/configure b/bfd/configure -index cf3c746..7411c6d 100755 ---- a/bfd/configure -+++ b/bfd/configure -@@ -1,6 +1,6 @@ - #! /bin/sh - # Guess values for system-dependent variables and create Makefiles. --# Generated by GNU Autoconf 2.64 for bfd 2.26. -+# Generated by GNU Autoconf 2.64 for bfd 2.26.0. - # - # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, - # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software -@@ -556,8 +556,8 @@ MAKEFLAGS= - # Identity of this package. - PACKAGE_NAME='bfd' - PACKAGE_TARNAME='bfd' --PACKAGE_VERSION='2.26' --PACKAGE_STRING='bfd 2.26' -+PACKAGE_VERSION='2.26.0' -+PACKAGE_STRING='bfd 2.26.0' - PACKAGE_BUGREPORT='' - PACKAGE_URL='' - -@@ -1351,7 +1351,7 @@ if test "$ac_init_help" = "long"; then - # Omit some internal or obsolete options to make the list less imposing. - # This message is too long to be a string in the A/UX 3.1 sh. - cat <<_ACEOF --\`configure' configures bfd 2.26 to adapt to many kinds of systems. -+\`configure' configures bfd 2.26.0 to adapt to many kinds of systems. - - Usage: $0 [OPTION]... [VAR=VALUE]... - -@@ -1422,7 +1422,7 @@ fi - - if test -n "$ac_init_help"; then - case $ac_init_help in -- short | recursive ) echo "Configuration of bfd 2.26:";; -+ short | recursive ) echo "Configuration of bfd 2.26.0:";; - esac - cat <<\_ACEOF - -@@ -1543,7 +1543,7 @@ fi - test -n "$ac_init_help" && exit $ac_status - if $ac_init_version; then - cat <<\_ACEOF --bfd configure 2.26 -+bfd configure 2.26.0 - generated by GNU Autoconf 2.64 - - Copyright (C) 2009 Free Software Foundation, Inc. -@@ -2185,7 +2185,7 @@ cat >config.log <<_ACEOF - This file contains any messages produced by compilers while - running configure, to aid debugging if configure makes a mistake. - --It was created by bfd $as_me 2.26, which was -+It was created by bfd $as_me 2.26.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - $ $0 $@ -@@ -3993,7 +3993,7 @@ fi - - # Define the identity of the package. - PACKAGE='bfd' -- VERSION='2.26' -+ VERSION='2.26.0' - - - cat >>confdefs.h <<_ACEOF -@@ -16533,7 +16533,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 - # report actual input values of CONFIG_FILES etc. instead of their - # values after options handling. - ac_log=" --This file was extended by bfd $as_me 2.26, which was -+This file was extended by bfd $as_me 2.26.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - CONFIG_FILES = $CONFIG_FILES -@@ -16597,7 +16597,7 @@ Report bugs to the package provider." - _ACEOF - cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 - ac_cs_version="\\ --bfd config.status 2.26 -+bfd config.status 2.26.0 - configured by $0, generated by GNU Autoconf 2.64, - with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" - -diff --git a/bfd/dwarf2.c b/bfd/dwarf2.c -index 176f018..64cfe9b 100644 ---- a/bfd/dwarf2.c -+++ b/bfd/dwarf2.c -@@ -3706,8 +3706,10 @@ _bfd_dwarf2_slurp_debug_info (bfd *abfd, bfd *debug_bfd, - fail more quickly. */ - return FALSE; - -+ /* Set BFD_DECOMPRESS to decompress debug sections. */ - if ((debug_bfd = bfd_openr (debug_filename, NULL)) == NULL -- || ! bfd_check_format (debug_bfd, bfd_object) -+ || !(debug_bfd->flags |= BFD_DECOMPRESS, -+ bfd_check_format (debug_bfd, bfd_object)) - || (msec = find_debug_info (debug_bfd, - debug_sections, NULL)) == NULL - || !bfd_generic_link_read_symbols (debug_bfd)) -diff --git a/bfd/elf32-hppa.c b/bfd/elf32-hppa.c -index ad40914..3fc1f57 100644 ---- a/bfd/elf32-hppa.c -+++ b/bfd/elf32-hppa.c -@@ -3245,6 +3245,8 @@ tpoff (struct bfd_link_info *info, bfd_vma address) - static bfd_boolean - elf32_hppa_final_link (bfd *abfd, struct bfd_link_info *info) - { -+ struct stat buf; -+ - /* Invoke the regular ELF linker to do all the work. */ - if (!bfd_elf_final_link (abfd, info)) - return FALSE; -@@ -3254,6 +3256,13 @@ elf32_hppa_final_link (bfd *abfd, struct bfd_link_info *info) - if (bfd_link_relocatable (info)) - return TRUE; +diff --git a/bfd/elf32-cris.c b/bfd/elf32-cris.c +index 97b8cc3..d4bbceb 100644 +--- a/bfd/elf32-cris.c ++++ b/bfd/elf32-cris.c +@@ -2714,8 +2714,9 @@ elf_cris_adjust_gotplt_to_got (struct elf_cris_link_hash_entry *h, void * p) + struct bfd_link_info *info = (struct bfd_link_info *) p; + + /* A GOTPLT reloc, when activated, is supposed to be included into +- the PLT refcount. */ ++ the PLT refcount, when the symbol isn't set-or-forced local. */ + BFD_ASSERT (h->gotplt_refcount == 0 ++ || h->root.plt.refcount == -1 + || h->gotplt_refcount <= h->root.plt.refcount); + + /* If nobody wanted a GOTPLT with this symbol, we're done. */ +@@ -2741,6 +2742,7 @@ elf_cris_adjust_gotplt_to_got (struct elf_cris_link_hash_entry *h, void * p) + srelgot = elf_hash_table (info)->srelgot; + + /* Put accurate refcounts there. */ ++ BFD_ASSERT (h->root.got.refcount >= 0); + h->root.got.refcount += h->gotplt_refcount; + h->reg_got_refcount = h->gotplt_refcount; + +@@ -3476,7 +3478,10 @@ cris_elf_check_relocs (bfd *abfd, + continue; -+ /* Do not attempt to sort non-regular files. This is here -+ especially for configure scripts and kernel builds which run -+ tests with "ld [...] -o /dev/null". */ -+ if (stat (abfd->filename, &buf) != 0 -+ || !S_ISREG(buf.st_mode)) -+ return TRUE; + h->needs_plt = 1; +- h->plt.refcount++; + - return elf_hppa_sort_unwind (abfd); - } ++ /* If the symbol is forced local, the refcount is unavailable. */ ++ if (h->plt.refcount != -1) ++ h->plt.refcount++; + break; + case R_CRIS_8: diff --git a/bfd/elf32-i386.c b/bfd/elf32-i386.c -index 300839b..79f339e 100644 +index 24beba3..f570253 100644 --- a/bfd/elf32-i386.c +++ b/bfd/elf32-i386.c -@@ -1830,7 +1830,8 @@ do_size: - && (sec->flags & SEC_ALLOC) != 0 - && (r_type != R_386_PC32 - || (h != NULL -- && (! SYMBOLIC_BIND (info, h) -+ && (! (bfd_link_pie (info) -+ || SYMBOLIC_BIND (info, h)) - || h->root.type == bfd_link_hash_defweak - || !h->def_regular)))) - || (ELIMINATE_COPY_RELOCS -@@ -2490,12 +2491,14 @@ elf_i386_allocate_dynrelocs (struct elf_link_hash_entry *h, void *inf) - } - else - { -+ eh->plt_got.offset = (bfd_vma) -1; - h->plt.offset = (bfd_vma) -1; - h->needs_plt = 0; - } - } - else - { -+ eh->plt_got.offset = (bfd_vma) -1; - h->plt.offset = (bfd_vma) -1; - h->needs_plt = 0; - } -@@ -4016,10 +4019,12 @@ elf_i386_relocate_section (bfd *output_bfd, - - /* It is relative to .got.plt section. */ - if (h->got.offset != (bfd_vma) -1) -- /* Use GOT entry. */ -+ /* Use GOT entry. Mask off the least significant bit in -+ GOT offset which may be set by R_386_GOT32 processing -+ below. */ - relocation = (htab->elf.sgot->output_section->vma - + htab->elf.sgot->output_offset -- + h->got.offset - offplt); -+ + (h->got.offset & ~1) - offplt); - else - /* Use GOTPLT entry. */ - relocation = (h->plt.offset / plt_entry_size - 1 + 3) * 4; -@@ -4285,8 +4290,8 @@ r_386_got32: - else if (h != NULL - && h->dynindx != -1 - && (r_type == R_386_PC32 -- || !bfd_link_pic (info) -- || !SYMBOLIC_BIND (info, h) -+ || !(bfd_link_executable (info) -+ || SYMBOLIC_BIND (info, h)) - || !h->def_regular)) - outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); - else -@@ -5355,19 +5360,23 @@ elf_i386_reloc_type_class (const struct bfd_link_info *info, - bfd *abfd = info->output_bfd; - const struct elf_backend_data *bed = get_elf_backend_data (abfd); - struct elf_link_hash_table *htab = elf_hash_table (info); -- unsigned long r_symndx = ELF32_R_SYM (rela->r_info); -- Elf_Internal_Sym sym; -- -- if (htab->dynsym == NULL -- || !bed->s->swap_symbol_in (abfd, -- (htab->dynsym->contents -- + r_symndx * sizeof (Elf32_External_Sym)), -- 0, &sym)) -- abort (); - -- /* Check relocation against STT_GNU_IFUNC symbol. */ -- if (ELF32_ST_TYPE (sym.st_info) == STT_GNU_IFUNC) -- return reloc_class_ifunc; -+ if (htab->dynsym != NULL -+ && htab->dynsym->contents != NULL) -+ { -+ /* Check relocation against STT_GNU_IFUNC symbol if there are -+ dynamic symbols. */ -+ unsigned long r_symndx = ELF32_R_SYM (rela->r_info); -+ Elf_Internal_Sym sym; -+ if (!bed->s->swap_symbol_in (abfd, -+ (htab->dynsym->contents -+ + r_symndx * sizeof (Elf32_External_Sym)), -+ 0, &sym)) -+ abort (); -+ -+ if (ELF32_ST_TYPE (sym.st_info) == STT_GNU_IFUNC) -+ return reloc_class_ifunc; -+ } - - switch (ELF32_R_TYPE (rela->r_info)) - { -diff --git a/bfd/elf64-hppa.c b/bfd/elf64-hppa.c -index 3b628b4..aa9cfd2 100644 ---- a/bfd/elf64-hppa.c -+++ b/bfd/elf64-hppa.c -@@ -2945,7 +2945,7 @@ elf_hppa_record_segment_addrs (bfd *abfd, - static bfd_boolean - elf_hppa_final_link (bfd *abfd, struct bfd_link_info *info) - { -- bfd_boolean retval; -+ struct stat buf; - struct elf64_hppa_link_hash_table *hppa_info = hppa_link_hash_table (info); - - if (hppa_info == NULL) -@@ -3029,7 +3029,8 @@ elf_hppa_final_link (bfd *abfd, struct bfd_link_info *info) - info); - - /* Invoke the regular ELF backend linker to do all the work. */ -- retval = bfd_elf_final_link (abfd, info); -+ if (!bfd_elf_final_link (abfd, info)) -+ return FALSE; - - elf_link_hash_traverse (elf_hash_table (info), - elf_hppa_remark_useless_dynamic_symbols, -@@ -3037,10 +3038,17 @@ elf_hppa_final_link (bfd *abfd, struct bfd_link_info *info) - - /* If we're producing a final executable, sort the contents of the - unwind section. */ -- if (retval && !bfd_link_relocatable (info)) -- retval = elf_hppa_sort_unwind (abfd); -+ if (bfd_link_relocatable (info)) -+ return TRUE; -+ -+ /* Do not attempt to sort non-regular files. This is here -+ especially for configure scripts and kernel builds which run -+ tests with "ld [...] -o /dev/null". */ -+ if (stat (abfd->filename, &buf) != 0 -+ || !S_ISREG(buf.st_mode)) -+ return TRUE; - -- return retval; -+ return elf_hppa_sort_unwind (abfd); - } - - /* Relocate the given INSN. VALUE should be the actual value we want +@@ -6576,6 +6576,8 @@ elf32_i386_nacl_elf_object_p (bfd *abfd) + #undef TARGET_LITTLE_NAME + #define TARGET_LITTLE_NAME "elf32-i386-vxworks" + #undef ELF_OSABI ++#undef ELF_MAXPAGESIZE ++#define ELF_MAXPAGESIZE 0x1000 + #undef elf_backend_plt_alignment + #define elf_backend_plt_alignment 4 + +diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c +index 0f3eb68..10caa8a 100644 +--- a/bfd/elf32-ppc.c ++++ b/bfd/elf32-ppc.c +@@ -4921,7 +4921,7 @@ ppc_elf_vle_split16 (bfd *input_bfd, + unsigned int insn, opcode, top5; + + insn = bfd_get_32 (input_bfd, loc); +- opcode = insn & 0xf300f800; ++ opcode = insn & 0xfc00f800; + if (opcode == E_OR2I_INSN + || opcode == E_AND2I_DOT_INSN + || opcode == E_OR2IS_INSN +diff --git a/bfd/elf32-s390.c b/bfd/elf32-s390.c +index fd1bc13..ddb6f5b 100644 +--- a/bfd/elf32-s390.c ++++ b/bfd/elf32-s390.c +@@ -3785,7 +3785,7 @@ elf_s390_finish_dynamic_symbol (bfd *output_bfd, + RELATIVE reloc. The entry in the global offset table + will already have been initialized in the + relocate_section function. */ +- if (!h->def_regular) ++ if (!(h->def_regular || ELF_COMMON_DEF_P (h))) + return FALSE; + BFD_ASSERT((h->got.offset & 1) != 0); + rela.r_info = ELF32_R_INFO (0, R_390_RELATIVE); diff --git a/bfd/elf64-ppc.c b/bfd/elf64-ppc.c -index 162862c..ffe23e6 100644 +index e7d4792..765bc6b 100644 --- a/bfd/elf64-ppc.c +++ b/bfd/elf64-ppc.c -@@ -4344,14 +4344,20 @@ create_linkage_sections (bfd *dynobj, struct bfd_link_info *info) - - htab = ppc_hash_table (info); - -- /* Create .sfpr for code to save and restore fp regs. */ - flags = (SEC_ALLOC | SEC_LOAD | SEC_CODE | SEC_READONLY - | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED); -- htab->sfpr = bfd_make_section_anyway_with_flags (dynobj, ".sfpr", -- flags); -- if (htab->sfpr == NULL -- || ! bfd_set_section_alignment (dynobj, htab->sfpr, 2)) -- return FALSE; -+ if (htab->params->save_restore_funcs) -+ { -+ /* Create .sfpr for code to save and restore fp regs. */ -+ htab->sfpr = bfd_make_section_anyway_with_flags (dynobj, ".sfpr", -+ flags); -+ if (htab->sfpr == NULL -+ || ! bfd_set_section_alignment (dynobj, htab->sfpr, 2)) -+ return FALSE; -+ } -+ -+ if (bfd_link_relocatable (info)) -+ return TRUE; - - /* Create .glink for lazy dynamic linking support. */ - htab->glink = bfd_make_section_anyway_with_flags (dynobj, ".glink", -@@ -4429,9 +4435,6 @@ ppc64_elf_init_stub_bfd (struct bfd_link_info *info, - htab->elf.dynobj = params->stub_bfd; - htab->params = params; - -- if (bfd_link_relocatable (info)) -- return TRUE; -- - return create_linkage_sections (htab->elf.dynobj, info); - } - -@@ -6665,7 +6668,7 @@ sfpr_define (struct bfd_link_info *info, - sym[len + 0] = i / 10 + '0'; - sym[len + 1] = i % 10 + '0'; - h = (struct ppc_link_hash_entry *) -- elf_link_hash_lookup (&htab->elf, sym, FALSE, FALSE, TRUE); -+ elf_link_hash_lookup (&htab->elf, sym, writing, TRUE, TRUE); - if (stub_sec != NULL) - { - if (h != NULL -@@ -6706,6 +6709,7 @@ sfpr_define (struct bfd_link_info *info, - h->elf.root.u.def.value = htab->sfpr->size; - h->elf.type = STT_FUNC; - h->elf.def_regular = 1; -+ h->elf.non_elf = 0; - _bfd_elf_link_hash_hide_symbol (info, &h->elf, TRUE); - writing = TRUE; - if (htab->sfpr->contents == NULL) -@@ -7050,14 +7054,28 @@ ppc64_elf_func_desc_adjust (bfd *obfd ATTRIBUTE_UNUSED, - struct bfd_link_info *info) - { - struct ppc_link_hash_table *htab; -- unsigned int i; - - htab = ppc_hash_table (info); - if (htab == NULL) - return FALSE; - -- if (!bfd_link_relocatable (info) -- && htab->elf.hgot != NULL) -+ /* Provide any missing _save* and _rest* functions. */ -+ if (htab->sfpr != NULL) -+ { -+ unsigned int i; -+ -+ htab->sfpr->size = 0; -+ for (i = 0; i < ARRAY_SIZE (save_res_funcs); i++) -+ if (!sfpr_define (info, &save_res_funcs[i], NULL)) -+ return FALSE; -+ if (htab->sfpr->size == 0) -+ htab->sfpr->flags |= SEC_EXCLUDE; -+ } -+ -+ if (bfd_link_relocatable (info)) -+ return TRUE; -+ -+ if (htab->elf.hgot != NULL) +@@ -7627,7 +7627,7 @@ tocsave_find (struct ppc_link_hash_table *htab, + if (ent.sec == NULL || ent.sec->output_section == NULL) { - _bfd_elf_link_hash_hide_symbol (info, htab->elf.hgot, TRUE); - /* Make .TOC. defined so as to prevent it being made dynamic. -@@ -7076,22 +7094,8 @@ ppc64_elf_func_desc_adjust (bfd *obfd ATTRIBUTE_UNUSED, - | STV_HIDDEN); + _bfd_error_handler +- (_("%B: undefined symbol on R_PPC64_TOCSAVE relocation")); ++ (_("%B: undefined symbol on R_PPC64_TOCSAVE relocation"), ibfd); + return NULL; } -- if (htab->sfpr == NULL) -- /* We don't have any relocs. */ -- return TRUE; -- -- /* Provide any missing _save* and _rest* functions. */ -- htab->sfpr->size = 0; -- if (htab->params->save_restore_funcs) -- for (i = 0; i < ARRAY_SIZE (save_res_funcs); i++) -- if (!sfpr_define (info, &save_res_funcs[i], NULL)) -- return FALSE; -- - elf_link_hash_traverse (&htab->elf, func_desc_adjust, info); - -- if (htab->sfpr->size == 0) -- htab->sfpr->flags |= SEC_EXCLUDE; -- - return TRUE; - } - +@@ -14798,8 +14798,10 @@ ppc64_elf_relocate_section (bfd *output_bfd, + break; + + if (bfd_link_pic (info) +- ? ((h != NULL && pc_dynrelocs (h)) +- || must_be_dyn_reloc (info, r_type)) ++ ? ((h == NULL ++ || h->dyn_relocs != NULL) ++ && ((h != NULL && pc_dynrelocs (h)) ++ || must_be_dyn_reloc (info, r_type))) + : (h != NULL + ? h->dyn_relocs != NULL + : ELF_ST_TYPE (sym->st_info) == STT_GNU_IFUNC)) +diff --git a/bfd/elf64-s390.c b/bfd/elf64-s390.c +index b5fd05f..fbbf8d6 100644 +--- a/bfd/elf64-s390.c ++++ b/bfd/elf64-s390.c +@@ -3582,7 +3582,7 @@ elf_s390_finish_dynamic_symbol (bfd *output_bfd, + RELATIVE reloc. The entry in the global offset table + will already have been initialized in the + relocate_section function. */ +- if (!h->def_regular) ++ if (!(h->def_regular || ELF_COMMON_DEF_P (h))) + return FALSE; + BFD_ASSERT((h->got.offset & 1) != 0); + rela.r_info = ELF64_R_INFO (0, R_390_RELATIVE); diff --git a/bfd/elf64-x86-64.c b/bfd/elf64-x86-64.c -index 63957bb..e80fd20 100644 +index e0e6c16..e363eaf 100644 --- a/bfd/elf64-x86-64.c +++ b/bfd/elf64-x86-64.c -@@ -2029,7 +2029,8 @@ do_size: - && (sec->flags & SEC_ALLOC) != 0 - && (! IS_X86_64_PCREL_TYPE (r_type) - || (h != NULL -- && (! SYMBOLIC_BIND (info, h) -+ && (! (bfd_link_pie (info) -+ || SYMBOLIC_BIND (info, h)) - || h->root.type == bfd_link_hash_defweak - || !h->def_regular)))) - || (ELIMINATE_COPY_RELOCS -@@ -2723,12 +2724,14 @@ elf_x86_64_allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf) - } - else - { -+ eh->plt_got.offset = (bfd_vma) -1; - h->plt.offset = (bfd_vma) -1; - h->needs_plt = 0; - } - } - else - { -+ eh->plt_got.offset = (bfd_vma) -1; - h->plt.offset = (bfd_vma) -1; - h->needs_plt = 0; - } -@@ -3190,35 +3193,43 @@ elf_x86_64_convert_load (bfd *abfd, asection *sec, - } - else - { -- asection *asect; -- bfd_size_type size; -+ bfd_signed_vma distance; - - /* At this point, we don't know the load addresses of TSEC - section nor SEC section. We estimate the distrance between -- SEC and TSEC. */ -- size = 0; -- for (asect = sec->output_section; -- asect != NULL && asect != tsec->output_section; -- asect = asect->next) -+ SEC and TSEC. We store the estimated distances in the -+ compressed_size field of the output section, which is only -+ used to decompress the compressed input section. */ -+ if (sec->output_section->compressed_size == 0) - { -- asection *i; -- for (i = asect->output_section->map_head.s; -- i != NULL; -- i = i->map_head.s) -+ asection *asect; -+ bfd_size_type size = 0; -+ for (asect = link_info->output_bfd->sections; -+ asect != NULL; -+ asect = asect->next) +@@ -4926,7 +4926,8 @@ do_ifunc_pointer: { -- size = align_power (size, i->alignment_power); -- size += i->size; -+ asection *i; -+ for (i = asect->map_head.s; -+ i != NULL; -+ i = i->map_head.s) -+ { -+ size = align_power (size, i->alignment_power); -+ size += i->size; -+ } -+ asect->compressed_size = size; + /* Symbol is referenced locally. Make sure it is + defined locally or for a branch. */ +- fail = !h->def_regular && !branch; ++ fail = (!(h->def_regular || ELF_COMMON_DEF_P (h)) ++ && !branch); } - } - - /* Don't convert GOTPCREL relocations if TSEC isn't placed - after SEC. */ -- if (asect == NULL) -+ distance = (tsec->output_section->compressed_size -+ - sec->output_section->compressed_size); -+ if (distance < 0) - continue; - - /* Take PT_GNU_RELRO segment into account by adding - maxpagesize. */ -- if ((toff + size + maxpagesize - roff + 0x80000000) -+ if ((toff + distance + maxpagesize - roff + 0x80000000) - > 0xffffffff) - continue; - } -@@ -4631,8 +4642,8 @@ direct: - else if (h != NULL - && h->dynindx != -1 - && (IS_X86_64_PCREL_TYPE (r_type) -- || ! bfd_link_pic (info) -- || ! SYMBOLIC_BIND (info, h) -+ || !(bfd_link_executable (info) -+ || SYMBOLIC_BIND (info, h)) - || ! h->def_regular)) - { - outrel.r_info = htab->r_info (h->dynindx, r_type); -@@ -5728,19 +5739,23 @@ elf_x86_64_reloc_type_class (const struct bfd_link_info *info, - bfd *abfd = info->output_bfd; - const struct elf_backend_data *bed = get_elf_backend_data (abfd); - struct elf_x86_64_link_hash_table *htab = elf_x86_64_hash_table (info); -- unsigned long r_symndx = htab->r_sym (rela->r_info); -- Elf_Internal_Sym sym; -- -- if (htab->elf.dynsym == NULL -- || !bed->s->swap_symbol_in (abfd, -- (htab->elf.dynsym->contents -- + r_symndx * bed->s->sizeof_sym), -- 0, &sym)) -- abort (); - -- /* Check relocation against STT_GNU_IFUNC symbol. */ -- if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC) -- return reloc_class_ifunc; -+ if (htab->elf.dynsym != NULL -+ && htab->elf.dynsym->contents != NULL) -+ { -+ /* Check relocation against STT_GNU_IFUNC symbol if there are -+ dynamic symbols. */ -+ unsigned long r_symndx = htab->r_sym (rela->r_info); -+ Elf_Internal_Sym sym; -+ if (!bed->s->swap_symbol_in (abfd, -+ (htab->elf.dynsym->contents -+ + r_symndx * bed->s->sizeof_sym), -+ 0, &sym)) -+ abort (); -+ -+ if (ELF_ST_TYPE (sym.st_info) == STT_GNU_IFUNC) -+ return reloc_class_ifunc; -+ } - - switch ((int) ELF32_R_TYPE (rela->r_info)) - { + else if (!(bfd_link_pie (info) + && (h->needs_copy || eh->needs_copy))) diff --git a/bfd/elflink.c b/bfd/elflink.c -index 3d37bb4..842e85b 100644 +index 69b66f2..cd03a13 100644 --- a/bfd/elflink.c +++ b/bfd/elflink.c -@@ -555,6 +555,19 @@ bfd_elf_record_link_assignment (bfd *output_bfd, - if (h == NULL) - return provide; - -+ if (h->versioned == unknown) -+ { -+ /* Set versioned if symbol version is unknown. */ -+ char *version = strrchr (name, ELF_VER_CHR); -+ if (version) -+ { -+ if (version > name && version[-1] != ELF_VER_CHR) -+ h->versioned = versioned_hidden; -+ else -+ h->versioned = versioned; -+ } -+ } -+ - switch (h->root.type) - { - case bfd_link_hash_defined: -@@ -1472,13 +1485,16 @@ _bfd_elf_merge_symbol (bfd *abfd, +@@ -1543,16 +1543,13 @@ _bfd_elf_merge_symbol (bfd *abfd, represent variables; this can cause confusion in principle, but any such confusion would seem to indicate an erroneous program or shared library. We also permit a common symbol in a regular -- object to override a weak symbol in a shared object. */ -+ object to override a weak symbol in a shared object. A common -+ symbol in executable also overrides a symbol in a shared object. */ +- object to override a weak symbol in a shared object. A common +- symbol in executable also overrides a symbol in a shared object. */ ++ object to override a weak symbol in a shared object. */ if (newdyn && newdef && (olddef || (h->root.type == bfd_link_hash_common -- && (newweak || newfunc)))) -+ && (newweak -+ || newfunc -+ || (!olddyn && bfd_link_executable (info)))))) +- && (newweak +- || newfunc +- || (!olddyn && bfd_link_executable (info)))))) ++ && (newweak || newfunc)))) { *override = TRUE; newdef = FALSE; -@@ -4562,8 +4578,10 @@ error_free_dyn: - break; - } +@@ -6710,6 +6707,8 @@ bfd_boolean + bfd_elf_size_dynsym_hash_dynstr (bfd *output_bfd, struct bfd_link_info *info) + { + const struct elf_backend_data *bed; ++ unsigned long section_sym_count; ++ bfd_size_type dynsymcount; -- /* Don't add DT_NEEDED for references from the dummy bfd. */ -+ /* Don't add DT_NEEDED for references from the dummy bfd nor -+ for unmatched symbol. */ - if (!add_needed -+ && matched - && definition - && ((dynsym - && h->ref_regular_nonweak -diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c -index 59c51cc..d83dc1b 100644 ---- a/bfd/elfnn-aarch64.c -+++ b/bfd/elfnn-aarch64.c -@@ -2655,7 +2655,7 @@ aarch64_type_of_stub (struct bfd_link_info *info, - bfd_boolean via_plt_p; - - if (st_type != STT_FUNC -- && (sym_sec != bfd_abs_section_ptr)) -+ && (sym_sec == input_sec)) - return stub_type; - - globals = elf_aarch64_hash_table (info); -@@ -4174,7 +4174,7 @@ elfNN_aarch64_size_stubs (bfd *output_bfd, - goto error_ret_free_internal; - } + if (!is_elf_hash_table (info->hash)) + return TRUE; +@@ -6717,24 +6716,30 @@ bfd_elf_size_dynsym_hash_dynstr (bfd *output_bfd, struct bfd_link_info *info) + bed = get_elf_backend_data (output_bfd); + (*bed->elf_backend_init_index_section) (output_bfd, info); + ++ /* Assign dynsym indices. In a shared library we generate a section ++ symbol for each output section, which come first. Next come all ++ of the back-end allocated local dynamic syms, followed by the rest ++ of the global symbols. ++ ++ This is usually not needed for static binaries, however backends ++ can request to always do it, e.g. the MIPS backend uses dynamic ++ symbol counts to lay out GOT, which will be produced in the ++ presence of GOT relocations even in static binaries (holding fixed ++ data in that case, to satisfy those relocations). */ ++ ++ if (elf_hash_table (info)->dynamic_sections_created ++ || bed->always_renumber_dynsyms) ++ dynsymcount = _bfd_elf_link_renumber_dynsyms (output_bfd, info, ++ §ion_sym_count); ++ + if (elf_hash_table (info)->dynamic_sections_created) + { + bfd *dynobj; + asection *s; +- bfd_size_type dynsymcount; +- unsigned long section_sym_count; + unsigned int dtagcount; + + dynobj = elf_hash_table (info)->dynobj; + +- /* Assign dynsym indicies. In a shared library we generate a +- section symbol for each output section, which come first. +- Next come all of the back-end allocated local dynamic syms, +- followed by the rest of the global symbols. */ +- +- dynsymcount = _bfd_elf_link_renumber_dynsyms (output_bfd, info, +- §ion_sym_count); +- + /* Work out the size of the symbol version section. */ + s = bfd_get_linker_section (dynobj, ".gnu.version"); + BFD_ASSERT (s != NULL); +@@ -12986,7 +12991,12 @@ elf_gc_sweep (bfd *abfd, struct bfd_link_info *info) + elf_link_hash_traverse (elf_hash_table (info), elf_gc_sweep_symbol, + &sweep_info); + +- _bfd_elf_link_renumber_dynsyms (abfd, info, §ion_sym_count); ++ /* We need to reassign dynsym indices now that symbols may have ++ been removed. See the call in `bfd_elf_size_dynsym_hash_dynstr' ++ for the details of the conditions used here. */ ++ if (elf_hash_table (info)->dynamic_sections_created ++ || bed->always_renumber_dynsyms) ++ _bfd_elf_link_renumber_dynsyms (abfd, info, §ion_sym_count); + return TRUE; + } -- stub_entry->target_value = sym_value; -+ stub_entry->target_value = sym_value + irela->r_addend; - stub_entry->target_section = sym_sec; - stub_entry->stub_type = stub_type; - stub_entry->h = hash; -@@ -5280,15 +5280,28 @@ elfNN_aarch64_final_link_relocate (reloc_howto_type *howto, - /* Check if a stub has to be inserted because the destination - is too far away. */ - struct elf_aarch64_stub_hash_entry *stub_entry = NULL; -- if (! aarch64_valid_branch_p (value, place)) +diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c +index ff25ebd..3c04507 100644 +--- a/bfd/elfnn-riscv.c ++++ b/bfd/elfnn-riscv.c +@@ -52,10 +52,6 @@ + #define ELF_MAXPAGESIZE 0x1000 + #define ELF_COMMONPAGESIZE 0x1000 + +-/* The global pointer's symbol name. */ +- +-#define GP_NAME "__global_pointer$" +- + /* The RISC-V linker needs to keep track of the number of relocs that it + decides to copy as dynamic relocs in check_relocs for each symbol. + This is so that it can later discard them if they are found to be +@@ -1467,7 +1463,7 @@ riscv_global_pointer_value (struct bfd_link_info *info) + { + struct bfd_link_hash_entry *h; + +- h = bfd_link_hash_lookup (info->hash, GP_NAME, FALSE, FALSE, TRUE); ++ h = bfd_link_hash_lookup (info->hash, RISCV_GP_SYMBOL, FALSE, FALSE, TRUE); + if (h == NULL || h->type != bfd_link_hash_defined) + return 0; + +@@ -2818,7 +2814,8 @@ _bfd_riscv_relax_lui (bfd *abfd, + /* If gp and the symbol are in the same output section, then + consider only that section's alignment. */ + struct bfd_link_hash_entry *h = +- bfd_link_hash_lookup (link_info->hash, GP_NAME, FALSE, FALSE, TRUE); ++ bfd_link_hash_lookup (link_info->hash, RISCV_GP_SYMBOL, FALSE, FALSE, ++ TRUE); + if (h->u.def.section->output_section == sym_sec->output_section) + max_alignment = (bfd_vma) 1 << sym_sec->output_section->alignment_power; + } +@@ -3205,6 +3202,19 @@ riscv_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) + return TRUE; + } + ++/* Set the right mach type. */ ++static bfd_boolean ++riscv_elf_object_p (bfd *abfd) ++{ ++ /* There are only two mach types in RISCV currently. */ ++ if (strcmp (abfd->xvec->name, "elf32-littleriscv") == 0) ++ bfd_default_set_arch_mach (abfd, bfd_arch_riscv, bfd_mach_riscv32); ++ else ++ bfd_default_set_arch_mach (abfd, bfd_arch_riscv, bfd_mach_riscv64); + -+ /* If the branch destination is directed to plt stub, "value" will be -+ the final destination, otherwise we should plus signed_addend, it may -+ contain non-zero value, for example call to local function symbol -+ which are turned into "sec_sym + sec_off", and sec_off is kept in -+ signed_addend. */ -+ if (! aarch64_valid_branch_p (via_plt_p ? value : value + signed_addend, -+ place)) - /* The target is out of reach, so redirect the branch to - the local stub for this function. */ - stub_entry = elfNN_aarch64_get_stub_entry (input_section, sym_sec, h, - rel, globals); - if (stub_entry != NULL) -- value = (stub_entry->stub_offset -- + stub_entry->stub_sec->output_offset -- + stub_entry->stub_sec->output_section->vma); -+ { -+ value = (stub_entry->stub_offset -+ + stub_entry->stub_sec->output_offset -+ + stub_entry->stub_sec->output_section->vma); ++ return TRUE; ++} + -+ /* We have redirected the destination to stub entry address, -+ so ignore any addend record in the original rela entry. */ -+ signed_addend = 0; -+ } - } - value = _bfd_aarch64_elf_resolve_relocation (bfd_r_type, place, value, - signed_addend, weak_undef_p); + + #define TARGET_LITTLE_SYM riscv_elfNN_vec + #define TARGET_LITTLE_NAME "elfNN-littleriscv" +@@ -3230,6 +3240,7 @@ riscv_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) + #define elf_backend_plt_sym_val riscv_elf_plt_sym_val + #define elf_backend_grok_prstatus riscv_elf_grok_prstatus + #define elf_backend_grok_psinfo riscv_elf_grok_psinfo ++#define elf_backend_object_p riscv_elf_object_p + #define elf_info_to_howto_rel NULL + #define elf_info_to_howto riscv_info_to_howto_rela + #define bfd_elfNN_bfd_relax_section _bfd_riscv_relax_section +diff --git a/bfd/elfxx-mips.h b/bfd/elfxx-mips.h +index fa5b5d2..274129b 100644 +--- a/bfd/elfxx-mips.h ++++ b/bfd/elfxx-mips.h +@@ -196,3 +196,4 @@ literal_reloc_p (int r_type) + #define elf_backend_post_process_headers _bfd_mips_post_process_headers + #define elf_backend_compact_eh_encoding _bfd_mips_elf_compact_eh_encoding + #define elf_backend_cant_unwind_opcode _bfd_mips_elf_cant_unwind_opcode ++#define elf_backend_always_renumber_dynsyms TRUE +diff --git a/bfd/elfxx-target.h b/bfd/elfxx-target.h +index d063fb7..d07600c 100644 +--- a/bfd/elfxx-target.h ++++ b/bfd/elfxx-target.h +@@ -126,6 +126,9 @@ + #ifndef elf_backend_extern_protected_data + #define elf_backend_extern_protected_data 0 + #endif ++#ifndef elf_backend_always_renumber_dynsyms ++#define elf_backend_always_renumber_dynsyms FALSE ++#endif + #ifndef elf_backend_stack_align + #define elf_backend_stack_align 16 + #endif +@@ -866,7 +869,8 @@ static struct elf_backend_data elfNN_bed = + elf_backend_no_page_alias, + elf_backend_default_execstack, + elf_backend_caches_rawsize, +- elf_backend_extern_protected_data ++ elf_backend_extern_protected_data, ++ elf_backend_always_renumber_dynsyms + }; + + /* Forward declaration for use when initialising alternative_target field. */ diff --git a/bfd/version.h b/bfd/version.h -index ed51cc9..d70b1dc 100644 +index eda06e4..a03012f 100644 --- a/bfd/version.h +++ b/bfd/version.h @@ -1,4 +1,4 @@ --#define BFD_VERSION_DATE 20160125 -+#define BFD_VERSION_DATE 20160321 +-#define BFD_VERSION_DATE 20170302 ++#define BFD_VERSION_DATE 20170510 #define BFD_VERSION @bfd_version@ #define BFD_VERSION_STRING @bfd_version_package@ @bfd_version_string@ #define REPORT_BUGS_TO @report_bugs_to@ -diff --git a/bfd/version.m4 b/bfd/version.m4 -index 9fb81c5..607d328 100644 ---- a/bfd/version.m4 -+++ b/bfd/version.m4 -@@ -1 +1 @@ --m4_define([BFD_VERSION], [2.26]) -+m4_define([BFD_VERSION], [2.26.0]) -diff --git a/binutils/ChangeLog b/binutils/ChangeLog -index 2250b30..0a8dcd8 100644 ---- a/binutils/ChangeLog -+++ b/binutils/ChangeLog -@@ -1,3 +1,34 @@ -+2016-03-14 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-01-28 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR binutils/19523 -+ * Makefile.am (check-DEJAGNU): Pass CC and CC_FOR_BUILD to -+ runtest. -+ * Makefile.in: Regenerated. -+ * testsuite/binutils-all/compress.exp (test_gnu_debuglink): New -+ proc. -+ Run test_gnu_debuglink for native ELF build. -+ -+2016-03-09 Nick Clifton <nickc@redhat.com> -+ -+ PR binutils/19775 -+ * testsuite/binutils-all/ar.exp (proc empty_archive): New proc. -+ Run the new proc. -+ * testsuite/binutils-all/empty: New, empty, file. -+ -+2016-02-12 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-02-12 H.J. Lu <hongjiu.lu@intel.com> -+ -+ * doc/binutils.texi: Fix a typo. -+ -+2016-01-25 Tristan Gingold <gingold@adacore.com> -+ -+ * configure: Regenerate. -+ - 2016-01-25 Tristan Gingold <gingold@adacore.com> - - * configure: Regenerate. -@@ -238,12 +269,12 @@ - - 2015-07-10 H.J. Lu <hongjiu.lu@intel.com> - -- PR binutils/18656 -- * objcopy.c (setup_section): Call bfd_convert_section_size -- to get the output section size. -- (copy_section): Get the section size from the output section -- and call bfd_get_full_section_contents to convert section -- contents for output. -+ PR binutils/18656 -+ * objcopy.c (setup_section): Call bfd_convert_section_size -+ to get the output section size. -+ (copy_section): Get the section size from the output section -+ and call bfd_get_full_section_contents to convert section -+ contents for output. - - 2015-07-10 H.J. Lu <hongjiu.lu@intel.com> - -diff --git a/binutils/Makefile.am b/binutils/Makefile.am -index 1735022..4f618ce 100644 ---- a/binutils/Makefile.am -+++ b/binutils/Makefile.am -@@ -192,6 +192,7 @@ check-DEJAGNU: site.exp - EXPECT=$(EXPECT); export EXPECT; \ - runtest=$(RUNTEST); \ - if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \ -+ CC="$(CC)" CC_FOR_BUILD="$(CC_FOR_BUILD)" \ - CC_FOR_TARGET="$(CC_FOR_TARGET)" CFLAGS_FOR_TARGET="$(CFLAGS)" \ - $$runtest --tool $(DEJATOOL) --srcdir $${srcdir}/testsuite \ - $(RUNTESTFLAGS); \ -diff --git a/binutils/Makefile.in b/binutils/Makefile.in -index 5642925..eddd617 100644 ---- a/binutils/Makefile.in -+++ b/binutils/Makefile.in -@@ -1290,6 +1290,7 @@ check-DEJAGNU: site.exp - EXPECT=$(EXPECT); export EXPECT; \ - runtest=$(RUNTEST); \ - if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \ -+ CC="$(CC)" CC_FOR_BUILD="$(CC_FOR_BUILD)" \ - CC_FOR_TARGET="$(CC_FOR_TARGET)" CFLAGS_FOR_TARGET="$(CFLAGS)" \ - $$runtest --tool $(DEJATOOL) --srcdir $${srcdir}/testsuite \ - $(RUNTESTFLAGS); \ -diff --git a/binutils/configure b/binutils/configure -index 6e1f21e..d4f3e1e 100755 ---- a/binutils/configure -+++ b/binutils/configure -@@ -1,6 +1,6 @@ - #! /bin/sh - # Guess values for system-dependent variables and create Makefiles. --# Generated by GNU Autoconf 2.64 for binutils 2.26. -+# Generated by GNU Autoconf 2.64 for binutils 2.26.0. - # - # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, - # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software -@@ -556,8 +556,8 @@ MAKEFLAGS= - # Identity of this package. - PACKAGE_NAME='binutils' - PACKAGE_TARNAME='binutils' --PACKAGE_VERSION='2.26' --PACKAGE_STRING='binutils 2.26' -+PACKAGE_VERSION='2.26.0' -+PACKAGE_STRING='binutils 2.26.0' - PACKAGE_BUGREPORT='' - PACKAGE_URL='' - -@@ -1335,7 +1335,7 @@ if test "$ac_init_help" = "long"; then - # Omit some internal or obsolete options to make the list less imposing. - # This message is too long to be a string in the A/UX 3.1 sh. - cat <<_ACEOF --\`configure' configures binutils 2.26 to adapt to many kinds of systems. -+\`configure' configures binutils 2.26.0 to adapt to many kinds of systems. - - Usage: $0 [OPTION]... [VAR=VALUE]... - -@@ -1406,7 +1406,7 @@ fi - - if test -n "$ac_init_help"; then - case $ac_init_help in -- short | recursive ) echo "Configuration of binutils 2.26:";; -+ short | recursive ) echo "Configuration of binutils 2.26.0:";; - esac - cat <<\_ACEOF - -@@ -1527,7 +1527,7 @@ fi - test -n "$ac_init_help" && exit $ac_status - if $ac_init_version; then - cat <<\_ACEOF --binutils configure 2.26 -+binutils configure 2.26.0 - generated by GNU Autoconf 2.64 - - Copyright (C) 2009 Free Software Foundation, Inc. -@@ -2169,7 +2169,7 @@ cat >config.log <<_ACEOF - This file contains any messages produced by compilers while - running configure, to aid debugging if configure makes a mistake. - --It was created by binutils $as_me 2.26, which was -+It was created by binutils $as_me 2.26.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - $ $0 $@ -@@ -3977,7 +3977,7 @@ fi - - # Define the identity of the package. - PACKAGE='binutils' -- VERSION='2.26' -+ VERSION='2.26.0' - - - cat >>confdefs.h <<_ACEOF -@@ -15142,7 +15142,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 - # report actual input values of CONFIG_FILES etc. instead of their - # values after options handling. - ac_log=" --This file was extended by binutils $as_me 2.26, which was -+This file was extended by binutils $as_me 2.26.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - CONFIG_FILES = $CONFIG_FILES -@@ -15206,7 +15206,7 @@ Report bugs to the package provider." - _ACEOF - cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 - ac_cs_version="\\ --binutils config.status 2.26 -+binutils config.status 2.26.0 - configured by $0, generated by GNU Autoconf 2.64, - with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" - -diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi -index 7dc09c3..2e424ef 100644 ---- a/binutils/doc/binutils.texi -+++ b/binutils/doc/binutils.texi -@@ -1872,7 +1872,7 @@ ELF ABI. Note - if compression would actually make a section - @itemx --compress-debug-sections=zlib-gabi - For ELF files, these options control how DWARF debug sections are - compressed. @option{--compress-debug-sections=none} is equivalent --to @option{--nocompress-debug-sections}. -+to @option{--decompress-debug-sections}. - @option{--compress-debug-sections=zlib} and - @option{--compress-debug-sections=zlib-gabi} are equivalent to - @option{--compress-debug-sections}. -diff --git a/binutils/testsuite/ChangeLog b/binutils/testsuite/ChangeLog -index c579c69..52ddadc 100644 ---- a/binutils/testsuite/ChangeLog -+++ b/binutils/testsuite/ChangeLog -@@ -90,7 +90,7 @@ - - * binutils-all/localize-hidden-1.d: Allow for extra symbols in the - output. -- * binutils-all/strip-11.d: Skip for the RL78. -+ * binutils-all/strip-11.d: Skip for the RL78. - - 2015-07-14 H.J. Lu <hongjiu.lu@intel.com> - -@@ -98,9 +98,9 @@ - - 2015-07-10 H.J. Lu <hongjiu.lu@intel.com> - -- PR binutils/18656 -- * binutils-all/compress.exp (convert_test): New proc. -- Run conversion tests between x86-64 and x32. -+ PR binutils/18656 -+ * binutils-all/compress.exp (convert_test): New proc. -+ Run conversion tests between x86-64 and x32. - - 2015-07-10 H.J. Lu <hongjiu.lu@intel.com> - -diff --git a/binutils/testsuite/binutils-all/ar.exp b/binutils/testsuite/binutils-all/ar.exp -index 4c33874..e971350 100644 ---- a/binutils/testsuite/binutils-all/ar.exp -+++ b/binutils/testsuite/binutils-all/ar.exp -@@ -555,6 +555,45 @@ proc move_an_element { } { - pass $testname - } - -+# PR 19775: Test creating and listing archives with an empty element. +diff --git a/gas/ChangeLog b/gas/ChangeLog +index fa9ecbe..d6ab8a1 100644 +--- a/gas/ChangeLog ++++ b/gas/ChangeLog +@@ -1,3 +1,68 @@ ++2017-04-03 Palmer Dabbelt <palmer@dabbelt.com> + -+proc empty_archive { } { -+ global AR -+ global srcdir -+ global subdir ++ * config/tc-riscv.c (riscv_clear_subsets): Cast argument to free to ++ avoid const warnings. + -+ set testname "archive with empty element" ++2017-03-30 Palmer Dabbelt <palmer@dabbelt.com> + -+ # FIXME: There ought to be a way to dynamically create an empty file. -+ set empty $srcdir/$subdir/empty -+ -+ if [is_remote host] { -+ set archive artest.a -+ set objfile [remote_download host $empty] -+ remote_file host delete $archive -+ } else { -+ set archive tmpdir/artest.a -+ set objfile $empty -+ } ++ * config/tc-riscv.c (riscv_clear_subsets): New function. ++ (riscv_add_subset): Call riscv_clear_subsets and riscv_set_rvc to ++ clear RVC when it's been previously set. + -+ remote_file build delete tmpdir/artest.a ++2017-03-21 Palmer Dabbbelt <palmer@dabbelt.com> + -+ set got [binutils_run $AR "-r -c $archive ${objfile}"] -+ if ![string match "" $got] { -+ fail $testname -+ return -+ } ++ * config/tc-riscv.c (md_show_usage): Remove defuct -m32, -m64, ++ -msoft-float, -mhard-float, -mno-rvc, and -mrvc options; and don't ++ print an invalid default ISA string. ++ * doc/c-riscv.texi (OPTIONS): Add -fpic and -fno-pic options. + -+ # This commmand used to fail with: "Malformed archive". -+ set got [binutils_run $AR "-t $archive"] -+ if ![string match "empty
" $got] { -+ fail $testname -+ return -+ } ++2017-03-14 Kito Cheng <kito.cheng@gmail.com> + -+ pass $testname -+} ++ * config/tc-riscv.c (validate_riscv_insn): Add 'o' RVC immediate ++ encoding format, which can accept 0-valued immediates. ++ (riscv_ip): Likewise. + - # Run the tests. - - # Only run the bfdtest checks if the programs exist. Since these -@@ -574,6 +613,7 @@ argument_parsing - deterministic_archive - delete_an_element - move_an_element -+empty_archive - - if { [is_elf_format] - && ![istarget "*-*-hpux*"] -diff --git a/binutils/testsuite/binutils-all/compress.exp b/binutils/testsuite/binutils-all/compress.exp -index 4dac503..ac24812 100644 ---- a/binutils/testsuite/binutils-all/compress.exp -+++ b/binutils/testsuite/binutils-all/compress.exp -@@ -667,4 +667,97 @@ if { ([istarget "x86_64-*-elf*"] - - set testname "Convert x32 object to x86-64 (3)" - convert_test "$testname" "--nocompress-debug-sections --x32" "-O elf64-x86-64 --compress-debug-sections=zlib-gnu" -- } -+} ++2017-03-02 Kuan-Lin Chen <rufus@andestech.com> + -+proc test_gnu_debuglink {} { -+ global srcdir -+ global subdir -+ global env -+ global CC_FOR_TARGET -+ global STRIP -+ global OBJCOPY -+ global OBJDUMP ++ * config/tc-riscv.h (HWARD2_USE_FIXED_ADVANCE_PC): New define. + -+ set test "gnu-debuglink" -+ if {![info exists CC_FOR_TARGET]} { -+ set CC_FOR_TARGET $env(CC) -+ } -+ if { $CC_FOR_TARGET == "" } { -+ unsupported $test -+ return -+ } ++2017-03-02 Kuan-Lin Chen <rufus@andestech.com> + -+ if { [target_compile $srcdir/$subdir/testprog.c tmpdir/testprog exectuable debug] != "" } { -+ fail "$test (build)" -+ return -+ } -+ set got [remote_exec host "$OBJDUMP -S tmpdir/testprog" "" "/dev/null" "tmpdir/testprog.dump"] -+ if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]] } then { -+ fail "$test (objcopy dump)" -+ return -+ } -+ if { [binutils_run $STRIP "--strip-debug --remove-section=.comment --remove-section=.note tmpdir/testprog -o tmpdir/testprog.strip"] != "" } { -+ fail "$test (strip)" -+ return -+ } -+ if { [binutils_run $OBJCOPY "--only-keep-debug --decompress-debug-sections tmpdir/testprog tmpdir/testprog.decompress"] != "" } { -+ fail "$test (objcopy decompress)" -+ return -+ } -+ if { [binutils_run $OBJCOPY "--only-keep-debug --compress-debug-sections tmpdir/testprog tmpdir/testprog.compress"] != "" } { -+ fail "$test (objcopy compress)" -+ return -+ } -+ if { [binutils_run $OBJCOPY "--add-gnu-debuglink=tmpdir/testprog.decompress tmpdir/testprog.strip tmpdir/testprog"] != "" } { -+ fail "$test (objcopy link decompress)" -+ return -+ } -+ set got [remote_exec host "$OBJDUMP -S tmpdir/testprog" "" "/dev/null" "tmpdir/testprog.decompress.dump"] -+ if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]] } then { -+ fail "$test (objcopy dump decompress)" -+ return -+ } -+ if { [binutils_run $OBJCOPY "--add-gnu-debuglink=tmpdir/testprog.compress tmpdir/testprog.strip tmpdir/testprog"] != "" } { -+ fail "$test (objcopy link compress)" -+ return -+ } -+ set got [remote_exec host "$OBJDUMP -S tmpdir/testprog" "" "/dev/null" "tmpdir/testprog.compress.dump"] -+ if { [lindex $got 0] != 0 || ![string match "" [lindex $got 1]] } then { -+ fail "$test (objcopy dump compress)" -+ return -+ } ++ * config/tc-riscv.c (md_apply_fix): Set fx_frag and ++ fx_next->fx_frag for CFA_advance_loc relocations. + -+ set src1 tmpdir/testprog.dump -+ set src2 tmpdir/testprog.compress.dump -+ send_log "cmp ${src1} ${src2}\n" -+ verbose "cmp ${src1} ${src2}" -+ set status [remote_exec build cmp "${src1} ${src2}"] -+ set exec_output [lindex $status 1] -+ set exec_output [prune_warnings $exec_output] -+ if ![string match "" $exec_output] then { -+ send_log "$exec_output\n" -+ verbose "$exec_output" 1 -+ fail "$test (objdump 1)" -+ } else { -+ pass "$test (objdump 1)" -+ } ++2017-03-02 Kuan-Lin Chen <rufus@andestech.com> + -+ set src1 tmpdir/testprog.decompress.dump -+ set src2 tmpdir/testprog.compress.dump -+ send_log "cmp ${src1} ${src2}\n" -+ verbose "cmp ${src1} ${src2}" -+ set status [remote_exec build cmp "${src1} ${src2}"] -+ set exec_output [lindex $status 1] -+ set exec_output [prune_warnings $exec_output] -+ if ![string match "" $exec_output] then { -+ send_log "$exec_output\n" -+ verbose "$exec_output" 1 -+ fail "$test (objdump 2)" -+ } else { -+ pass "$test (objdump 2)" -+ } -+} ++ * config/tc-riscv.c (md_apply_fix): Compute the correct offsets ++ for CFA relocations. + -+if {[isnative] && [is_elf_format]} then { -+ test_gnu_debuglink -+} -diff --git a/binutils/testsuite/binutils-all/empty b/binutils/testsuite/binutils-all/empty -new file mode 100644 -index 0000000..e69de29 -diff --git a/elfcpp/ChangeLog b/elfcpp/ChangeLog -index 0f54787..f95130a 100644 ---- a/elfcpp/ChangeLog -+++ b/elfcpp/ChangeLog -@@ -339,11 +339,11 @@ - - 2009-10-16 Doug Kwan <dougkwan@google.com> - -- * elfcpp/elfcpp.h (DT_PREINIT_ARRAY): Correct enum value. -+ * elfcpp.h (DT_PREINIT_ARRAY): Correct enum value. - - 2009-10-09 Andrew Pinski <andrew_pinski@playstation.sony.com> - -- * elfcpp/elfcpp_file.h (Elf_file::section_name): Change shstr_size -+ * elfcpp_file.h (Elf_file::section_name): Change shstr_size - to Elf_WXword. - - 2009-10-09 Mikolaj Zalewski <mikolajz@google.com> -diff --git a/gas/ChangeLog b/gas/ChangeLog -index 534a954..96a8822 100644 ---- a/gas/ChangeLog -+++ b/gas/ChangeLog -@@ -1,3 +1,70 @@ -+2016-02-20 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-02-20 H.J. Lu <hongjiu.lu@intel.com> -+ -+ * config/tc-i386.c (register_number): Check RegVRex. -+ * testsuite/gas/i386/x86-64-avx512f.s: Add a test for vgatherqpd -+ with %zmm19 and %zmm3. -+ * testsuite/gas/i386/x86-64-avx512f-intel.d: Updated. -+ * testsuite/gas/i386/x86-64-avx512f.d: Likewise. -+ -+2016-02-03 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-02-03 H.J. Lu <hongjiu.lu@intel.com> ++2017-03-27 Alan Modra <amodra@gmail.com> + -+ PR gas/19520 -+ * NEWS: Mention new command line option -mrelax-relocations and -+ new configure option --enable-x86-relax-relocations for x86 -+ target. -+ * config.in: Regenerated. -+ * configure.ac: Add --enable-x86-relax-relocations. -+ (ac_default_x86_relax_relocations): New. Default to 1 except -+ for x86 Solaris targets older than Solaris 12. -+ (DEFAULT_GENERATE_X86_RELAX_RELOCATIONS): Define. -+ * configure: Likewise. -+ * config/tc-i386.c (generate_relax_relocations): New. -+ (OPTION_MRELAX_RELOCATIONS): Likewise. -+ (output_disp): Don't generate relax relocations if -+ generate_relax_relocations is 0. -+ (md_longopts): Add -mrelax-relocations. -+ (md_show_usage): Likewise. -+ (md_parse_option): Handle OPTION_MRELAX_RELOCATIONS. -+ * doc/c-i386.texi: Document -mrelax-relocations=. -+ * testsuite/gas/i386/got-no-relax.d: New file. -+ * testsuite/gas/i386/x86-64-gotpcrel-no-relax.d: Likewise. -+ * testsuite/gas/i386/got.d: Pass -mrelax-relocations=yes to as. -+ * testsuite/gas/i386/localpic.d: Likewise. -+ * testsuite/gas/i386/mixed-mode-reloc32.d: Likewise. -+ * testsuite/gas/i386/reloc32.d: Likewise. -+ * testsuite/gas/i386/x86-64-gotpcrel.d: Likewise. -+ * testsuite/gas/i386/x86-64-localpic.d: Likewise. -+ * testsuite/gas/i386/ilp32/x86-64-gotpcrel.d: Likewise. -+ * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise. -+ * testsuite/gas/i386/i386.exp: Run got-no-relax and -+ x86-64-gotpcrel-no-relax. ++ PR 21303 ++ * testsuite/gas/ppc/pr21303.d, ++ * testsuite/gas/ppc/pr21303.s: New test ++ * testsuite/gas/ppc/ppc.exp: Run it. + -+2016-02-03 H.J. Lu <hongjiu.lu@intel.com> ++2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + -+ Backport from master -+ 2016-02-03 H.J. Lu <hongjiu.lu@intel.com> ++ Backport from mainline ++ 2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + -+ * NEWS: Remove duplicated marker for 2.26. ++ * config/tc-s390.c (s390_parse_cpu): Remove S390_INSTR_FLAG_VX2 ++ from cpu_table. Remove vx2, and novx2 from cpu_flags. + -+2016-01-29 H.J. Lu <hongjiu.lu@intel.com> ++2017-03-08 Peter Bergner <bergner@vnet.ibm.com> + -+ Backport from master -+ 2016-01-29 H.J. Lu <hongjiu.lu@intel.com> ++ * testsuite/gas/ppc/altivec2.d (as): Use the -mpower8 option. ++ (objdump): Use the -Mpower8 option. + -+ PR gas/19532 -+ * configure.ac (compressed_debug_sections): Replace == with =. -+ * configure: Regenerated. ++2017-03-08 Peter Bergner <bergner@vnet.ibm.com> + -+2016-01-25 Tristan Gingold <gingold@adacore.com> -+ -+ * configure: Regenerate. ++ Apply from master. ++ 2017-03-08 Peter Bergner <bergner@vnet.ibm.com> ++ * testsuite/gas/ppc/power9.d <lnia> New test. ++ * testsuite/gas/ppc/power9.s: Likewise. + - 2016-01-25 Tristan Gingold <gingold@adacore.com> + 2017-03-02 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. -@@ -8,12 +75,8 @@ - - 2015-12-17 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> - -- * gas/config/tc-arm.c (aeabi_set_public_attributes): Adjust -+ * config/tc-arm.c (aeabi_set_public_attributes): Adjust - TAG_ARCH_profile for armv8-a. -- * gas/testsuite/gas/arm/armv8a-automatic-hlt.d: New test. -- * gas/testsuite/gas/arm/armv8a-automatic-hlt.s: New test. -- * gas/testsuite/gas/arm/armv8a-automatic-lda.d: New test. -- * gas/testsuite/gas/arm/armv8a-automatic-lda.s: New test. - - 2015-12-15 Nick Clifton <nickc@redhat.com> - -@@ -320,10 +383,10 @@ - - 2015-10-07 Claudiu Zissulescu <claziss@synopsys.com> - -- * config/tc-arc.c: Revamped file for ARC support. -- * config/tc-arc.h: Likewise. -- * doc/as.texinfo: Add new ARC options. -- * doc/c-arc.texi: Likewise. -+ * config/tc-arc.c: Revamped file for ARC support. -+ * config/tc-arc.h: Likewise. -+ * doc/as.texinfo: Add new ARC options. -+ * doc/c-arc.texi: Likewise. - - 2015-10-02 Renlin Li <renlin.li@arm.com> - -@@ -572,9 +635,9 @@ - - 2015-08-17 Alan Modra <amodra@gmail.com> - -- * gas/config/tc-arm.c (s_align): Delete. -+ * config/tc-arm.c (s_align): Delete. - (md_pseudo_table): Use s_align_ptwo for "align". -- * gas/config/tc-arm.h (TC_ALIGN_ZERO_IS_DEFAULT): Define. -+ * config/tc-arm.h (TC_ALIGN_ZERO_IS_DEFAULT): Define. - * read.c (s_align): Modify for TC_ALIGN_ZERO_IS_DEFAULT. - - 2015-08-13 Alan Modra <amodra@gmail.com> -@@ -952,7 +1015,7 @@ - 2015-06-11 John David Anglin <danglin@gcc.gnu.org> - - PR gas/18427 -- * gas/config/tc-hppa.c (last_label_symbol): Declare. -+ * config/tc-hppa.c (last_label_symbol): Declare. - (pa_get_label): Return last label in current space/segment or NULL. - (pa_define_label): Record last label and add to root. - (pa_undefine_label): Remove last label from root. -@@ -1028,7 +1091,6 @@ - Bernd Schmidt <bernds@codesourcery.com> - Paul Brook <paul@codesourcery.com> - -- gas/ - * config/tc-alpha.c (all_cfi_sections): Declare. - (s_alpha_ent): Initialize all_cfi_sections. - (alpha_elf_md_end): Invoke cfi_set_sections. -@@ -1796,7 +1858,7 @@ - - 2015-01-12 Jan Beulich <jbeulich@suse.com> - -- * gas/dw2gencfi.c (cfi_add_label, dot_cfi_label): New. -+ * dw2gencfi.c (cfi_add_label, dot_cfi_label): New. - (cfi_pseudo_table): Add "cfi_label". - (output_cfi_insn): Handle CFI_label. - (select_cie_for_fde): Als terminate CIE when encountering -@@ -1809,7 +1871,7 @@ - - 2015-01-12 Jan Beulich <jbeulich@suse.com> - -- * gas/config/tc-arm.c (do_neon_shl_imm): Check immediate range. -+ * config/tc-arm.c (do_neon_shl_imm): Check immediate range. - (do_neon_qshl_imm): Likewise. - - 2015-01-12 Alan Modra <amodra@gmail.com> -diff --git a/gas/NEWS b/gas/NEWS -index 2cb2fab..e20a073 100644 ---- a/gas/NEWS -+++ b/gas/NEWS -@@ -1,5 +1,12 @@ - -*- text -*- - -+* Add a configure option --enable-x86-relax-relocations to decide whether -+ x86 assembler should generate relax relocations by default. Default to -+ yes, except for x86 Solaris targets older than Solaris 12. -+ -+* New command line option -mrelax-relocations= for x86 target to control -+ whether to generate relax relocations. -+ - Changes in 2.26: - - * Add a configure option --enable-compressed-debug-sections={all,gas} to -@@ -8,8 +15,6 @@ Changes in 2.26: - * Add support for the ARC EM/HS, and ARC600/700 architectures. Remove - assembler support for Argonaut RISC architectures. +diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c +index ec5b0bb..88457c6 100644 +--- a/gas/config/tc-riscv.c ++++ b/gas/config/tc-riscv.c +@@ -121,6 +121,18 @@ riscv_subset_supports (const char *feature) + } --Changes in 2.26: -- - * Symbol and label names can now be enclosed in double quotes (") which allows - them to contain characters that are not part of valid symbol names in high - level languages. -diff --git a/gas/config.in b/gas/config.in -index 35c8202..8b040fc 100644 ---- a/gas/config.in -+++ b/gas/config.in -@@ -39,6 +39,9 @@ - /* Define if you want compressed debug sections by default. */ - #undef DEFAULT_FLAG_COMPRESS_DEBUG - -+/* Define to 1 if you want to generate x86 relax relocations by default. */ -+#undef DEFAULT_GENERATE_X86_RELAX_RELOCATIONS -+ - /* Supported emulations. */ - #undef EMULATIONS - -diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c -index 1573043..8676c5f 100644 ---- a/gas/config/tc-i386.c -+++ b/gas/config/tc-i386.c -@@ -552,6 +552,10 @@ static int allow_index_reg = 0; - specified explicitly. */ - static int omit_lock_prefix = 0; - -+/* 1 if the assembler should generate relax relocations. */ -+static int generate_relax_relocations -+ = DEFAULT_GENERATE_X86_RELAX_RELOCATIONS; + static void ++riscv_clear_subsets (void) ++{ ++ while (riscv_subsets != NULL) ++ { ++ struct riscv_subset *next = riscv_subsets->next; ++ free ((void *) riscv_subsets->name); ++ free (riscv_subsets); ++ riscv_subsets = next; ++ } ++} + - static enum check_kind - { - check_none = 0, -@@ -1871,6 +1875,9 @@ register_number (const reg_entry *r) - if (r->reg_flags & RegRex) - nr += 8; ++static void + riscv_add_subset (const char *subset) + { + struct riscv_subset *s = xmalloc (sizeof *s); +@@ -139,6 +151,8 @@ riscv_set_arch (const char *s) + const char *extension = NULL; + const char *p = s; -+ if (r->reg_flags & RegVRex) -+ nr += 16; ++ riscv_clear_subsets(); + - return nr; - } - -@@ -7241,9 +7248,14 @@ output_disp (fragS *insn_start_frag, offsetT insn_start_off) - /* Check for "call/jmp *mem", "mov mem, %reg", - "test %reg, mem" and "binop mem, %reg" where binop - is one of adc, add, and, cmp, or, sbb, sub, xor -- instructions. */ -- if ((i.rm.mode == 2 -- || (i.rm.mode == 0 && i.rm.regmem == 5)) -+ instructions. Always generate R_386_GOT32X for -+ "sym*GOT" operand in 32-bit mode. */ -+ if ((generate_relax_relocations -+ || (!object_64bit -+ && i.rm.mode == 0 -+ && i.rm.regmem == 5)) -+ && (i.rm.mode == 2 -+ || (i.rm.mode == 0 && i.rm.regmem == 5)) - && ((i.operands == 1 - && i.tm.base_opcode == 0xff - && (i.rm.reg == 2 || i.rm.reg == 4)) -@@ -9616,6 +9628,7 @@ const char *md_shortopts = "qn"; - #define OPTION_MSHARED (OPTION_MD_BASE + 21) - #define OPTION_MAMD64 (OPTION_MD_BASE + 22) - #define OPTION_MINTEL64 (OPTION_MD_BASE + 23) -+#define OPTION_MRELAX_RELOCATIONS (OPTION_MD_BASE + 24) - - struct option md_longopts[] = + if (strncmp (p, "rv32", 4) == 0) + { + xlen = 32; +@@ -500,6 +514,7 @@ validate_riscv_insn (const struct riscv_opcode *opc) + case 'c': break; /* RS1, constrained to equal sp */ + case 'i': used_bits |= ENCODE_RVC_SIMM3(-1U); break; + case 'j': used_bits |= ENCODE_RVC_IMM (-1U); break; ++ case 'o': used_bits |= ENCODE_RVC_IMM (-1U); break; + case 'k': used_bits |= ENCODE_RVC_LW_IMM (-1U); break; + case 'l': used_bits |= ENCODE_RVC_LD_IMM (-1U); break; + case 'm': used_bits |= ENCODE_RVC_LWSP_IMM (-1U); break; +@@ -1321,6 +1336,13 @@ rvc_imm_done: + ip->insn_opcode |= + ENCODE_RVC_LDSP_IMM (imm_expr->X_add_number); + goto rvc_imm_done; ++ case 'o': ++ if (my_getSmallExpression (imm_expr, imm_reloc, s, p) ++ || imm_expr->X_op != O_constant ++ || !VALID_RVC_IMM (imm_expr->X_add_number)) ++ break; ++ ip->insn_opcode |= ENCODE_RVC_IMM (imm_expr->X_add_number); ++ goto rvc_imm_done; + case 'K': + if (my_getSmallExpression (imm_expr, imm_reloc, s, p) + || imm_expr->X_op != O_constant +@@ -1794,6 +1816,7 @@ riscv_after_parse_args (void) + riscv_set_arch (xlen == 64 ? "rv64g" : "rv32g"); + + /* Add the RVC extension, regardless of -march, to support .option rvc. */ ++ riscv_set_rvc (FALSE); + if (riscv_subset_supports ("c")) + riscv_set_rvc (TRUE); + else +@@ -1837,6 +1860,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) + unsigned int subtype; + bfd_byte *buf = (bfd_byte *) (fixP->fx_frag->fr_literal + fixP->fx_where); + bfd_boolean relaxable = FALSE; ++ offsetT loc; + + /* Remember value for tc_gen_reloc. */ + fixP->fx_addnumber = *valP; +@@ -1922,30 +1946,31 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) + + case BFD_RELOC_RISCV_CFA: + /* Load the byte to get the subtype. */ +- subtype = bfd_get_8 (NULL, &fixP->fx_frag->fr_literal[fixP->fx_where]); ++ subtype = bfd_get_8 (NULL, &((fragS *) (fixP->fx_frag->fr_opcode))->fr_literal[fixP->fx_where]); ++ loc = fixP->fx_frag->fr_fix - (subtype & 7); + switch (subtype) + { + case DW_CFA_advance_loc1: +- fixP->fx_where++; +- fixP->fx_next->fx_where++; ++ fixP->fx_where = loc + 1; ++ fixP->fx_next->fx_where = loc + 1; + fixP->fx_r_type = BFD_RELOC_RISCV_SET8; + fixP->fx_next->fx_r_type = BFD_RELOC_RISCV_SUB8; + break; + + case DW_CFA_advance_loc2: + fixP->fx_size = 2; +- fixP->fx_where++; + fixP->fx_next->fx_size = 2; +- fixP->fx_next->fx_where++; ++ fixP->fx_where = loc + 1; ++ fixP->fx_next->fx_where = loc + 1; + fixP->fx_r_type = BFD_RELOC_RISCV_SET16; + fixP->fx_next->fx_r_type = BFD_RELOC_RISCV_SUB16; + break; + + case DW_CFA_advance_loc4: + fixP->fx_size = 4; +- fixP->fx_where++; + fixP->fx_next->fx_size = 4; +- fixP->fx_next->fx_where++; ++ fixP->fx_where = loc; ++ fixP->fx_next->fx_where = loc; + fixP->fx_r_type = BFD_RELOC_RISCV_SET32; + fixP->fx_next->fx_r_type = BFD_RELOC_RISCV_SUB32; + break; +@@ -1954,6 +1979,8 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) + if (subtype < 0x80 && (subtype & 0x40)) + { + /* DW_CFA_advance_loc */ ++ fixP->fx_frag = (fragS *) fixP->fx_frag->fr_opcode; ++ fixP->fx_next->fx_frag = fixP->fx_frag; + fixP->fx_r_type = BFD_RELOC_RISCV_SET6; + fixP->fx_next->fx_r_type = BFD_RELOC_RISCV_SUB6; + } +@@ -2069,7 +2096,6 @@ riscv_pre_output_hook (void) + { + if (frag->fr_type == rs_cfa) + { +- fragS *loc4_frag; + expressionS exp; + + symbolS *add_symbol = frag->fr_symbol->sy_value.X_add_symbol; +@@ -2080,8 +2106,7 @@ riscv_pre_output_hook (void) + exp.X_add_number = 0; + exp.X_op_symbol = op_symbol; + +- loc4_frag = (fragS *) frag->fr_opcode; +- fix_new_exp (loc4_frag, (int) frag->fr_offset, 1, &exp, 0, ++ fix_new_exp (frag, (int) frag->fr_offset, 1, &exp, 0, + BFD_RELOC_RISCV_CFA); + } + } +@@ -2455,15 +2480,10 @@ md_show_usage (FILE *stream) { -@@ -9647,6 +9660,7 @@ struct option md_longopts[] = - {"mbig-obj", no_argument, NULL, OPTION_MBIG_OBJ}, - #endif - {"momit-lock-prefix", required_argument, NULL, OPTION_OMIT_LOCK_PREFIX}, -+ {"mrelax-relocations", required_argument, NULL, OPTION_MRELAX_RELOCATIONS}, - {"mevexrcig", required_argument, NULL, OPTION_MEVEXRCIG}, - {"mamd64", no_argument, NULL, OPTION_MAMD64}, - {"mintel64", no_argument, NULL, OPTION_MINTEL64}, -@@ -9966,6 +9980,15 @@ md_parse_option (int c, char *arg) - as_fatal (_("invalid -momit-lock-prefix= option: `%s'"), arg); - break; - -+ case OPTION_MRELAX_RELOCATIONS: -+ if (strcasecmp (arg, "yes") == 0) -+ generate_relax_relocations = 1; -+ else if (strcasecmp (arg, "no") == 0) -+ generate_relax_relocations = 0; -+ else -+ as_fatal (_("invalid -mrelax-relocations= option: `%s'"), arg); -+ break; -+ - case OPTION_MAMD64: - cpu_arch_flags.bitfield.cpuamd64 = 1; - cpu_arch_flags.bitfield.cpuintel64 = 0; -@@ -10146,6 +10169,9 @@ md_show_usage (FILE *stream) - -momit-lock-prefix=[no|yes]\n\ - strip all lock prefixes\n")); fprintf (stream, _("\ -+ -mrelax-relocations=[no|yes]\n\ -+ generate relax relocations\n")); -+ fprintf (stream, _("\ - -mamd64 accept only AMD64 ISA\n")); - fprintf (stream, _("\ - -mintel64 accept only Intel64 ISA\n")); -diff --git a/gas/configure b/gas/configure -index f959e95..dd9c953 100755 ---- a/gas/configure -+++ b/gas/configure -@@ -1,6 +1,6 @@ - #! /bin/sh - # Guess values for system-dependent variables and create Makefiles. --# Generated by GNU Autoconf 2.64 for gas 2.26. -+# Generated by GNU Autoconf 2.64 for gas 2.26.0. - # - # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, - # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software -@@ -556,8 +556,8 @@ MAKEFLAGS= - # Identity of this package. - PACKAGE_NAME='gas' - PACKAGE_TARNAME='gas' --PACKAGE_VERSION='2.26' --PACKAGE_STRING='gas 2.26' -+PACKAGE_VERSION='2.26.0' -+PACKAGE_STRING='gas 2.26.0' - PACKAGE_BUGREPORT='' - PACKAGE_URL='' - -@@ -765,6 +765,7 @@ enable_largefile - enable_targets - enable_checking - enable_compressed_debug_sections -+enable_x86_relax_relocations - enable_werror - enable_build_warnings - enable_nls -@@ -1323,7 +1324,7 @@ if test "$ac_init_help" = "long"; then - # Omit some internal or obsolete options to make the list less imposing. - # This message is too long to be a string in the A/UX 3.1 sh. - cat <<_ACEOF --\`configure' configures gas 2.26 to adapt to many kinds of systems. -+\`configure' configures gas 2.26.0 to adapt to many kinds of systems. - - Usage: $0 [OPTION]... [VAR=VALUE]... - -@@ -1394,7 +1395,7 @@ fi - - if test -n "$ac_init_help"; then - case $ac_init_help in -- short | recursive ) echo "Configuration of gas 2.26:";; -+ short | recursive ) echo "Configuration of gas 2.26.0:";; - esac - cat <<\_ACEOF - -@@ -1415,6 +1416,8 @@ Optional Features: - --enable-checking enable run-time checks - --enable-compressed-debug-sections={all,gas,none} - compress debug sections by default] -+ --enable-x86-relax-relocations -+ generate x86 relax relocations by default - --enable-werror treat compile warnings as errors - --enable-build-warnings enable build-time compiler warnings - --disable-nls do not use Native Language Support -@@ -1510,7 +1513,7 @@ fi - test -n "$ac_init_help" && exit $ac_status - if $ac_init_version; then - cat <<\_ACEOF --gas configure 2.26 -+gas configure 2.26.0 - generated by GNU Autoconf 2.64 - - Copyright (C) 2009 Free Software Foundation, Inc. -@@ -1920,7 +1923,7 @@ cat >config.log <<_ACEOF - This file contains any messages produced by compilers while - running configure, to aid debugging if configure makes a mistake. - --It was created by gas $as_me 2.26, which was -+It was created by gas $as_me 2.26.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - $ $0 $@ -@@ -3728,7 +3731,7 @@ fi - - # Define the identity of the package. - PACKAGE='gas' -- VERSION='2.26' -+ VERSION='2.26.0' - - - cat >>confdefs.h <<_ACEOF -@@ -10972,7 +10975,7 @@ else - lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 - lt_status=$lt_dlunknown - cat > conftest.$ac_ext <<_LT_EOF --#line 10975 "configure" -+#line 10978 "configure" - #include "confdefs.h" - - #if HAVE_DLFCN_H -@@ -11078,7 +11081,7 @@ else - lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 - lt_status=$lt_dlunknown - cat > conftest.$ac_ext <<_LT_EOF --#line 11081 "configure" -+#line 11084 "configure" - #include "confdefs.h" - - #if HAVE_DLFCN_H -@@ -11680,6 +11683,17 @@ if test "${enable_compressed_debug_sections+set}" = set; then : - esac - fi - -+# PR gas/19520 -+# Decide if x86 assembler should generate relax relocations. -+ac_default_x86_relax_relocations=unset -+# Provide a configure time option to override our default. -+# Check whether --enable-x86_relax_relocations was given. -+if test "${enable_x86_relax_relocations+set}" = set; then : -+ enableval=$enable_x86_relax_relocations; case "${enableval}" in -+ no) ac_default_x86_relax_relocations=0 ;; -+esac -+fi -+ - using_cgen=no - - -@@ -12085,6 +12099,17 @@ $as_echo "#define STRICTCOFF 1" >>confdefs.h - - ;; - -+ i386-*-solaris2 \ -+ | x86_64-*-solaris2 \ -+ | i386-*-solaris2.[0-9] \ -+ | i386-*-solaris2.1[01] \ -+ | x86_64-*-solaris2.1[01]) -+ if test ${this_target} = $target \ -+ && test ${ac_default_x86_relax_relocations} = unset; then -+ ac_default_x86_relax_relocations=0 -+ fi -+ ;; -+ - i860-*-*) - { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: GAS support for ${generic_target} is preliminary and a work in progress" >&5 - $as_echo "$as_me: WARNING: GAS support for ${generic_target} is preliminary and a work in progress" >&2;} -@@ -12505,7 +12530,16 @@ _ACEOF - - done - --if test x$ac_default_compressed_debug_sections == xyes ; then -+if test ${ac_default_x86_relax_relocations} = unset; then -+ ac_default_x86_relax_relocations=1 -+fi -+ -+cat >>confdefs.h <<_ACEOF -+#define DEFAULT_GENERATE_X86_RELAX_RELOCATIONS $ac_default_x86_relax_relocations -+_ACEOF -+ -+ -+if test x$ac_default_compressed_debug_sections = xyes ; then - - $as_echo "#define DEFAULT_FLAG_COMPRESS_DEBUG 1" >>confdefs.h - -@@ -15029,7 +15063,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 - # report actual input values of CONFIG_FILES etc. instead of their - # values after options handling. - ac_log=" --This file was extended by gas $as_me 2.26, which was -+This file was extended by gas $as_me 2.26.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - CONFIG_FILES = $CONFIG_FILES -@@ -15093,7 +15127,7 @@ Report bugs to the package provider." - _ACEOF - cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 - ac_cs_version="\\ --gas config.status 2.26 -+gas config.status 2.26.0 - configured by $0, generated by GNU Autoconf 2.64, - with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" - -diff --git a/gas/configure.ac b/gas/configure.ac -index 07f825d..0e22593 100644 ---- a/gas/configure.ac -+++ b/gas/configure.ac -@@ -77,6 +77,17 @@ AC_ARG_ENABLE(compressed_debug_sections, - *) ac_default_compressed_debug_sections=unset ;; - esac])dnl - -+# PR gas/19520 -+# Decide if x86 assembler should generate relax relocations. -+ac_default_x86_relax_relocations=unset -+# Provide a configure time option to override our default. -+AC_ARG_ENABLE(x86_relax_relocations, -+ AS_HELP_STRING([--enable-x86-relax-relocations], -+ [generate x86 relax relocations by default]), -+[case "${enableval}" in -+ no) ac_default_x86_relax_relocations=0 ;; -+esac])dnl -+ - using_cgen=no - - AM_BINUTILS_WARNINGS -@@ -168,6 +179,17 @@ for this_target in $target $canon_targets ; do - AC_DEFINE(STRICTCOFF, 1, [Using strict COFF?]) - ;; - -+ i386-*-solaris2 \ -+ | x86_64-*-solaris2 \ -+ | i386-*-solaris2.[[0-9]] \ -+ | i386-*-solaris2.1[[01]] \ -+ | x86_64-*-solaris2.1[[01]]) -+ if test ${this_target} = $target \ -+ && test ${ac_default_x86_relax_relocations} = unset; then -+ ac_default_x86_relax_relocations=0 -+ fi -+ ;; -+ - i860-*-*) - AC_MSG_WARN(GAS support for ${generic_target} is preliminary and a work in progress) - ;; -@@ -549,7 +571,14 @@ changequote([,])dnl - - done - --if test x$ac_default_compressed_debug_sections == xyes ; then -+if test ${ac_default_x86_relax_relocations} = unset; then -+ ac_default_x86_relax_relocations=1 -+fi -+AC_DEFINE_UNQUOTED(DEFAULT_GENERATE_X86_RELAX_RELOCATIONS, -+ $ac_default_x86_relax_relocations, -+ [Define to 1 if you want to generate x86 relax relocations by default.]) -+ -+if test x$ac_default_compressed_debug_sections = xyes ; then - AC_DEFINE(DEFAULT_FLAG_COMPRESS_DEBUG, 1, [Define if you want compressed debug sections by default.]) - fi - -diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi -index 4af05e3..7eb1fbc 100644 ---- a/gas/doc/c-i386.texi -+++ b/gas/doc/c-i386.texi -@@ -327,6 +327,18 @@ single-thread computers - @option{-momit-lock-prefix=@var{no}} will encode lock prefix as usual, - which is the default. - -+@cindex @samp{-mrelax-relocations=} option, i386 -+@cindex @samp{-mrelax-relocations=} option, x86-64 -+@item -mrelax-relocations=@var{no} -+@itemx -mrelax-relocations=@var{yes} -+These options control whether the assembler should generate relax -+relocations, R_386_GOT32X, in 32-bit mode, or R_X86_64_GOTPCRELX and -+R_X86_64_REX_GOTPCRELX, in 64-bit mode. -+@option{-mrelax-relocations=@var{yes}} will generate relax relocations. -+@option{-mrelax-relocations=@var{no}} will not generate relax -+relocations. The default can be controlled by a configure option -+@option{--enable-x86-relax-relocations}. -+ - @cindex @samp{-mevexrcig=} option, i386 - @cindex @samp{-mevexrcig=} option, x86-64 - @item -mevexrcig=@var{rne} -diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog -index 4c86c8c..2c01d7b 100644 ---- a/gas/testsuite/ChangeLog -+++ b/gas/testsuite/ChangeLog -@@ -15,6 +15,13 @@ - * gas/arm/armv8-a.d: <ldaexh>: Rename mismatched mnemonics ... - <ldah>: ... to this. - -+2015-12-17 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> -+ -+ * gas/arm/armv8a-automatic-hlt.d: New test. -+ * gas/arm/armv8a-automatic-hlt.s: New test. -+ * gas/arm/armv8a-automatic-lda.d: New test. -+ * gas/arm/armv8a-automatic-lda.s: New test. -+ - 2015-12-15 Matthew Wahab <matthew.wahab@arm.com> - - * gas/aarch64/advsimd-fp16.d: Update expected output. -@@ -153,7 +160,7 @@ - Apply from master. - 2015-11-19 Alan Modra <amodra@gmail.com> - * gas/ppc/altivec3.d: Allow for padding at end of section. -- * gas/testsuite/gas/ppc/power9.d: Likewise. -+ * gas/ppc/power9.d: Likewise. - - 2015-12-09 H.J. Lu <hongjiu.lu@intel.com> - -@@ -207,8 +214,8 @@ - - 2015-10-28 Andre Vieira <andre.simoesdiasvieira@arm.com> - -- * gas/arm/pinsn.s: New. -- * gas/arm/pinsn.d: Likewise. -+ * gas/arm/pinsn.s: New. -+ * gas/arm/pinsn.d: Likewise. - - 2015-10-27 Nick Clifton <nickc@redhat.com> - -@@ -385,8 +392,8 @@ - - 2015-10-02 Renlin Li <renlin.li@arm.com> - -- * gas/aarch64/reloc-tlsgd_g0_nc.d: New. -- * gas/aarch64/reloc-tlsgd_g0_nc.s: New. -+ * gas/aarch64/reloc-tlsgd_g0_nc.d: New. -+ * gas/aarch64/reloc-tlsgd_g0_nc.s: New. - - 2015-10-02 Renlin Li <renlin.li@arm.com> - -@@ -958,9 +965,7 @@ - 2015-05-28 Catherine Moore <clm@codesourcery.com> - Bernd Schmidt <bernds@codesourcery.com> + RISC-V options:\n\ +- -m32 assemble RV32 code\n\ +- -m64 assemble RV64 code (default)\n\ + -fpic generate position-independent code\n\ + -fno-pic don't generate position-independent code (default)\n\ +- -msoft-float don't use F registers for floating-point values\n\ +- -mhard-float use F registers for floating-point values (default)\n\ +- -mno-rvc disable the C extension for compressed instructions (default)\n\ +- -mrvc enable the C extension for compressed instructions\n\ +- -march=ISA set the RISC-V architecture, RV64IMAFD by default\n\ ++ -march=ISA set the RISC-V architecture\n\ ++ -mabi=ABI set the RISC-V ABI\n\ + ")); + } -- gas/testsuite/ - * gas/mips/mips.exp: Run new tests. -- - * gas/mips/compact-eh-1.s: New file. - * gas/mips/compact-eh-2.s: New file. - * gas/mips/compact-eh-3.s: New file. -diff --git a/gas/testsuite/gas/i386/got-no-relax.d b/gas/testsuite/gas/i386/got-no-relax.d +diff --git a/gas/config/tc-riscv.h b/gas/config/tc-riscv.h +index ae8d60e..e92b387 100644 +--- a/gas/config/tc-riscv.h ++++ b/gas/config/tc-riscv.h +@@ -112,4 +112,7 @@ extern int tc_riscv_regname_to_dw2regnum (char *); + #define elf_tc_final_processing riscv_elf_final_processing + extern void riscv_elf_final_processing (void); + ++/* Adjust debug_line after relaxation. */ ++#define DWARF2_USE_FIXED_ADVANCE_PC 1 ++ + #endif /* TC_RISCV */ +diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c +index 7c8087e..dccbe2c 100644 +--- a/gas/config/tc-s390.c ++++ b/gas/config/tc-s390.c +@@ -291,7 +291,7 @@ s390_parse_cpu (const char * arg, + { STRING_COMMA_LEN ("z13"), STRING_COMMA_LEN ("arch11"), + S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }, + { STRING_COMMA_LEN ("arch12"), STRING_COMMA_LEN (""), +- S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX | S390_INSTR_FLAG_VX2 } ++ S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX } + }; + static struct + { +@@ -303,9 +303,7 @@ s390_parse_cpu (const char * arg, + { "htm", S390_INSTR_FLAG_HTM, TRUE }, + { "nohtm", S390_INSTR_FLAG_HTM, FALSE }, + { "vx", S390_INSTR_FLAG_VX, TRUE }, +- { "novx", S390_INSTR_FLAG_VX, FALSE }, +- { "vx2", S390_INSTR_FLAG_VX2, TRUE }, +- { "novx2", S390_INSTR_FLAG_VX2, FALSE } ++ { "novx", S390_INSTR_FLAG_VX, FALSE } + }; + unsigned int icpu; + char *ilp_bak; +diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi +index 0fa1b58..2efba4b 100644 +--- a/gas/doc/c-riscv.texi ++++ b/gas/doc/c-riscv.texi +@@ -26,6 +26,14 @@ The following table lists all availiable RISC-V specific options + @c man begin OPTIONS + @table @gcctabopt + ++@cindex @samp{-fpic} option, RISC-V ++@item -fpic ++Generate position-independent code ++ ++@cindex @samp{-fno-pic} option, RISC-V ++@item -fno-pic ++Don't generate position-independent code (default) ++ + @cindex @samp{-march=ISA} option, RISC-V + @item -march=ISA + Select the base isa, as specified by ISA. For example -march=rv32ima. +diff --git a/gas/testsuite/gas/ppc/altivec2.d b/gas/testsuite/gas/ppc/altivec2.d +index fc10fb5..26f9afa 100644 +--- a/gas/testsuite/gas/ppc/altivec2.d ++++ b/gas/testsuite/gas/ppc/altivec2.d +@@ -1,5 +1,5 @@ +-#as: -maltivec +-#objdump: -dr -Maltivec ++#as: -mpower8 ++#objdump: -dr -Mpower8 + #name: Altivec ISA 2.07 instructions + + .* +diff --git a/gas/testsuite/gas/ppc/power9.d b/gas/testsuite/gas/ppc/power9.d +index 9ba53d0..a67898f 100644 +--- a/gas/testsuite/gas/ppc/power9.d ++++ b/gas/testsuite/gas/ppc/power9.d +@@ -312,8 +312,9 @@ Disassembly of section \.text: + .*: (f1 31 9d 6f|6f 9d 31 f1) xscvdphp vs41,vs51 + .*: (f1 58 a7 6f|6f a7 58 f1) xvcvhpsp vs42,vs52 + .*: (f1 79 af 6f|6f af 79 f1) xvcvsphp vs43,vs53 +-.*: (4c 60 00 04|04 00 60 4c) addpcis r3,0 +-.*: (4c 60 00 04|04 00 60 4c) addpcis r3,0 ++.*: (4c 60 00 04|04 00 60 4c) lnia r3 ++.*: (4c 60 00 04|04 00 60 4c) lnia r3 ++.*: (4c 60 00 04|04 00 60 4c) lnia r3 + .*: (4c 80 00 05|05 00 80 4c) addpcis r4,1 + .*: (4c 80 00 05|05 00 80 4c) addpcis r4,1 + .*: (4c bf ff c4|c4 ff bf 4c) addpcis r5,-2 +diff --git a/gas/testsuite/gas/ppc/power9.s b/gas/testsuite/gas/ppc/power9.s +index 27f1122..4e3530f 100644 +--- a/gas/testsuite/gas/ppc/power9.s ++++ b/gas/testsuite/gas/ppc/power9.s +@@ -303,6 +303,7 @@ power9: + xscvdphp 41,51 + xvcvhpsp 42,52 + xvcvsphp 43,53 ++ lnia 3 + addpcis 3,0 + subpcis 3,0 + addpcis 4,1 +diff --git a/gas/testsuite/gas/ppc/ppc.exp b/gas/testsuite/gas/ppc/ppc.exp +index 86db455..55367ad 100644 +--- a/gas/testsuite/gas/ppc/ppc.exp ++++ b/gas/testsuite/gas/ppc/ppc.exp +@@ -50,6 +50,7 @@ if { [istarget powerpc*-*-*] } then { + run_dump_test "common" + run_dump_test "476" + run_dump_test "a2" ++ run_dump_test "pr21303" + if { ![istarget powerpc*le-*-*] } then { + run_dump_test "vle" + run_dump_test "vle-reloc" +diff --git a/gas/testsuite/gas/ppc/pr21303.d b/gas/testsuite/gas/ppc/pr21303.d new file mode 100644 -index 0000000..6bf138a +index 0000000..64761a4 --- /dev/null -+++ b/gas/testsuite/gas/i386/got-no-relax.d -@@ -0,0 +1,31 @@ -+#source: got.s -+#as: -mrelax-relocations=no -+#objdump: -dwr -+ -+.*: +file format .* ++++ b/gas/testsuite/gas/ppc/pr21303.d +@@ -0,0 +1,12 @@ ++#objdump: -d -Me200z4 ++#as: -a32 -mbig -me200z4 + ++.* + -+Disassembly of section .text: ++Disassembly of section \.text: + -+0+ <_start>: -+[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax 1: R_386_GOT32 foo -+[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0,%eax 7: R_386_GOT32X foo -+[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%eax\),%eax d: R_386_GOT32 foo -+[ ]*[a-f0-9]+: 05 00 00 00 00 add \$0x0,%eax 12: R_386_GOT32 foo -+[ ]*[a-f0-9]+: 03 05 00 00 00 00 add 0x0,%eax 18: R_386_GOT32X foo -+[ ]*[a-f0-9]+: 03 80 00 00 00 00 add 0x0\(%eax\),%eax 1e: R_386_GOT32 foo -+[ ]*[a-f0-9]+: ff 15 00 00 00 00 call \*0x0 24: R_386_GOT32X foo -+[ ]*[a-f0-9]+: ff 90 00 00 00 00 call \*0x0\(%eax\) 2a: R_386_GOT32 foo -+[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmp \*0x0 30: R_386_GOT32X foo -+[ ]*[a-f0-9]+: ff a0 00 00 00 00 jmp \*0x0\(%eax\) 36: R_386_GOT32 foo -+[ ]*[a-f0-9]+: b8 00 00 00 00 mov \$0x0,%eax 3b: R_386_GOT32 foo -+[ ]*[a-f0-9]+: 8b 05 00 00 00 00 mov 0x0,%eax 41: R_386_GOT32X foo -+[ ]*[a-f0-9]+: 8b 80 00 00 00 00 mov 0x0\(%eax\),%eax 47: R_386_GOT32 foo -+[ ]*[a-f0-9]+: 05 00 00 00 00 add \$0x0,%eax 4c: R_386_GOT32 foo -+[ ]*[a-f0-9]+: 03 05 00 00 00 00 add 0x0,%eax 52: R_386_GOT32X foo -+[ ]*[a-f0-9]+: 03 80 00 00 00 00 add 0x0\(%eax\),%eax 58: R_386_GOT32 foo -+[ ]*[a-f0-9]+: ff 90 00 00 00 00 call \*0x0\(%eax\) 5e: R_386_GOT32 foo -+[ ]*[a-f0-9]+: ff 15 00 00 00 00 call \*0x0 64: R_386_GOT32X foo -+[ ]*[a-f0-9]+: ff a0 00 00 00 00 jmp \*0x0\(%eax\) 6a: R_386_GOT32 foo -+[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmp \*0x0 70: R_386_GOT32X foo -+#pass -diff --git a/gas/testsuite/gas/i386/got.d b/gas/testsuite/gas/i386/got.d -index f76ca47..7621cdf 100644 ---- a/gas/testsuite/gas/i386/got.d -+++ b/gas/testsuite/gas/i386/got.d -@@ -1,3 +1,4 @@ -+#as: -mrelax-relocations=yes - #objdump: -dwr - - .*: +file format .* -diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp -index d881cd8..9ad7a9e 100644 ---- a/gas/testsuite/gas/i386/i386.exp -+++ b/gas/testsuite/gas/i386/i386.exp -@@ -406,6 +406,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] - run_dump_test "relax-4" - - run_dump_test "got" -+ run_dump_test "got-no-relax" - - if {![istarget "*-*-nacl*"]} then { - run_dump_test "iamcu-1" -@@ -784,6 +785,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t - run_list_test "x86-64-branch-3" "-al -mintel64" - - run_dump_test "x86-64-gotpcrel" -+ run_dump_test "x86-64-gotpcrel-no-relax" - } - - set ASFLAGS "$old_ASFLAGS" -diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d b/gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d -index e5a3b1c..1314e5b 100644 ---- a/gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d -+++ b/gas/testsuite/gas/i386/ilp32/x86-64-gotpcrel.d -@@ -1,4 +1,5 @@ - #source: ../x86-64-gotpcrel.s -+#as: --x32 -mrelax-relocations=yes - #objdump: -dwr - #name: x86-64 (ILP32) gotpcrel - -diff --git a/gas/testsuite/gas/i386/ilp32/x86-64-localpic.d b/gas/testsuite/gas/i386/ilp32/x86-64-localpic.d -index 0ca69c7..a9528a2 100644 ---- a/gas/testsuite/gas/i386/ilp32/x86-64-localpic.d -+++ b/gas/testsuite/gas/i386/ilp32/x86-64-localpic.d -@@ -1,4 +1,5 @@ - #source: ../x86-64-localpic.s -+#as: --x32 -mrelax-relocations=yes - #readelf: -rsW - #name: x86-64 (ILP32) local PIC - -diff --git a/gas/testsuite/gas/i386/localpic.d b/gas/testsuite/gas/i386/localpic.d -index 04fb5ce..0a5eec5 100644 ---- a/gas/testsuite/gas/i386/localpic.d -+++ b/gas/testsuite/gas/i386/localpic.d -@@ -1,3 +1,4 @@ -+#as: -mrelax-relocations=yes - #readelf: -rs - #name: i386 local PIC - -diff --git a/gas/testsuite/gas/i386/mixed-mode-reloc32.d b/gas/testsuite/gas/i386/mixed-mode-reloc32.d -index 9affc36..a2ef6a0 100644 ---- a/gas/testsuite/gas/i386/mixed-mode-reloc32.d -+++ b/gas/testsuite/gas/i386/mixed-mode-reloc32.d -@@ -1,3 +1,4 @@ -+#as: -mrelax-relocations=yes - #objdump: -r - #source: mixed-mode-reloc.s - #name: x86 mixed mode relocs (32-bit object) -diff --git a/gas/testsuite/gas/i386/reloc32.d b/gas/testsuite/gas/i386/reloc32.d -index 45c9cd2..b6e1bbd 100644 ---- a/gas/testsuite/gas/i386/reloc32.d -+++ b/gas/testsuite/gas/i386/reloc32.d -@@ -1,3 +1,4 @@ -+#as: -mrelax-relocations=yes - #objdump: -Drw - #name: i386 relocs - -diff --git a/gas/testsuite/gas/i386/x86-64-avx512f-intel.d b/gas/testsuite/gas/i386/x86-64-avx512f-intel.d -index c6bdbc5..ff2a3d1 100644 ---- a/gas/testsuite/gas/i386/x86-64-avx512f-intel.d -+++ b/gas/testsuite/gas/i386/x86-64-avx512f-intel.d -@@ -3666,6 +3666,7 @@ Disassembly of section .text: - [ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 7b 00 00 00 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r14\+zmm31\*8\+0x7b\] - [ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r9\+zmm31\*1\+0x100\] - [ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[rcx\+zmm31\*4\+0x400\] -+[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd zmm3\{k1\},ZMMWORD PTR \[r14\+zmm19\*8\+0x7b\] - [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8\+0x7b\] - [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8\+0x7b\] - [ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps ymm30\{k1\},YMMWORD PTR \[r9\+zmm31\*1\+0x100\] -@@ -10686,6 +10687,7 @@ Disassembly of section .text: - [ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 85 ff ff ff vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r14\+zmm31\*8-0x7b\] - [ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[r9\+zmm31\*1\+0x100\] - [ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd zmm30\{k1\},ZMMWORD PTR \[rcx\+zmm31\*4\+0x400\] -+[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd zmm3\{k1\},ZMMWORD PTR \[r14\+zmm19\*8\+0x7b\] - [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8-0x7b\] - [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps ymm30\{k1\},YMMWORD PTR \[r14\+zmm31\*8-0x7b\] - [ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps ymm30\{k1\},YMMWORD PTR \[r9\+zmm31\*1\+0x100\] -diff --git a/gas/testsuite/gas/i386/x86-64-avx512f.d b/gas/testsuite/gas/i386/x86-64-avx512f.d -index d672fa5..2db0b3e 100644 ---- a/gas/testsuite/gas/i386/x86-64-avx512f.d -+++ b/gas/testsuite/gas/i386/x86-64-avx512f.d -@@ -3665,6 +3665,7 @@ Disassembly of section .text: - [ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 7b 00 00 00 vgatherqpd 0x7b\(%r14,%zmm31,8\),%zmm30\{%k1\} - [ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd 0x100\(%r9,%zmm31,1\),%zmm30\{%k1\} - [ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd 0x400\(%rcx,%zmm31,4\),%zmm30\{%k1\} -+[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd 0x7b\(%r14,%zmm19,8\),%zmm3\{%k1\} - [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps 0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\} - [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 7b 00 00 00 vgatherqps 0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\} - [ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps 0x100\(%r9,%zmm31,1\),%ymm30\{%k1\} -@@ -10685,6 +10686,7 @@ Disassembly of section .text: - [ ]*[a-f0-9]+: 62 02 fd 41 93 b4 fe 85 ff ff ff vgatherqpd -0x7b\(%r14,%zmm31,8\),%zmm30\{%k1\} - [ ]*[a-f0-9]+: 62 02 fd 41 93 74 39 20 vgatherqpd 0x100\(%r9,%zmm31,1\),%zmm30\{%k1\} - [ ]*[a-f0-9]+: 62 22 fd 41 93 b4 b9 00 04 00 00 vgatherqpd 0x400\(%rcx,%zmm31,4\),%zmm30\{%k1\} -+[ ]*[a-f0-9]+: 62 d2 fd 41 93 9c de 7b 00 00 00 vgatherqpd 0x7b\(%r14,%zmm19,8\),%zmm3\{%k1\} - [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps -0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\} - [ ]*[a-f0-9]+: 62 02 7d 41 93 b4 fe 85 ff ff ff vgatherqps -0x7b\(%r14,%zmm31,8\),%ymm30\{%k1\} - [ ]*[a-f0-9]+: 62 02 7d 41 93 74 39 40 vgatherqps 0x100\(%r9,%zmm31,1\),%ymm30\{%k1\} -diff --git a/gas/testsuite/gas/i386/x86-64-avx512f.s b/gas/testsuite/gas/i386/x86-64-avx512f.s -index fa42326..e2cbb12 100644 ---- a/gas/testsuite/gas/i386/x86-64-avx512f.s -+++ b/gas/testsuite/gas/i386/x86-64-avx512f.s -@@ -3973,6 +3973,7 @@ _start: - vgatherqpd 123(%r14,%zmm31,8), %zmm30{%k1} # AVX512F - vgatherqpd 256(%r9,%zmm31), %zmm30{%k1} # AVX512F - vgatherqpd 1024(%rcx,%zmm31,4), %zmm30{%k1} # AVX512F -+ vgatherqpd 123(%r14,%zmm19,8), %zmm3{%k1} # AVX512F - - vgatherqps 123(%r14,%zmm31,8), %ymm30{%k1} # AVX512F - vgatherqps 123(%r14,%zmm31,8), %ymm30{%k1} # AVX512F -@@ -11630,6 +11631,7 @@ _start: - vgatherqpd zmm30{k1}, ZMMWORD PTR [r14+zmm31*8-123] # AVX512F - vgatherqpd zmm30{k1}, ZMMWORD PTR [r9+zmm31+256] # AVX512F - vgatherqpd zmm30{k1}, ZMMWORD PTR [rcx+zmm31*4+1024] # AVX512F -+ vgatherqpd zmm3{k1}, ZMMWORD PTR [r14+zmm19*8+123] # AVX512F - - vgatherqps ymm30{k1}, YMMWORD PTR [r14+zmm31*8-123] # AVX512F - vgatherqps ymm30{k1}, YMMWORD PTR [r14+zmm31*8-123] # AVX512F -diff --git a/gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d b/gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d ++0+ <\.text>: ++ 0: 70 00 00 00 e_li r0,0 ++ 4: 7c 01 14 04 lbdcbx r0,r1,r2 ++ 8: 7c 01 14 44 lhdcbx r0,r1,r2 ++ c: 7c 01 14 84 lwdcbx r0,r1,r2 +diff --git a/gas/testsuite/gas/ppc/pr21303.s b/gas/testsuite/gas/ppc/pr21303.s new file mode 100644 -index 0000000..a3f8943 +index 0000000..890ba94 --- /dev/null -+++ b/gas/testsuite/gas/i386/x86-64-gotpcrel-no-relax.d -@@ -0,0 +1,27 @@ -+#source: x86-64-gotpcrel.s -+#as: -mrelax-relocations=no -+#objdump: -dwr -+ -+.*: +file format .* -+ -+ -+Disassembly of section .text: -+ -+0+ <_start>: -+[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax 3: R_X86_64_GOTPCREL foo -+[ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov 0x0,%rax b: R_X86_64_GOTPCREL foo -+[ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov 0x0\(%rip\),%rax # 16 <_start\+0x16> 12: R_X86_64_GOTPCREL foo-0x4 -+[ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov 0x0\(%rcx\),%rax 19: R_X86_64_GOTPCREL foo -+[ ]*[a-f0-9]+: ff 15 00 00 00 00 callq \*0x0\(%rip\) # 23 <_start\+0x23> 1f: R_X86_64_GOTPCREL foo-0x4 -+[ ]*[a-f0-9]+: ff 90 00 00 00 00 callq \*0x0\(%rax\) 25: R_X86_64_GOTPCREL foo -+[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmpq \*0x0\(%rip\) # 2f <_start\+0x2f> 2b: R_X86_64_GOTPCREL foo-0x4 -+[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmpq \*0x0\(%rcx\) 31: R_X86_64_GOTPCREL foo -+[ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 mov \$0x0,%rax 38: R_X86_64_GOTPCREL foo -+[ ]*[a-f0-9]+: 48 8b 04 25 00 00 00 00 mov 0x0,%rax 40: R_X86_64_GOTPCREL foo -+[ ]*[a-f0-9]+: 48 8b 05 00 00 00 00 mov 0x0\(%rip\),%rax # 4b <_start\+0x4b> 47: R_X86_64_GOTPCREL foo-0x4 -+[ ]*[a-f0-9]+: 48 8b 81 00 00 00 00 mov 0x0\(%rcx\),%rax 4e: R_X86_64_GOTPCREL foo -+[ ]*[a-f0-9]+: ff 15 00 00 00 00 callq \*0x0\(%rip\) # 58 <_start\+0x58> 54: R_X86_64_GOTPCREL foo-0x4 -+[ ]*[a-f0-9]+: ff 90 00 00 00 00 callq \*0x0\(%rax\) 5a: R_X86_64_GOTPCREL foo -+[ ]*[a-f0-9]+: ff 25 00 00 00 00 jmpq \*0x0\(%rip\) # 64 <_start\+0x64> 60: R_X86_64_GOTPCREL foo-0x4 -+[ ]*[a-f0-9]+: ff a1 00 00 00 00 jmpq \*0x0\(%rcx\) 66: R_X86_64_GOTPCREL foo -+#pass -diff --git a/gas/testsuite/gas/i386/x86-64-gotpcrel.d b/gas/testsuite/gas/i386/x86-64-gotpcrel.d -index 6ca3fc7..fbe5e47 100644 ---- a/gas/testsuite/gas/i386/x86-64-gotpcrel.d -+++ b/gas/testsuite/gas/i386/x86-64-gotpcrel.d -@@ -1,3 +1,4 @@ -+#as: -mrelax-relocations=yes - #objdump: -dwr - - .*: +file format .* -diff --git a/gas/testsuite/gas/i386/x86-64-localpic.d b/gas/testsuite/gas/i386/x86-64-localpic.d -index 0a07149..bafaa9c 100644 ---- a/gas/testsuite/gas/i386/x86-64-localpic.d -+++ b/gas/testsuite/gas/i386/x86-64-localpic.d -@@ -1,3 +1,4 @@ -+#as: -mrelax-relocations=yes - #readelf: -rsW - #name: x86-64 local PIC - -diff --git a/gold/ChangeLog b/gold/ChangeLog -index b283a88..92b26ba 100644 ---- a/gold/ChangeLog -+++ b/gold/ChangeLog -@@ -33,7 +33,7 @@ - 2015-11-11 Alan Modra <amodra@gmail.com> - Peter Bergner <bergner@vnet.ibm.com> - -- * gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function. -+ * powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function. - (Powerpc_relocate_functions::addr16dx_ha): Likewise. - (Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA. - (Target_powerpc::Scan::global): Likewise. -@@ -339,7 +339,7 @@ - 2015-07-26 Doug Kwan <dougkwan@google.com> - - * testsuite/arm_unaligned_reloc.{s,sh}: Make test less sensitive to -- disassembler output format. -+ disassembler output format. - - 2015-07-23 Ian Coolidge <icoolidge@google.com> - Plumb --pic-veneer option for gold. -@@ -566,7 +566,7 @@ - 2015-06-29 Doug Kwan <dougkwan@google.com> - - * testsuite/arm_bl_out_of_range.s: Align stub table so that it appears -- at address expected by test. -+ at address expected by test. - * testsuite/arm_cortex_a8_b.s: Ditto. - * testsuite/arm_cortex_a8_b_cond.s: Ditto. - * testsuite/arm_cortex_a8_bl.s: Ditto. -@@ -940,7 +940,6 @@ - 2015-04-07 HC Yen <hc.yen@mediatek.com> - - Add AArch32 support for gold linker. -- gold/ - * arm.cc: Add V8 arch combine table. - - 2015-04-06 Rafael Ávila de Espíndola <rafael.espindola@gmail.com> -@@ -1455,7 +1454,6 @@ - (Output_data_plt_arm::entry_count): Modified. - (Output_data_plt_arm::address_for_global): New method. - (Output_data_plt_arm::address_for_local): New method. --gold/ - (Output_data_plt_arm::set_final_data_size): Add irelative_count_. - (Output_data_plt_arm::insert_irelative_data): New method. - (Output_data_plt_arm::irelative_rel_): New member. -@@ -2490,7 +2488,7 @@ gold/ - - Add .gdb_index version 7 support. - -- * gold/dwarf_reader.cc: include <utility> (for make_pair). -+ * dwarf_reader.cc: include <utility> (for make_pair). - (Dwarf_abbrev_table::do_read_abbrevs): Check for compressed - debug sections. - (Dwarf_ranges_table::read_ranges_table): Likewise. -@@ -2501,21 +2499,21 @@ gold/ - for end of list by offset, not by offset == 0. - (Dwarf_info_reader::do_read_string_table): Check for compressed - debug sections. -- * gold/dwarf_reader.h (Dwarf_pubnames_table::Dwarf_pubnames_table): -+ * dwarf_reader.h (Dwarf_pubnames_table::Dwarf_pubnames_table): - Initialize new data members. - (Dwarf_pubnames_table::next_name): return flag_byte. - (Dwarf_pubnames_table::end_of_table_): New data member. - (Dwarf_pubnames_table::is_gnu_style_): New data member. -- * gold/gdb-index.cc (gdb_index_version): Update to version 7. -+ * gdb-index.cc (gdb_index_version): Update to version 7. - (Gdb_index_info_reader::read_pubtable): Read flag_byte. - (Gdb_index_info_reader::read_pubnames_and_pubtypes): Don't - read skeleton type unit DIEs. - (Gdb_index::add_symbol): Add flag_byte; adjust all callers. - (Gdb_index::do_write): Write flag_byte. -- * gold/gdb-index.h (Gdb_index::add_symbol): Add flags parameter. -+ * gdb-index.h (Gdb_index::add_symbol): Add flags parameter. - (Gdb_index::Cu_vector): Store flags along with cu indexes. -- * gold/testsuite/gdb_index_test_3.sh: Allow versions 4-7. -- * gold/testsuite/gdb_index_test_comm.sh: Likewise. -+ * testsuite/gdb_index_test_3.sh: Allow versions 4-7. -+ * testsuite/gdb_index_test_comm.sh: Likewise. - - 2014-01-08 H.J. Lu <hongjiu.lu@intel.com> - -@@ -5554,15 +5552,15 @@ gold/ - - 2012-01-03 Cary Coutant <ccoutant@google.com> - -- * gold/incremental.cc (Sized_incremental_binary::do_process_got_plt): -+ * incremental.cc (Sized_incremental_binary::do_process_got_plt): - Use abstract base class for GOT. -- * gold/output.h (class Output_data_got_base): New abstract base class. -+ * output.h (class Output_data_got_base): New abstract base class. - (class Output_data_got): Derive from new base class, adjust ctors. - (Output_data_got::reserve_slot): Make virtual; rename to - do_reserve_slot; Adjust callers. -- * gold/target.h (Sized_target::init_got_plt_for_update): Return -+ * target.h (Sized_target::init_got_plt_for_update): Return - pointer to abstract base class. -- * gold/x86_64.cc (Target_x86_64::init_got_plt_for_update): Likewise. -+ * x86_64.cc (Target_x86_64::init_got_plt_for_update): Likewise. - - 2011-12-18 Ian Lance Taylor <iant@google.com> - -@@ -6073,10 +6071,10 @@ gold/ - - 2011-08-01 Cary Coutant <ccoutant@google.com> - -- * gold/testsuite/Makefile.am (justsyms_exec): New testcase. -- * gold/testsuite/Makefile.in: Regenerate. -- * gold/testsuite/justsyms_exec.c: New source file. -- * gold/testsuite/justsyms_lib.c: New source file. -+ * testsuite/Makefile.am (justsyms_exec): New testcase. -+ * testsuite/Makefile.in: Regenerate. -+ * testsuite/justsyms_exec.c: New source file. -+ * testsuite/justsyms_lib.c: New source file. - - 2011-08-01 Cary Coutant <ccoutant@google.com> - -@@ -6402,7 +6400,7 @@ gold/ - - 2011-07-06 Cary Coutant <ccoutant@google.com> - -- * gold/incremental.cc -+ * incremental.cc - (Output_section_incremental_inputs::write_info_blocks): Check for - hidden and internal symbols. - -@@ -6943,9 +6941,9 @@ gold/ - 2011-06-09 Cary Coutant <ccoutant@google.com> - - PR gold/12804 -- * gold/gold.cc (queue_initial_tasks): Warn if --incremental is -+ * gold.cc (queue_initial_tasks): Warn if --incremental is - used with --compress-debug-sections. -- * gold/object.cc (Sized_relobj_file::do_layout): Report -+ * object.cc (Sized_relobj_file::do_layout): Report - uncompressed size of compressed input sections. - - 2011-06-08 Cary Coutant <ccoutant@google.com> -@@ -7073,10 +7071,10 @@ gold/ - 2011-06-02 Cary Coutant <ccoutant@google.com> - - PR gold/12163 -- * gold/archive.cc (Archive::Archive): Initialize new data member. -+ * archive.cc (Archive::Archive): Initialize new data member. - (Archive::include_all_members): Return if archive has already been - included. -- * gold/archive.h (Archive::include_all_members_): New data member. -+ * archive.h (Archive::include_all_members_): New data member. - - 2011-06-02 Nick Clifton <nickc@redhat.com> - -@@ -7593,9 +7591,9 @@ gold/ - - 2011-04-14 Cary Coutant <ccoutant@google.com> - -- * gold/layout.cc (Layout::symtab_section_offset): New function. -- * gold/layout.h (Layout::symtab_section_offset): New function. -- * gold/reloc.cc (Sized_relobj::do_relocate): Call it. -+ * layout.cc (Layout::symtab_section_offset): New function. -+ * layout.h (Layout::symtab_section_offset): New function. -+ * reloc.cc (Sized_relobj::do_relocate): Call it. - - 2011-04-12 Ian Lance Taylor <iant@google.com> - -@@ -8706,7 +8704,7 @@ gold/ - - 2010-10-17 Doug Kwan <dougkwan@google.com> - -- * gold/arm.cc (Target_arm::got_section): Use correct order and set -+ * arm.cc (Target_arm::got_section): Use correct order and set - GOT output section to be writable. - - 2010-10-14 Cary Coutant <ccoutant@google.com> -@@ -8858,7 +8856,7 @@ gold/ - - 2010-09-30 Doug Kwan <dougkwan@google.com> - -- * gold/testsuite/arm_branch_out_of_range.sh: Fix broken tests. -+ * testsuite/arm_branch_out_of_range.sh: Fix broken tests. - - 2010-09-28 Sriraman Tallam <tmsriram@google.com> - -@@ -8902,13 +8900,13 @@ gold/ - - 2010-09-15 Doug Kwan <dougkwan@google.com> - -- * gold/testsuite/script_test_3.t: Add ARM special sections. -- * gold/testsuite/script_test_4.t: Same. -- * gold/testsuite/script_test_5.t: Same. -- * gold/testsuite/script_test_6.t: Same. -- * gold/testsuite/script_test_7.t: Same. -- * gold/testsuite/script_test_7.t: Same. -- * gold/testsuite/thumb_blx_out_of_range.s: Fix instruction alignment. -+ * testsuite/script_test_3.t: Add ARM special sections. -+ * testsuite/script_test_4.t: Same. -+ * testsuite/script_test_5.t: Same. -+ * testsuite/script_test_6.t: Same. -+ * testsuite/script_test_7.t: Same. -+ * testsuite/script_test_7.t: Same. -+ * testsuite/thumb_blx_out_of_range.s: Fix instruction alignment. - - 2010-09-14 Cary Coutant <ccoutant@google.com> - -@@ -9041,7 +9039,7 @@ gold/ - - 2010-08-27 Doug Kwan <dougkwan@google.com> - -- * gold/resolve.cc (Symbol_table::should_override): Let a weak -+ * resolve.cc (Symbol_table::should_override): Let a weak - reference override an existing dynamic weak reference. - * testsuite/Makefile.am: Add new test dyn_weak_ref. - * testsuite/Makefile.in: Regenerate. -@@ -9133,11 +9131,11 @@ gold/ - 2010-08-19 Neil Vachharajani <nvachhar@google.com> - Cary Coutant <ccoutant@google.com> - -- * gold/archive.h (Add_lib_group_symbols): Add readsyms_blocker_, adjust -+ * archive.h (Add_lib_group_symbols): Add readsyms_blocker_, adjust - constructor, and set_blocker. -- * gold/archive.cc (Add_lib_group_symbols::is_runnable): Also check -+ * archive.cc (Add_lib_group_symbols::is_runnable): Also check - readsyms_blocker_. -- * gold/readsyms.cc (Read_symbols::do_lib_group): Also pass -+ * readsyms.cc (Read_symbols::do_lib_group): Also pass - this->this_blocker_ to Add_lib_group_symbols::set_blocker. - * testsuite/Makefile.am (start_lib_test): New test case. - * testsuite/Makefile.in: Regenerate. -@@ -9740,9 +9738,9 @@ gold/ - 2010-07-27 Jeffrey Yasskin <jyasskin@google.com> - - * testsuite/debug_msg.sh: Test mixed weak/strong symbol behavior. -- * gold/testsuite/debug_msg.cc: Likewise. -- * gold/testsuite/odr_violation1.cc -- * gold/testsuite/odr_violation2.cc -+ * testsuite/debug_msg.cc: Likewise. -+ * testsuite/odr_violation1.cc -+ * testsuite/odr_violation2.cc - - 2010-07-21 Cary Coutant <ccoutant@google.com> - -@@ -10087,13 +10085,13 @@ gold/ - 2010-05-26 Rafael Espindola <espindola@google.com> - - PR 11604 -- * gold/object.cc(Sized_relobj::do_layout_deferred_sections): Avoid -+ * object.cc(Sized_relobj::do_layout_deferred_sections): Avoid - adding sections the garbage collector removed. -- * gold/testsuite/Makefile.am: Add test. -- * gold/testsuite/Makefile.in: Regenerate. -- * gold/testsuite/plugin_test_7.sh: New. -- * gold/testsuite/plugin_test_7_1.c: New. -- * gold/testsuite/plugin_test_7_2.c: New. -+ * testsuite/Makefile.am: Add test. -+ * testsuite/Makefile.in: Regenerate. -+ * testsuite/plugin_test_7.sh: New. -+ * testsuite/plugin_test_7_1.c: New. -+ * testsuite/plugin_test_7_2.c: New. - - 2010-05-26 Rafael Espindola <espindola@google.com> - -@@ -10577,7 +10575,7 @@ gold/ - - 2010-03-25 Doug Kwan <dougkwan@google.com> - -- * gold/arm.cc (Arm_exidx_fixup::update_offset_map): Rearrange code -+ * arm.cc (Arm_exidx_fixup::update_offset_map): Rearrange code - to avoid a conversion warning on a 32-bit host. - - 2010-03-24 Ian Lance Taylor <iant@google.com> -@@ -10781,7 +10779,7 @@ gold/ - - 2010-03-08 Doug Kwan <dougkwan@google.com> - -- * gold/arm.cc (Arm_exidx_fixup::update_offset_map): Fix build breakage -+ * arm.cc (Arm_exidx_fixup::update_offset_map): Fix build breakage - due to a conversion warning. - (Arm_relobj::update_output_local_symbol_count): Check for local - symbol with unset output index. -@@ -11403,7 +11401,7 @@ gold/ - - 2010-01-29 Viktor Kutuzov <vkutuzov@accesssoftek.com> - -- * gold/arm.cc: Added support for the ARM relocations: R_ARM_THM_PC8, -+ * arm.cc: Added support for the ARM relocations: R_ARM_THM_PC8, - R_ARM_THM_PC12, R_ARM_THM_ALU_PREL_11_0. - (Arm_relocate_functions::thm_alu11): New Method. - (Arm_relocate_functions::thm_pc8): New Method. -@@ -11553,12 +11551,12 @@ gold/ - - 2010-01-22 Viktor Kutuzov <vkutuzov@accesssoftek.com> - -- * gold/arm.cc (Target_arm): Updated fix_v4bx method and usage of -+ * arm.cc (Target_arm): Updated fix_v4bx method and usage of - Fix_v4bx enum values . -- * gold/options.h (General_options): New option definitions. -+ * options.h (General_options): New option definitions. - (General_options::fix_v4bx): New method. - (General_options::Fix_v4bx): New enum. -- * gold/options.cc (General_options::parse_fix_v4bx): New method. -+ * options.cc (General_options::parse_fix_v4bx): New method. - (General_options::parse_fix_v4bx_interworking): New method. - - 2010-01-22 Doug Kwan <dougkwan@google.com> -@@ -11618,7 +11616,7 @@ gold/ - - 2010-01-20 Viktor Kutuzov <vkutuzov@accesssoftek.com> - -- * gold/arm.cc: Added support for R_ARM_V4BX relocation -+ * arm.cc: Added support for R_ARM_V4BX relocation - (class Arm_v4bx_stub): New class. - (DEF_STUBS): Updated definition to support v4_veneer_bx. - (Stub_factory::make_arm_v4bx_stub): New method. -@@ -12675,7 +12673,7 @@ gold/ - attributes_section and attributes_vendor. - * i386.cc (Target_i386::i386_info): Same. - * object.cc (Sized_relobj::do_layout): Skip attribute section. -- * gold/powerpc.cc (Target_powerpc::powerpc_info): Initialize new -+ * powerpc.cc (Target_powerpc::powerpc_info): Initialize new - fields attributes_section and attributes_vendor. - * sparc.cc (Target_sparc::sparc_info): Same. - * target.h (Target::attributes_section, Target::attributes_vendor, -@@ -13322,7 +13320,7 @@ gold/ - (Segment_start_expression::value): New method definition. - (script_exp_function_segment_start): Return a new - Segment_start_expression. -- * gold/script-c.h (script_saw_segment_start_expression): New function -+ * script-c.h (script_saw_segment_start_expression): New function - prototype. - * script-sections.cc (Script_sections::Script_sections): Initialize - SAW_SEGMENT_START_EXPRESSION_ to false. -@@ -14113,9 +14111,9 @@ gold/ - (Script_sections::attach_sections_using_phdrs_clause): Do not modify - segment list. - (Script_sections::release_segments): New method definition. -- * gold/script-sections.h (Script_sections::release_segments): New -+ * script-sections.h (Script_sections::release_segments): New - method declaration. -- * gold/target.h (Target::may_relax, Target::relax, -+ * target.h (Target::may_relax, Target::relax, - Target::do_may_relax, Target::do_relax): New method definitions. - - 2009-09-17 Viktor Kutuzov <vkutuzov@accesssoftek.com> -@@ -14689,7 +14687,7 @@ gold/ - - 2009-06-03 Doug Kwan <dougkwan@google.com> - -- * gold/arm.cc (namespace utils): New. -+ * arm.cc (namespace utils): New. - (Target_arm::reloc_is_non_pic): Define new method. - (class Arm_relocate_functions): New. - (Target_arm::Relocate::relocate): Handle relocation types used by -@@ -14701,7 +14699,7 @@ gold/ - - 2009-06-02 Doug Kwan <dougkwan@google.com> - -- * gold/arm.cc (Target_arm::Scan::Scan): Initialize -+ * arm.cc (Target_arm::Scan::Scan): Initialize - issued_non_pic_error_. - (class Target_arm::Scan): Declare new method check_non_pic. - Define new method symbol_needs_plt_entry. -@@ -14722,7 +14720,7 @@ gold/ - - 2009-05-29 Doug Kwan <dougkwan@google.com> - -- * gold/arm.cc (Output_data_plt_arm): Forward declaration for new -+ * arm.cc (Output_data_plt_arm): Forward declaration for new - template class. - (class Target_arm): Update comment. - (Target_arm::Target_arm): Initialize new data members GOT_, -diff --git a/gprof/ChangeLog b/gprof/ChangeLog -index 9fa2109..cb3b0c3 100644 ---- a/gprof/ChangeLog -+++ b/gprof/ChangeLog -@@ -2,6 +2,10 @@ - - * configure: Regenerate. - -+2016-01-25 Tristan Gingold <gingold@adacore.com> -+ -+ * configure: Regenerate. -+ - 2015-11-13 Tristan Gingold <gingold@adacore.com> - - * configure: Regenerate. -diff --git a/gprof/configure b/gprof/configure -index 8ea2c70..693b927 100755 ---- a/gprof/configure -+++ b/gprof/configure -@@ -1,6 +1,6 @@ - #! /bin/sh - # Guess values for system-dependent variables and create Makefiles. --# Generated by GNU Autoconf 2.64 for gprof 2.26. -+# Generated by GNU Autoconf 2.64 for gprof 2.26.0. - # - # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, - # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software -@@ -556,8 +556,8 @@ MAKEFLAGS= - # Identity of this package. - PACKAGE_NAME='gprof' - PACKAGE_TARNAME='gprof' --PACKAGE_VERSION='2.26' --PACKAGE_STRING='gprof 2.26' -+PACKAGE_VERSION='2.26.0' -+PACKAGE_STRING='gprof 2.26.0' - PACKAGE_BUGREPORT='' - PACKAGE_URL='' - -@@ -1299,7 +1299,7 @@ if test "$ac_init_help" = "long"; then - # Omit some internal or obsolete options to make the list less imposing. - # This message is too long to be a string in the A/UX 3.1 sh. - cat <<_ACEOF --\`configure' configures gprof 2.26 to adapt to many kinds of systems. -+\`configure' configures gprof 2.26.0 to adapt to many kinds of systems. - - Usage: $0 [OPTION]... [VAR=VALUE]... - -@@ -1370,7 +1370,7 @@ fi - - if test -n "$ac_init_help"; then - case $ac_init_help in -- short | recursive ) echo "Configuration of gprof 2.26:";; -+ short | recursive ) echo "Configuration of gprof 2.26.0:";; - esac - cat <<\_ACEOF - -@@ -1476,7 +1476,7 @@ fi - test -n "$ac_init_help" && exit $ac_status - if $ac_init_version; then - cat <<\_ACEOF --gprof configure 2.26 -+gprof configure 2.26.0 - generated by GNU Autoconf 2.64 - - Copyright (C) 2009 Free Software Foundation, Inc. -@@ -1841,7 +1841,7 @@ cat >config.log <<_ACEOF - This file contains any messages produced by compilers while - running configure, to aid debugging if configure makes a mistake. - --It was created by gprof $as_me 2.26, which was -+It was created by gprof $as_me 2.26.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - $ $0 $@ -@@ -3649,7 +3649,7 @@ fi - - # Define the identity of the package. - PACKAGE='gprof' -- VERSION='2.26' -+ VERSION='2.26.0' - - - cat >>confdefs.h <<_ACEOF -@@ -12706,7 +12706,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 - # report actual input values of CONFIG_FILES etc. instead of their - # values after options handling. - ac_log=" --This file was extended by gprof $as_me 2.26, which was -+This file was extended by gprof $as_me 2.26.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - CONFIG_FILES = $CONFIG_FILES -@@ -12770,7 +12770,7 @@ Report bugs to the package provider." - _ACEOF - cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 - ac_cs_version="\\ --gprof config.status 2.26 -+gprof config.status 2.26.0 - configured by $0, generated by GNU Autoconf 2.64, - with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" - ++++ b/gas/testsuite/gas/ppc/pr21303.s +@@ -0,0 +1,5 @@ ++ .text ++ e_li 0, 0 ++ lbdcbx 0, 1, 2 ++ lhdcbx 0, 1, 2 ++ lwdcbx 0, 1, 2 diff --git a/include/ChangeLog b/include/ChangeLog -index 01a25de..0ceba89 100644 +index af39f33..dddecfb 100644 --- a/include/ChangeLog +++ b/include/ChangeLog -@@ -30,10 +30,6 @@ - * dwarf2.def (DW_AT_GNU_numerator, DW_AT_GNU_denominator): New - attributes. - --2015-09-26 James Bowman <james.bowman@ftdichip.com> -- -- * opcode/ft32.h: Add instruction macros FT32_*() -- - 2015-09-20 Rich Felker <dalias@libc.org> - - * bfdlink.h (struct bfd_link_info): Add "nointerp" field. -@@ -55,7 +51,7 @@ - - 2015-08-18 H.J. Lu <hongjiu.lu@intel.com> - -- * include/bfdlink.h (output_type): New enum. -+ * bfdlink.h (output_type): New enum. - (bfd_link_executable): New macro. - (bfd_link_dll): Likewise. - (bfd_link_relocatable): Likewise. -@@ -71,10 +67,6 @@ - - * ansidecl.h (GCC_FINAL): New macro. - --2015-07-16 Jiong Wang <jiong.wang@arm.com> -- -- * elf/aarch64.h (R_AARCH64_P32_TLSLD_ADR_PREL21): New enumeration. -- - 2015-07-14 H.J. Lu <hongjiu.lu@intel.com> - - Sync with GCC -@@ -97,25 +89,12 @@ - PR target/65261 - * ansidecl.h (ATTRIBUTE_NO_SANITIZE_UNDEFINED): New macro. - --2015-07-09 Catherine Moore <clm@codesourcery.com> -- -- * elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New. -- --2015-07-08 Pitchumani Sivanupandi <pitchumani.s@atmel.com> -- -- * elf/avr.h: Add new 32 bit PC relative relocation. -- --2015-06-26 Matthew Fortune <matthew.fortune@imgtec.com> -- -- * elf/mips.h (DT_MIPS_RLD_MAP_REL): New macro. -- - 2015-06-22 Nick Clifton <nickc@redhat.com> - - * dis-asm.h (struct disassemble_info): Add stop_vma field. - - 2015-05-28 Catherine Moore <clm@codesourcery.com> - -- include/ - * bfdlink.h: Rename eh_frame_hdr to eh_frame_hdr_type. - - 2015-05-22 Yunlian Jiang <yunlian@google.com> -@@ -123,10 +102,6 @@ - * libiberty.h (asprintf): Don't declare if HAVE_DECL_ASPRINTF is - not defined. - --2015-05-12 Jiong Wang <jiong.wang@arm.com> -- -- * elf/aarch64.h (R_AARCH64_P32_LD32_GOTPAGE_LO14): New enumeration. -- - 2015-05-01 H.J. Lu <hongjiu.lu@intel.com> - - Merge with gcc: -@@ -160,11 +135,6 @@ - PR ld/pr17709 - * bfdlink.h (bfd_link_info): Add extern_protected_data. - --2015-03-10 Matthew Wahab <matthew.wahab@arm.com> -- -- PR ld/16572 -- * elf/arm.h (EF_ARM_HASENTRY): Remove. -- - 2015-02-19 Pedro Alves <palves@redhat.com> - - * floatformat.h [__cplusplus]: Wrap in extern "C". -@@ -247,31 +217,14 @@ - PR debug/63239 - * dwarf2.def (DW_AT_GNU_deleted): New attribute. - --2014-11-21 Terry Guo <terry.guo@arm.com> -- -- * opcode/arm.h (FPU_VFP_EXT_ARMV8xD): New macro. -- (FPU_VFP_V5D16): Likewise. -- (FPU_VFP_V5_SP_D16): Likewise. -- (FPU_ARCH_VFP_V5D16): Likewise. -- (FPU_ARCH_VFP_V5_SP_D16): Likewise. -- - 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> - - * bfdlink.h (struct bfd_link_info): Add bndplt. - --2014-10-30 Andrew Pinski <apinski@cavium.com> -- -- * elf/mips.h (AFL_EXT_OCTEON3): Define. -- INSN_OCTEON3, CPU_OCTEON3): Define. -- - 2014-10-28 Yury Gribov <y.gribov@samsung.com> - - * libiberty.h (strtol, strtoul, strtoll, strtoull): New prototypes. - --2014-10-22 Matthew Fortune <matthew.fortune@imgtec.com> -- -- * elf/mips.h (AFL_ASE_MASK): Define. -- - 2014-10-15 David Malcolm <dmalcolm@redhat.com> - - * libiberty.h (choose_tmpdir): New prototype. -@@ -303,28 +256,6 @@ - - * bfdlink.h (struct bfd_link_info): Add lto_plugin_active. - --2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com> -- -- * elf/mips.h (PT_MIPS_ABIFLAGS, SHT_MIPS_ABIFLAGS): Define. -- (Val_GNU_MIPS_ABI_FP_OLD_64): Rename from Val_GNU_MIPS_ABI_FP_64. -- (Val_GNU_MIPS_ABI_FP_64): Redefine. -- (Val_GNU_MIPS_ABI_FP_XX): Define. -- (Elf_External_ABIFlags_v0, Elf_Internal_ABIFlags_v0): New structures. -- (AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): Define. -- (AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU): Likewise. -- (AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS): Likewise. -- (AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16): Likewise. -- (AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise. -- (AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP): Likewise. -- (AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900): Likewise. -- (AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900): Likewise. -- (AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120): Likewise. -- (AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E): Likewise. -- (AFL_EXT_LOONGSON_2F): Likewise. -- (bfd_mips_elf_swap_abiflags_v0_in): Prototype. -- (bfd_mips_elf_swap_abiflags_v0_out): Likewise. -- (bfd_mips_isa_ext): Likewise. -- - 2014-06-13 Alan Modra <amodra@gmail.com> - - * bfdlink.h (struct bfd_link_hash_table): Add hash_table_free field. -@@ -340,20 +271,12 @@ - - 2014-05-01 Steve Ellcey <sellcey@mips.com> - -- * include/longlong.h: Import latest version from GCC tree. -- --2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com> -- -- * opcode/mips.h (ASE_XPA): New define. -+ * longlong.h: Import latest version from GCC tree. - - 2014-04-22 Christian Svensson <blue@cmd.nu> - - * dis-asm.h: Remove openrisc and or32 support. Add support for or1k. - --2014-04-10 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> -- -- * elf/avr.h: Add new DIFF relocs. -- - 2014-03-05 Alan Modra <amodra@gmail.com> - - Update copyright years. -@@ -386,11 +309,6 @@ - - * longlong.h: New file. - --2013-11-11 Catherine Moore <clm@codesourcery.com> -- -- * opcode/mips.h (INSN_LOAD_MEMORY_DELAY): Rename to... -- (INSN_LOAD_MEMORY): ...this. -- - 2013-10-29 Marc Glisse <marc.glisse@inria.fr> +@@ -1,3 +1,58 @@ ++2017-04-03 Palmer Dabbelt <palmer@dabbelt.com> ++ ++ * elf/riscv.h (RISCV_GP_SYMBOL): New define. ++ ++2017-03-27 Andrew Waterman <andrew@sifive.com> ++ ++ * opcode/riscv-opc.h (CSR_PMPCFG0): New define. ++ (CSR_PMPCFG1): Likewise. ++ (CSR_PMPCFG2): Likewise. ++ (CSR_PMPCFG3): Likewise. ++ (CSR_PMPADDR0): Likewise. ++ (CSR_PMPADDR1): Likewise. ++ (CSR_PMPADDR2): Likewise. ++ (CSR_PMPADDR3): Likewise. ++ (CSR_PMPADDR4): Likewise. ++ (CSR_PMPADDR5): Likewise. ++ (CSR_PMPADDR6): Likewise. ++ (CSR_PMPADDR7): Likewise. ++ (CSR_PMPADDR8): Likewise. ++ (CSR_PMPADDR9): Likewise. ++ (CSR_PMPADDR10): Likewise. ++ (CSR_PMPADDR11): Likewise. ++ (CSR_PMPADDR12): Likewise. ++ (CSR_PMPADDR13): Likewise. ++ (CSR_PMPADDR14): Likewise. ++ (CSR_PMPADDR15): Likewise. ++ (pmpcfg0): Declare register. ++ (pmpcfg1): Likewise. ++ (pmpcfg2): Likewise. ++ (pmpcfg3): Likewise. ++ (pmpaddr0): Likewise. ++ (pmpaddr1): Likewise. ++ (pmpaddr2): Likewise. ++ (pmpaddr3): Likewise. ++ (pmpaddr4): Likewise. ++ (pmpaddr5): Likewise. ++ (pmpaddr6): Likewise. ++ (pmpaddr7): Likewise. ++ (pmpaddr8): Likewise. ++ (pmpaddr9): Likewise. ++ (pmpaddr10): Likewise. ++ (pmpaddr11): Likewise. ++ (pmpaddr12): Likewise. ++ (pmpaddr13): Likewise. ++ (pmpaddr14): Likewise. ++ (pmpaddr15): Likewise. ++ ++2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> ++ ++ Backport from mainline ++ 2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> ++ ++ * opcode/s390.h (S390_INSTR_FLAG_VX2): Remove. ++ (S390_INSTR_FLAG_FACILITY_MASK): Adjust value. ++ + 2017-02-28 Alan Modra <amodra@gmail.com> + + * elf/ppc64.h (R_PPC64_16DX_HA): New. Expand fake reloc comment. +diff --git a/include/elf/riscv.h b/include/elf/riscv.h +index 526bc11..daa4463 100644 +--- a/include/elf/riscv.h ++++ b/include/elf/riscv.h +@@ -109,4 +109,7 @@ END_RELOC_NUMBERS (R_RISCV_max) + /* File uses the quad-float ABI. */ + #define EF_RISCV_FLOAT_ABI_QUAD 0x0006 + ++/* The name of the global pointer symbol. */ ++#define RISCV_GP_SYMBOL "__global_pointer$" ++ + #endif /* _ELF_RISCV_H */ +diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h +index 9269c6b..f80037b 100644 +--- a/include/opcode/riscv-opc.h ++++ b/include/opcode/riscv-opc.h +@@ -556,6 +556,26 @@ + #define CSR_MCAUSE 0x342 + #define CSR_MBADADDR 0x343 + #define CSR_MIP 0x344 ++#define CSR_PMPCFG0 0x3a0 ++#define CSR_PMPCFG1 0x3a1 ++#define CSR_PMPCFG2 0x3a2 ++#define CSR_PMPCFG3 0x3a3 ++#define CSR_PMPADDR0 0x3b0 ++#define CSR_PMPADDR1 0x3b1 ++#define CSR_PMPADDR2 0x3b2 ++#define CSR_PMPADDR3 0x3b3 ++#define CSR_PMPADDR4 0x3b4 ++#define CSR_PMPADDR5 0x3b5 ++#define CSR_PMPADDR6 0x3b6 ++#define CSR_PMPADDR7 0x3b7 ++#define CSR_PMPADDR8 0x3b8 ++#define CSR_PMPADDR9 0x3b9 ++#define CSR_PMPADDR10 0x3ba ++#define CSR_PMPADDR11 0x3bb ++#define CSR_PMPADDR12 0x3bc ++#define CSR_PMPADDR13 0x3bd ++#define CSR_PMPADDR14 0x3be ++#define CSR_PMPADDR15 0x3bf + #define CSR_TSELECT 0x7a0 + #define CSR_TDATA1 0x7a1 + #define CSR_TDATA2 0x7a2 +@@ -1014,6 +1034,26 @@ DECLARE_CSR(mepc, CSR_MEPC) + DECLARE_CSR(mcause, CSR_MCAUSE) + DECLARE_CSR(mbadaddr, CSR_MBADADDR) + DECLARE_CSR(mip, CSR_MIP) ++DECLARE_CSR(pmpcfg0, CSR_PMPCFG0) ++DECLARE_CSR(pmpcfg1, CSR_PMPCFG1) ++DECLARE_CSR(pmpcfg2, CSR_PMPCFG2) ++DECLARE_CSR(pmpcfg3, CSR_PMPCFG3) ++DECLARE_CSR(pmpaddr0, CSR_PMPADDR0) ++DECLARE_CSR(pmpaddr1, CSR_PMPADDR1) ++DECLARE_CSR(pmpaddr2, CSR_PMPADDR2) ++DECLARE_CSR(pmpaddr3, CSR_PMPADDR3) ++DECLARE_CSR(pmpaddr4, CSR_PMPADDR4) ++DECLARE_CSR(pmpaddr5, CSR_PMPADDR5) ++DECLARE_CSR(pmpaddr6, CSR_PMPADDR6) ++DECLARE_CSR(pmpaddr7, CSR_PMPADDR7) ++DECLARE_CSR(pmpaddr8, CSR_PMPADDR8) ++DECLARE_CSR(pmpaddr9, CSR_PMPADDR9) ++DECLARE_CSR(pmpaddr10, CSR_PMPADDR10) ++DECLARE_CSR(pmpaddr11, CSR_PMPADDR11) ++DECLARE_CSR(pmpaddr12, CSR_PMPADDR12) ++DECLARE_CSR(pmpaddr13, CSR_PMPADDR13) ++DECLARE_CSR(pmpaddr14, CSR_PMPADDR14) ++DECLARE_CSR(pmpaddr15, CSR_PMPADDR15) + DECLARE_CSR(tselect, CSR_TSELECT) + DECLARE_CSR(tdata1, CSR_TDATA1) + DECLARE_CSR(tdata2, CSR_TDATA2) +diff --git a/include/opcode/s390.h b/include/opcode/s390.h +index 7ce5616..2e07664 100644 +--- a/include/opcode/s390.h ++++ b/include/opcode/s390.h +@@ -51,8 +51,7 @@ enum s390_opcode_cpu_val + + #define S390_INSTR_FLAG_HTM 0x2 + #define S390_INSTR_FLAG_VX 0x4 +-#define S390_INSTR_FLAG_VX2 0x8 +-#define S390_INSTR_FLAG_FACILITY_MASK 0xe ++#define S390_INSTR_FLAG_FACILITY_MASK 0x6 + + /* The opcode table is an array of struct s390_opcode. */ - PR tree-optimization/58689 -@@ -401,10 +319,6 @@ - xmalloc, xrealloc, xcalloc, xstrdup, xstrndup, xmemdup, pex_init): - Mark with attribute returns_nonnull. - --2013-10-22 Sterling Augustine <saugustine@google.com> -- -- * gdb/gdb-index.h: Merge from gdb tree. -- - 2013-10-10 Sean Keys <skeys@ipdatasys.com> - - * xgate.h : Cleanup after opcode -@@ -424,31 +338,6 @@ - - * vtv-change-permission.h: New file. - --2013-08-05 Eric Botcazou <ebotcazou@adacore.com> -- Konrad Eisele <konrad@gaisler.com> -- -- * opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_LEON. -- --2013-06-08 Catherine Moore <clm@codesourcery.com> -- -- * opcode/mips.h (mips_opcode): Add ase field. -- (INSN_ASE_MASK): Delete. -- (INSN_DSP): Rename to ASE_DSP. Provide new value. -- (INSN_DSPR2): Rename to ASE_DSPR2. Provide new value. -- (INSN_MCU): Rename to ASE_MCU. Provide new value. -- (INSN_MDMX): Rename to ASE_MDMX. Provide new value. -- (INSN_MIPS3d): Rename to ASE_MIPS3D. Provide new value. -- (INSN_MT): Rename to ASE_MT. Provide new value. -- (INSN_SMARTMIPS): Rename to ASE_SMARTMIPS. Provide new value. -- (INSN_VIRT): Rename to ASE_VIRT. Provide new value. -- (INSN_VIRT64): Rename to ASE_VIRT64. Provide new value. -- (opcode_is_member): Add ase argument. Check ase. -- --2013-05-06 Paul Brook <paul@codesourcery.com> -- -- include/elf/ -- * mips.h (R_MIPS_PC32): Update comment. -- - 2013-04-03 Jason Merrill <jason@redhat.com> - - Demangle C++11 ref-qualifier. -@@ -456,20 +345,6 @@ - DEMANGLE_COMPONENT_REFERENCE_THIS, - DEMANGLE_COMPONENT_RVALUE_REFERENCE_THIS. - --2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de> -- -- * opcode/nios2.h: Edit comment. -- --2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de> -- -- * opcode/nios2.h (OPX_WRPRS): New define. -- (OP_MATCH_WRPRS): Likewise. -- --2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de> -- -- * opcode/nios2.h (OP_RDPRS): New define. -- (OP_MATCH_RDPRS): Likewise. -- - 2013-03-01 Cary Coutant <ccoutant@google.com> - - * dwarf2.h (enum dwarf_sect): New enum type. -@@ -516,12 +391,6 @@ - * fopen-bin.h: Likewise. - * fopen-same.h: Likewise. - * fopen-vms.h: Likewise. -- * aout/hppa.h: Likewise. -- * opcode/tahoe.h: Likewise. -- --2012-12-11 Edgar E. Iglesias <edgar.iglesias@gmail.com> -- -- * elf/microblaze.h: Add TLS relocs to START_RELOC_NUMBERS - - 2012-11-09 Jason Merrill <jason@redhat.com> - -@@ -570,14 +439,6 @@ - PR other/54411 - * objalloc.h (objalloc_alloc): Do not use fast path on wraparound. - --2012-09-27 Anthony Green <green@moxielogic.com> -- -- * opcode/moxie.h (MOXIE_BAD): New define. -- --2012-09-12 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com> -- -- * elf/aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc. -- - 2012-09-06 Cary Coutant <ccoutant@google.com> - - * dwarf2.def: Edit comment. -@@ -592,30 +453,6 @@ - (tv_allow_unique_segment_for_sections): New member. - (tv_unique_segment_for_sections): New member. - --2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> -- -- * opcode/arm.h (ARM_CPU_IS_ANY): New define. -- --2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> -- -- * elf/arm.h (TAG_CPU_ARCH_V8): New define. -- (MAX_TAG_CPU_ARCH): Update. -- * opcode/arm.h (ARM_EXT_V8): New define. -- (FPU_VFP_EXT_ARMV8): Likewise. -- (FPU_NEON_EXT_ARMV8): Likewise. -- (FPU_CRYPTO_EXT_ARMV8): Likewise. -- (ARM_AEXT_V8A): Likewise. -- (FPU_VFP_ARMV8): Likwise. -- (FPU_NEON_ARMV8): Likewise. -- (FPU_CRYPTO_ARMV8): Likewise. -- (FPU_ARCH_VFP_ARMV8): Likewise. -- (FPU_ARCH_NEON_VFP_ARMV8): Likewise. -- (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise. -- (ARM_ARCH_V8A): Likwise. -- (ARM_ARCH_V8A_FP): Likewise. -- (ARM_ARCH_V8A_SIMD): Likewise. -- (ARM_ARCH_V8A_CRYPTO): Likewise. -- - 2012-08-13 Ian Bolton <ian.bolton@arm.com> - Laurent Desnogues <laurent.desnogues@arm.com> - Jim MacArthur <jim.macarthur@arm.com> -@@ -631,10 +468,6 @@ - (print_aarch64_disassembler_options): New declaration. - (aarch64_symbol_is_valid): New declaration. - --2012-08-02 Sean Keys <skeys@ipdatasys.com> -- -- * elf/m68hc11.h: #define E_M68HC11_NO_BANK_WARNING 0x000000200 -- - 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu> - Dr David Alan Gilbert <dave@treblig.org> - -@@ -646,15 +479,6 @@ - * filenames.h: #include "hashtab.h". - (filename_hash, filename_eq): Declare. - --2012-07-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> -- -- * elf/s390.h (START_RELOC_NUMBERS): Define R_390_IRELATIVE reloc. -- --2012-07-05 Sean Keys <skeys@ipdatasys.com> -- -- * opcode/xgate.h: Changed the format string for mode -- XGATE_OP_DYA_MON. -- - 2012-06-18 Doug Evans <dje@google.com> - - * dwarf2.def (DW_OP): Add DW_OP_GNU_const_index. -@@ -724,11 +548,6 @@ - (get_DW_OP_name, get_DW_ATE_name): Declare. - * dwarf2.def: New file, from dwarf2.h. - --2012-04-12 David S. Miller <davem@davemloft.net> -- -- * elf/sparc.h (R_SPARC_WDISP10): New reloc. -- * opcode/sparc.h: Define '=' as generating R_SPARC_WDISP10. -- - 2012-04-10 Tristan Gingold <gingold@adacore.com> - - * splay-tree.h: Conditionnaly includes stdint.h and inttypes.h -@@ -746,7 +565,7 @@ - - Add DWARF attribute value for the "Borland fastcall" calling - convention. -- * elf/dwarf2.h: Add DW_CC_GNU_borland_fastcall_i386 constant. -+ * dwarf2.h: Add DW_CC_GNU_borland_fastcall_i386 constant. - - 2012-01-31 H.J. Lu <hongjiu.lu@intel.com> - -@@ -1049,14 +868,6 @@ - - * libiberty.h (setproctitle): Add prototype. - --2010-09-29 Bernd Schmidt <bernds@codesourcery.com> -- -- * opcode/tic6x-control-registers.h (tscl): Now read_write. -- --2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> -- -- * opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val. -- - 2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> - - * arm.h (ARM_EXT_V6Z): Remove. -@@ -1259,7 +1070,7 @@ - - 2009-10-15 Jakub Jelinek <jakub@redhat.com> - -- * include/dwarf2.h (DW_LANG_Python): Add comment that it is -+ * dwarf2.h (DW_LANG_Python): Add comment that it is - a DWARF 4 addition. - - 2009-10-14 Alan Modra <amodra@bigpond.net.au> -@@ -1348,16 +1159,6 @@ - * bfdlink.h (struct bfd_link_hash_common_entry): Move to top - level. - --2009-09-04 Jie Zhang <jie.zhang@analog.com> -- -- * opcode/bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp. -- (PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define. -- (PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask, -- PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask): -- Adjust accordingly. -- (init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and -- PseudoDbg_Assert_grp_mask. -- - 2009-08-06 Michael Eager <eager@eagercon.com> - - * dis-asm.h: Decl print_insn_microblaze(). -@@ -1518,10 +1319,6 @@ - * demangle.h (enum demangle_component_type): Add - DEMANGLE_COMPONENT_PACK_EXPANSION. - --2008-09-24 Richard Henderson <rth@redhat.com> -- -- * elf/dwarf2.h (DW_OP_GNU_encoded_addr): New. -- - 2008-09-22 Rafael Espindola <espindola@google.com> - - * plugin-api.h (ld_plugin_status): Remove comma from the last item. -@@ -1550,32 +1347,17 @@ - - * bfdlink.h (bfd_generic_link_read_symbols): Declare. - --2008-08-08 Anatoly Sokolov <aesok@post.ru> -- -- * elf/avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, -- E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define. -- (EF_AVR_MACH): Redefine to 0x7F. -- * opcode/avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove. -- (AVR_ISA_AVR3): Redefine. -- (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35, -- AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51, -- AVR_ISA_AVR6): Define. -- - 2008-07-12 Jie Zhang <jie.zhang@analog.com> - - Revert - 2008-07-12 Jie Zhang <jie.zhang@analog.com> - * bfdlink.h (struct bfd_link_info): Add sep_code member - variable. -- * elf/bfin.h (EF_BFIN_CODE_IN_L1): Define. -- (EF_BFIN_DATA_IN_L1): Define. - - 2008-07-12 Jie Zhang <jie.zhang@analog.com> - - * bfdlink.h (struct bfd_link_info): Add sep_code member - variable. -- * elf/bfin.h (EF_BFIN_CODE_IN_L1): Define. -- (EF_BFIN_DATA_IN_L1): Define. - - 2008-07-07 Stan Shebs <stan@codesourcery.com> - -@@ -1938,10 +1720,6 @@ - - * libiberty.h (strverscmp): Prototype. - --2005-06-17 Jakub Jelinek <jakub@redhat.com> -- -- * elf/external.h (GRP_ENTRY_SIZE): Define. -- - 2005-06-08 Zack Weinberg <zack@codesourcery.com> - - * dis-asm.h (get_arm_regnames): Update prototype. -diff --git a/include/aout/ChangeLog b/include/aout/ChangeLog -index 790763b..7caa35b 100644 ---- a/include/aout/ChangeLog -+++ b/include/aout/ChangeLog -@@ -6,6 +6,10 @@ - - Update copyright years. - -+2012-12-17 Nick Clifton <nickc@redhat.com> -+ -+ * hppa.h: Add copyright notice. -+ - 2010-04-15 Nick Clifton <nickc@redhat.com> - - * adobe.h: Update copyright notice to use GPLv3. -diff --git a/include/elf/ChangeLog b/include/elf/ChangeLog -index 3c6eddc..c10e95e 100644 ---- a/include/elf/ChangeLog -+++ b/include/elf/ChangeLog -@@ -58,6 +58,18 @@ - - * aarch64.h (R_AARCH64_P32_TLSLD_ADR_PAGE21): Define. - -+2015-07-16 Jiong Wang <jiong.wang@arm.com> -+ -+ * aarch64.h (R_AARCH64_P32_TLSLD_ADR_PREL21): New enumeration. -+ -+2015-07-09 Catherine Moore <clm@codesourcery.com> -+ -+ * mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New. -+ -+2015-07-08 Pitchumani Sivanupandi <pitchumani.s@atmel.com> -+ -+ * avr.h: Add new 32 bit PC relative relocation. -+ - 2015-07-01 Sandra Loosemore <sandra@codesourcery.com> - Cesar Philippidis <cesar@codesourcery.com> - -@@ -81,11 +93,19 @@ - - * nios2.h (EF_NIOS2_ARCH_R1, EF_NIOS2_ARCH_R2): Define. - -+2015-06-26 Matthew Fortune <matthew.fortune@imgtec.com> -+ -+ * mips.h (DT_MIPS_RLD_MAP_REL): New macro. -+ - 2015-05-29 Roland McGrath <mcgrathr@google.com> - - * common.h (GNU_ABI_TAG_SYLLABLE): New macro. - (GNU_ABI_TAG_NACL): New macro. - -+2015-05-12 Jiong Wang <jiong.wang@arm.com> -+ -+ * aarch64.h (R_AARCH64_P32_LD32_GOTPAGE_LO14): New enumeration. -+ - 2015-05-11 H.J. Lu <hongjiu.lu@intel.com> - - * common.h (EM_486): Renamed to ... -@@ -133,6 +153,11 @@ - (E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13 - E_FLAG_RL78_G14): New flags. - -+2015-03-10 Matthew Wahab <matthew.wahab@arm.com> -+ -+ PR ld/16572 -+ * arm.h (EF_ARM_HASENTRY): Remove. -+ - 2015-02-19 Marcus Shawcroft <marcus.shawcroft@arm.com> - - * aarch64.h (R_AARCH64_P32_TLSGD_ADR_PREL21): Add. -@@ -188,6 +213,15 @@ - - * x86-64.h (R_X86_64_GOTPLT64): Mark it obsolete. - -+2014-10-30 Andrew Pinski <apinski@cavium.com> -+ -+ * mips.h (AFL_EXT_OCTEON3): Define. -+ (INSN_OCTEON3, CPU_OCTEON3): Define. -+ -+2014-10-22 Matthew Fortune <matthew.fortune@imgtec.com> -+ -+ * mips.h (AFL_ASE_MASK): Define. -+ - 2014-10-17 Jose E. Marchesi <jose.marchesi@oracle.com> - - * sparc.h (ELF_SPARC_HWCAP2_VIS3B): Documentation improved. -@@ -227,6 +261,28 @@ - - * rl78.h (RL78_RELAXA_MASK): New. Relax types are enums, not bits - -+2014-07-29 Matthew Fortune <matthew.fortune@imgtec.com> -+ -+ * mips.h (PT_MIPS_ABIFLAGS, SHT_MIPS_ABIFLAGS): Define. -+ (Val_GNU_MIPS_ABI_FP_OLD_64): Rename from Val_GNU_MIPS_ABI_FP_64. -+ (Val_GNU_MIPS_ABI_FP_64): Redefine. -+ (Val_GNU_MIPS_ABI_FP_XX): Define. -+ (Elf_External_ABIFlags_v0, Elf_Internal_ABIFlags_v0): New structures. -+ (AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): Define. -+ (AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU): Likewise. -+ (AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS): Likewise. -+ (AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16): Likewise. -+ (AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise. -+ (AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP): Likewise. -+ (AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900): Likewise. -+ (AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900): Likewise. -+ (AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120): Likewise. -+ (AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E): Likewise. -+ (AFL_EXT_LOONGSON_2F): Likewise. -+ (bfd_mips_elf_swap_abiflags_v0_in): Prototype. -+ (bfd_mips_elf_swap_abiflags_v0_out): Likewise. -+ (bfd_mips_isa_ext): Likewise. -+ - 2014-07-07 Barney Stratford <barney_stratford@fastmail.fm> - - * avr.h: Add R_AVR_PORT5 and R_AVR_PORT6. -@@ -252,6 +308,10 @@ - * openrisc.h: Delete. - * or32.h: Delete. - -+2014-04-10 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> -+ -+ * avr.h: Add new DIFF relocs. -+ - 2014-03-05 Alan Modra <amodra@gmail.com> - - Update copyright years. -@@ -395,6 +455,10 @@ - (EM_INTEL208): Likewise. - (EM_INTEL209): Likewise. - -+2013-05-06 Paul Brook <paul@codesourcery.com> -+ -+ * mips.h (R_MIPS_PC32): Update comment. -+ - 2013-05-02 Nick Clifton <nickc@redhat.com> - - * msp430.h: Add MSP430X relocs. -@@ -443,6 +507,10 @@ - * mips.h: Add MIPS machine variant number for r5900 which is - compatible with old Playstation 2 software. - -+2012-12-11 Edgar E. Iglesias <edgar.iglesias@gmail.com> -+ -+ * microblaze.h: Add TLS relocs to START_RELOC_NUMBERS -+ - 2012-11-16 H.J. Lu <hongjiu.lu@intel.com> - - * common.h (DF_1_CONLFAT): Renamed to ... -@@ -477,13 +545,17 @@ - - 2012-10-30 Steve McIntyre <steve.mcintyre@linaro.org> - -- * elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define. -+ * arm.h (EF_ARM_ABI_FLOAT_SOFT): New define. - (EF_ARM_ABI_FLOAT_HARD): Likewise. - - 2012-10-23 Tom Tromey <tromey@redhat.com> - - * common.h (NT_SIGINFO, NT_FILE): New defines. - -+2012-09-12 Chris Schlumberger-Socha <chris.schlumberger-socha@arm.com> -+ -+ * aarch64.h (R_AARCH64_GOT_LD_PREL19): New reloc. -+ - 2012-08-27 Walter Lee <walt@tilera.com> - - * tilegx.h (R_TILEGX_IMM16_X0_HW0_PLT_PCREL): New relocation. -@@ -501,6 +573,11 @@ - (R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL ): Ditto. - (R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): Ditto. - -+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> +diff --git a/ld/ChangeLog b/ld/ChangeLog +index fd3e232..682ac6c 100644 +--- a/ld/ChangeLog ++++ b/ld/ChangeLog +@@ -1,3 +1,30 @@ ++2017-04-24 H.J. Lu <hongjiu.lu@intel.com> + -+ * arm.h (TAG_CPU_ARCH_V8): New define. -+ (MAX_TAG_CPU_ARCH): Update. ++ PR ld/20815 ++ * testsuite/ld-i386/vxworks2.sd: Add space for program headers. + - 2012-08-13 Ian Bolton <ian.bolton@arm.com> - Laurent Desnogues <laurent.desnogues@arm.com> - Jim MacArthur <jim.macarthur@arm.com> -@@ -516,6 +593,14 @@ - * common.h (EM_res183): Rename to EM_AARCH64. - (EM_res184): Rename to EM_ARM184. - -+2012-08-02 Sean Keys <skeys@ipdatasys.com> ++2017-03-28 Hans-Peter Nilsson <hp@axis.com> + -+ * m68hc11.h: #define E_M68HC11_NO_BANK_WARNING 0x000000200 ++ PR ld/16044 ++ * testsuite/ld-cris/pr16044.d, testsuite/ld-cris/dso-1c.s, ++ testsuite/ld-cris/dso-2b.s, testsuite/ld-cris/dso-4.s: New test. + -+2012-07-13 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> ++2017-04-10 H.J. Lu <hongjiu.lu@intel.com> + -+ * s390.h (START_RELOC_NUMBERS): Define R_390_IRELATIVE reloc. ++ PR ld/19579 ++ PR ld/21306 ++ * testsuite/ld-elf/pr19579a.c (main): Updated. + - 2012-06-28 Iain Sandoe <iain@codesourcery.com> - - * common.h (AT_L1I_CACHESHAPE, AT_L1D_CACHESHAPE, -@@ -565,7 +650,7 @@ - 2012-05-11 Georg-Johann Lay <avr@gjlay.de - - PR target/13503 -- * elf/avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8, -+ * avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8, - R_AVR_8_HI8, R_AVR_8_HHI8. - - 2012-05-03 Sean Keys <skeys@ipdatasys.com> -@@ -577,6 +662,10 @@ - * sparc.h: Add new ELF_SPARC_HWCAP_* defines for crypto, - pause, and compare-and-branch instructions. - -+2012-04-12 David S. Miller <davem@davemloft.net> ++2017-04-05 Maciej W. Rozycki <macro@imgtec.com> + -+ * sparc.h (R_SPARC_WDISP10): New reloc. ++ PR ld/21233 ++ * ldlang.c (insert_undefined): Set `mark' for ELF symbols. + - 2012-03-07 Nick Clifton <nickc@redhat.com> - - * mn10300.h (elf_mn10300_reloc_type): Add R_MN10300_TLS_GD, -@@ -1096,13 +1185,13 @@ - - 2009-08-09 Michael Eager <eager@eagercon.com> - -- * elf/common.h: Define EM_resnnn reserved values. Add EM_AVR32, -+ * common.h: Define EM_resnnn reserved values. Add EM_AVR32, - EM_STM8, EM_TILE64, EM_TILEPRO. Change EM_MICROBLAZE. - - 2009-08-06 Michael Eager <eager@eagercon.com> - -- * elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. -- * elf/microblaze.h: New reloc definitions. -+ * common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. -+ * microblaze.h: New reloc definitions. - - 2009-07-30 Alan Modra <amodra@bigpond.net.au> - -@@ -1171,7 +1260,7 @@ - - 2009-04-24 Cary Coutant <ccoutant@google.com> - -- * dwarf2.h (DW_LNE_set_discriminator): New enum value. -+ * dwarf2.h (DW_LNE_set_discriminator): New enum value. - - 2009-04-15 Anthony Green <green@moxielogic.com> - -@@ -1303,12 +1392,22 @@ - (R_CRIS_32_GOT_TPREL, R_CRIS_16_GOT_TPREL, R_CRIS_32_TPREL) - (R_CRIS_16_TPREL): New relocations. - -+2008-09-24 Richard Henderson <rth@redhat.com> ++2017-03-07 Alan Modra <amodra@gmail.com> + -+ * dwarf2.h (DW_OP_GNU_encoded_addr): New. ++ * ldlang.c (open_input_bfds): Check that lang_assignment_statement ++ is not an assert before referencing defsym. + - 2008-08-20 Bob Wilson <bob.wilson@acm.org> + 2017-03-02 Tristan Gingold <gingold@adacore.com> - * xtensa.h (R_XTENSA_TLSDESC_FN, R_XTENSA_TLSDESC_ARG) - (R_XTENSA_TLS_DTPOFF, R_XTENSA_TLS_TPOFF, R_XTENSA_TLS_FUNC) - (R_XTENSA_TLS_ARG, R_XTENSA_TLS_CALL): New. + * configure: Regenerate. +diff --git a/ld/ldlang.c b/ld/ldlang.c +index dafc348..a8ff0a4 100644 +--- a/ld/ldlang.c ++++ b/ld/ldlang.c +@@ -3377,7 +3377,8 @@ open_input_bfds (lang_statement_union_type *s, enum open_bfd_mode mode) + #endif + break; + case lang_assignment_statement_enum: +- if (s->assignment_statement.exp->assign.defsym) ++ if (s->assignment_statement.exp->type.node_class != etree_assert ++ && s->assignment_statement.exp->assign.defsym) + /* This is from a --defsym on the command line. */ + exp_fold_tree_no_dot (s->assignment_statement.exp); + break; +@@ -3431,6 +3432,8 @@ insert_undefined (const char *name) + { + h->type = bfd_link_hash_undefined; + h->u.undef.abfd = NULL; ++ if (is_elf_hash_table (link_info.hash)) ++ ((struct elf_link_hash_entry *) h)->mark = 1; + bfd_link_add_undef (link_info.hash, h); + } + } +diff --git a/ld/testsuite/ld-cris/dso-1c.s b/ld/testsuite/ld-cris/dso-1c.s +new file mode 100644 +index 0000000..92ad4ee +--- /dev/null ++++ b/ld/testsuite/ld-cris/dso-1c.s +@@ -0,0 +1,2 @@ ++ .include "dso-1.s" ++ .hidden dsofn +diff --git a/ld/testsuite/ld-cris/dso-2b.s b/ld/testsuite/ld-cris/dso-2b.s +new file mode 100644 +index 0000000..f1fbf14 +--- /dev/null ++++ b/ld/testsuite/ld-cris/dso-2b.s +@@ -0,0 +1,2 @@ ++ .include "dso-2.s" ++ .hidden dsofn +diff --git a/ld/testsuite/ld-cris/dso-4.s b/ld/testsuite/ld-cris/dso-4.s +new file mode 100644 +index 0000000..767a0d8 +--- /dev/null ++++ b/ld/testsuite/ld-cris/dso-4.s +@@ -0,0 +1,6 @@ ++ .text ++ .global export_2 ++ .type export_2,@function ++export_2: ++ .hidden dsofn ++ move.d dsofn:GOTOFF,$r4 +diff --git a/ld/testsuite/ld-cris/pr16044.d b/ld/testsuite/ld-cris/pr16044.d +new file mode 100644 +index 0000000..e5d373d +--- /dev/null ++++ b/ld/testsuite/ld-cris/pr16044.d +@@ -0,0 +1,43 @@ ++#source: dso-4.s ++#source: dso-2b.s ++#source: dso-1c.s ++#as: --pic --no-underscore --em=criself -I$srcdir/$subdir ++#ld: --shared -m crislinux ++#readelf: -s -r ++ ++# PR 16044 is about a (compile-time-non-local) hidden function symbol, ++# entered as an undef reference with a R_CRIS_32_PLT_GOTREL relocation ++# referring to a hidden symbol, later defined. Here, we invalidly ++# incremented the h->plt.refcount (from -1) as part of that relocation ++# processing. There are some PLTGOT relocations. As there are no ++# circumstances requiring a PLT entry for this symbol, its PLT entry ++# can be eliminated and the PLTGOT relocations can be made to a static ++# element in the GOT, relocated with the absolute-to-relative ++# R_CRIS_RELATIVE relocation without symbol lookup. As part of ++# eliminating unneeded PLT entries (and PLTGOT to "static" GOT ++# elimination), a later pass noticed the inconsistency through an ++# assert. ++# ++# The key points in this dump that may need future adjustments are the ++# single dynamic relocation, that the dsofn symbol it points to, is ++# local, its absence from the dynamic symbol table and that the ++# relocation and symbol values match. ++ ++Relocation section '\.rela\.dyn' at offset 0x[0-9a-f]+ contains 1 entries: ++ Offset[ ]+Info[ ]+Type[ ]+Sym\.Value Sym\. Name \+ Addend ++[0-9a-f]+ 0+[0-9a-f]+ R_CRIS_RELATIVE[ ]+184 ++ ++Symbol table '\.dynsym' contains 7 entries: ++ +Num: +Value +Size +Type +Bind +Vis +Ndx +Name ++ +0: 0+ +0 +NOTYPE +LOCAL +DEFAULT +UND ++ +1: [0-9a-f]+ +0 +SECTION +LOCAL +DEFAULT +5 ++ +2: [0-9a-f]+ +0 +FUNC +GLOBAL +DEFAULT +5 export_1 ++ +3: [0-9a-f]+ +0 +NOTYPE +GLOBAL +DEFAULT +7 __bss_start ++ +4: [0-9a-f]+ +0 +NOTYPE +GLOBAL +DEFAULT +7 _edata ++ +5: [0-9a-f]+ +0 +NOTYPE +GLOBAL +DEFAULT +7 _end ++ +6: [0-9a-f]+ +0 +FUNC +GLOBAL +DEFAULT +5 export_2 ++ ++Symbol table '\.symtab' contains [0-9]+ entries: ++#... ++ +[0-9]+: 0+184 +2 FUNC + LOCAL + DEFAULT + 5 dsofn ++#... +diff --git a/ld/testsuite/ld-elf/pr19579a.c b/ld/testsuite/ld-elf/pr19579a.c +index e4a6eb1..69d0f35 100644 +--- a/ld/testsuite/ld-elf/pr19579a.c ++++ b/ld/testsuite/ld-elf/pr19579a.c +@@ -9,7 +9,7 @@ extern int *bar_p (void); + int + main () + { +- if (foo[0] == 0 && foo == foo_p () && bar[0] == 0 && bar == bar_p ()) ++ if (foo[0] == 0 && foo == foo_p () && bar[0] == -1 && bar == bar_p ()) + printf ("PASS\n"); + return 0; + } +diff --git a/ld/testsuite/ld-i386/vxworks2.sd b/ld/testsuite/ld-i386/vxworks2.sd +index 5ff87d3..4f56f2a 100644 +--- a/ld/testsuite/ld-i386/vxworks2.sd ++++ b/ld/testsuite/ld-i386/vxworks2.sd +@@ -6,7 +6,7 @@ Program Headers: + Type .* + PHDR .* + #... +- LOAD .* 0x00080000 0x00080000 .* R E 0x1000 ++ LOAD .* 0x0007f000 0x0007f000 .* R E 0x1000 + LOAD .* 0x00081000 0x00081000 .* RW 0x1000 + DYNAMIC .* -+2008-08-08 Anatoly Sokolov <aesok@post.ru> +diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog +index 1ea126a..5dfe166 100644 +--- a/opcodes/ChangeLog ++++ b/opcodes/ChangeLog +@@ -1,3 +1,67 @@ ++2017-05-01 Michael Clark <michaeljclark@mac.com> + -+ * avr.h (E_AVR_MACH_AVR25, E_AVR_MACH_AVR31, -+ E_AVR_MACH_AVR35, E_AVR_MACH_AVR51): Define. -+ (EF_AVR_MACH): Redefine to 0x7F. ++ * riscv-opc.c (riscv_opcodes) <call>: Use RA not T1 as a temporary ++ register. + - 2008-08-08 Richard Sandiford <rdsandiford@googlemail.com> - Daniel Jacobowitz <dan@codesourcery.com> - Catherine Moore <clm@codesourcery.com> -@@ -1329,6 +1428,18 @@ - - * common.h: Define NT_PPC_VSX. - -+2008-07-12 Jie Zhang <jie.zhang@analog.com> ++2017-04-03 Palmer Dabbelt <palmer@dabbelt.com> + -+ Revert -+ 2008-07-12 Jie Zhang <jie.zhang@analog.com> -+ * bfin.h (EF_BFIN_CODE_IN_L1): Define. -+ (EF_BFIN_DATA_IN_L1): Define. ++ * riscv-dis.c (riscv_disassemble_insn): Change "_gp" to ++ RISCV_GP_SYMBOL. + -+2008-07-12 Jie Zhang <jie.zhang@analog.com> ++2017-03-14 Kito Cheng <kito.cheng@gmail.com> + -+ * bfin.h (EF_BFIN_CODE_IN_L1): Define. -+ (EF_BFIN_DATA_IN_L1): Define. ++ * riscv-opc.c (riscv_opcodes> <c.li>: Use the 'o' immediate encoding. ++ <c.andi>: Likewise. ++ <c.addiw> Likewise. + - 2008-07-10 Richard Sandiford <rdsandiford@googlemail.com> - - * mips.h (ELF_ST_IS_MIPS16, ELF_ST_SET_MIPS16): New macros. -@@ -1366,7 +1477,7 @@ - - 2008-04-16 David S. Miller <davem@davemloft.net> - -- * elf/sparc.h (R_SPARC_GOTDATA_HIX22, -+ * sparc.h (R_SPARC_GOTDATA_HIX22, - R_SPARC_GOTDATA_LOX10, R_SPARC_GOTDATA_OP_HIX22, - R_SPARC_GOTDATA_OP_LOX10, R_SPARC_GOTDATA_OP, - R_SPARC_H34, R_SPARC_SIZE32, R_SPARC_SIZE64): New relocs. -@@ -1689,6 +1800,7 @@ - - 2006-05-24 Carlos O'Donell <carlos@systemhalted.org> - Randolph Chung <randolph@tausq.org> ++2017-03-14 Kito Cheng <kito.cheng@gmail.com> + - * hppa.h (R_PARISC_TLS_GD21L, R_PARISC_TLS_GD14R, R_PARISC_TLS_GDCALL, - R_PARISC_TLS_LDM21L, R_PARISC_TLS_LDM14R, R_PARISC_TLS_LDMCALL, - R_PARISC_TLS_LDO21L, R_PARISC_TLS_LDO14R, R_PARISC_TLS_DTPMOD32, -diff --git a/include/gdb/ChangeLog b/include/gdb/ChangeLog -index 57a83ce..5a3ecee 100644 ---- a/include/gdb/ChangeLog -+++ b/include/gdb/ChangeLog -@@ -51,9 +51,13 @@ - - * section-scripts.h: New file. - -+2013-10-22 Sterling Augustine <saugustine@google.com> ++ * riscv-opc.c (riscv_opcodes) <c.addi>: Use match_opcode. + -+ * gdb-index.h: Merge from gdb tree. ++2017-03-13 Andrew Waterman <andrew@sifive.com> + - 2013-03-15 Steve Ellcey <sellcey@mips.com> - -- * gdb/remote-sim.h (sim_command_completer): Make char arguments const. -+ * remote-sim.h (sim_command_completer): Make char arguments const. - - 2013-01-01 Joel Brobecker <brobecker@adacore.com> - -@@ -218,7 +222,7 @@ - - 2003-06-10 Corinna Vinschen <vinschen@redhat.com> - -- * gdb/fileio.h: New file. -+ * fileio.h: New file. - - 2003-05-07 Andrew Cagney <cagney@redhat.com> - -@@ -256,7 +260,7 @@ - 2002-07-29 Andrey Volkov <avolkov@transas.com> - - * sim-h8300.h: Rename all enums from H8300_ to SIM_H8300_ -- prefix. -+ prefix. - - 2002-07-23 Andrey Volkov <avolkov@transas.com> - -diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog -index 0aee194..87d4653 100644 ---- a/include/opcode/ChangeLog -+++ b/include/opcode/ChangeLog -@@ -95,10 +95,10 @@ - * aarch64.h [__cplusplus]: Wrap in extern "C". - - 2015-10-07 Claudiu Zissulescu <claziss@synopsys.com> -- Cupertino Miranda <cmiranda@synopsys.com> -+ Cupertino Miranda <cmiranda@synopsys.com> - -- * arc-func.h: New file. -- * arc.h: Likewise. -+ * arc-func.h: New file. -+ * arc.h: Likewise. - - 2015-10-02 Yao Qi <yao.qi@linaro.org> - -@@ -115,6 +115,10 @@ - (S390_INSTR_FLAG_VX): New flag. - (S390_INSTR_FLAG_FACILITY_MASK): New flag mask. - -+2015-09-26 James Bowman <james.bowman@ftdichip.com> ++ * riscv-opc.c (riscv_opcodes) <srli/C>: Use match_opcode. ++ <srl> Likewise. ++ <srai> Likewise. ++ <sra> Likewise. + -+ * ft32.h: Add instruction macros FT32_*() ++2017-03-27 Alan Modra <amodra@gmail.com> + - 2015-09-23 Nick Clifton <nickc@redhat.com> - - * ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left -@@ -258,6 +262,14 @@ - (NIOS2_INSN_ORI, NIOS2_INSN_XORI): Delete. - (NIOS2_INSN_OPTARG): Renumber. - -+2014-11-21 Terry Guo <terry.guo@arm.com> ++ PR 21303 ++ * ppc-dis.c (struct ppc_mopt): Comment. ++ (ppc_opts <e200z4>): Move PPC_OPCODE_VLE from .sticky to .cpu. + -+ * arm.h (FPU_VFP_EXT_ARMV8xD): New macro. -+ (FPU_VFP_V5D16): Likewise. -+ (FPU_VFP_V5_SP_D16): Likewise. -+ (FPU_ARCH_VFP_V5D16): Likewise. -+ (FPU_ARCH_VFP_V5_SP_D16): Likewise. ++2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + - 2014-11-06 Sandra Loosemore <sandra@codesourcery.com> - - * nios2.h (nios2_find_opcode_hash): Add mach parameter to -@@ -347,7 +359,7 @@ - * mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT, - OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6 - instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, -- +I, +O, +R, +:, +\, +", +; -+ +I, +O, +R, +:, +\, +", +; - (mips_check_prev_operand): New struct. - (INSN2_FORBIDDEN_SLOT): New define. - (INSN_ISA32R6): New define. -@@ -425,6 +437,10 @@ - - * mips.h (mips_isa_table): Avoid hard-coding INSN_ISA* values. - -+2014-04-23 Andrew Bennett <andrew.bennett@imgtec.com> ++ Backport from mainline ++ 2017-03-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com> + -+ * mips.h (ASE_XPA): New define. ++ * s390-mkopc.c (main): Remove vx2 check. ++ * s390-opc.txt: Remove vx2 instruction flags. + - 2014-04-22 Christian Svensson <blue@cmd.nu> - - * or32.h: Delete. -@@ -472,6 +488,11 @@ - * aarch64.h (aarch64_sys_reg_readonly_p): New declaration. - (aarch64_sys_reg_writeonly_p): Ditto. - -+2013-11-11 Catherine Moore <clm@codesourcery.com> ++2017-03-08 Peter Bergner <bergner@vnet.ibm.com> + -+ * mips.h (INSN_LOAD_MEMORY_DELAY): Rename to... -+ (INSN_LOAD_MEMORY): ...this. ++ * ppc-dis.c (ppc_opts) <altivec>: Do not use PPC_OPCODE_ALTIVEC2; ++ <vsx>: Do not use PPC_OPCODE_VSX3; + - 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com> - - * aarch64.h (aarch64_sys_reg): New typedef. -@@ -514,6 +535,11 @@ - * mips.h (OP_OPTIONAL_REG): New mips_operand_type. - (mips_optional_operand_p): New function. - -+2013-08-05 Eric Botcazou <ebotcazou@adacore.com> -+ Konrad Eisele <konrad@gaisler.com> ++2017-03-08 Peter Bergner <bergner@vnet.ibm.com> + -+ * sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_LEON. ++ Apply from master. ++ 2017-03-08 Peter Bergner <bergner@vnet.ibm.com> ++ * ppc-opc.c (powerpc_opcodes) <lnia>: New extended mnemonic. + - 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de> - Richard Sandiford <rdsandiford@googlemail.com> - -@@ -677,6 +703,21 @@ - - * nios2.h (OP_MATCH_ERET): Correct eret encoding. - -+2013-06-08 Catherine Moore <clm@codesourcery.com> ++2017-03-07 Alan Modra <amodra@gmail.com> + -+ * mips.h (mips_opcode): Add ase field. -+ (INSN_ASE_MASK): Delete. -+ (INSN_DSP): Rename to ASE_DSP. Provide new value. -+ (INSN_DSPR2): Rename to ASE_DSPR2. Provide new value. -+ (INSN_MCU): Rename to ASE_MCU. Provide new value. -+ (INSN_MDMX): Rename to ASE_MDMX. Provide new value. -+ (INSN_MIPS3d): Rename to ASE_MIPS3D. Provide new value. -+ (INSN_MT): Rename to ASE_MT. Provide new value. -+ (INSN_SMARTMIPS): Rename to ASE_SMARTMIPS. Provide new value. -+ (INSN_VIRT): Rename to ASE_VIRT. Provide new value. -+ (INSN_VIRT64): Rename to ASE_VIRT64. Provide new value. -+ (opcode_is_member): Add ase argument. Check ase. ++ Apply from master ++ 2017-03-06 Alan Modra <amodra@gmail.com> ++ PR 21124 ++ * ppc-opc.c (extract_esync, extract_ls, extract_ral, extract_ram) ++ (extract_raq, extract_ras, extract_rbx): New functions. ++ (powerpc_operands): Use opposite corresponding insert function. ++ (Q_MASK): Define. ++ (powerpc_opcodes): Apply Q_MASK to all quad insns with even ++ register restriction. + - 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de> + 2017-03-02 Tristan Gingold <gingold@adacore.com> - * mips.h (M_LQC2_AB, M_SQC2_AB): New macros. -@@ -741,6 +782,20 @@ - * tic6x-opcode-table.h: Modify absdp, dpint, dpsp, dptrunc, rcpdp - and rsqrdp opcodes to use the new field coding types. + * configure: Regenerate. +diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c +index e0eff7a..baa7388 100644 +--- a/opcodes/ppc-dis.c ++++ b/opcodes/ppc-dis.c +@@ -45,8 +45,19 @@ struct dis_private + (((struct dis_private *) ((INFO)->private_data))->dialect) + + struct ppc_mopt { ++ /* Option string, without -m or -M prefix. */ + const char *opt; ++ /* CPU option flags. */ + ppc_cpu_t cpu; ++ /* Flags that should stay on, even when combined with another cpu ++ option. This should only be used for generic options like ++ "-many" or "-maltivec" where it is reasonable to add some ++ capability to another cpu selection. The added flags are sticky ++ so that, for example, "-many -me500" and "-me500 -many" result in ++ the same assembler or disassembler behaviour. Do not use ++ "sticky" for specific cpus, as this will prevent that cpu's flags ++ from overriding the defaults set in powerpc_init_dialect or a ++ prior -m option. */ + ppc_cpu_t sticky; + }; + +@@ -93,7 +104,7 @@ struct ppc_mopt ppc_opts[] = { + | PPC_OPCODE_A2), + 0 }, + { "altivec", PPC_OPCODE_PPC, +- PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 }, ++ PPC_OPCODE_ALTIVEC }, + { "any", 0, + PPC_OPCODE_ANY }, + { "booke", PPC_OPCODE_PPC | PPC_OPCODE_BOOKE, +@@ -108,8 +119,8 @@ struct ppc_mopt ppc_opts[] = { + { "e200z4", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE| PPC_OPCODE_SPE + | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK + | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI +- | PPC_OPCODE_E500 | PPC_OPCODE_E200Z4), +- PPC_OPCODE_VLE }, ++ | PPC_OPCODE_E500 | PPC_OPCODE_VLE | PPC_OPCODE_E200Z4), ++ 0 }, + { "e300", PPC_OPCODE_PPC | PPC_OPCODE_E300, + 0 }, + { "e500", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE +@@ -221,7 +232,7 @@ struct ppc_mopt ppc_opts[] = { + | PPC_OPCODE_E500), + PPC_OPCODE_VLE }, + { "vsx", PPC_OPCODE_PPC, +- PPC_OPCODE_VSX | PPC_OPCODE_VSX3 }, ++ PPC_OPCODE_VSX }, + { "htm", PPC_OPCODE_PPC, + PPC_OPCODE_HTM }, + }; +diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c +index 9ac779c..f7d1dcd 100644 +--- a/opcodes/ppc-opc.c ++++ b/opcodes/ppc-opc.c +@@ -54,6 +54,7 @@ static long extract_bo (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_boe (unsigned long, long, ppc_cpu_t, const char **); + static long extract_boe (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_esync (unsigned long, long, ppc_cpu_t, const char **); ++static long extract_esync (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_dcmxs (unsigned long, long, ppc_cpu_t, const char **); + static long extract_dcmxs (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_dxd (unsigned long, long, ppc_cpu_t, const char **); +@@ -65,6 +66,7 @@ static long extract_fxm (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_li20 (unsigned long, long, ppc_cpu_t, const char **); + static long extract_li20 (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_ls (unsigned long, long, ppc_cpu_t, const char **); ++static long extract_ls (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_mbe (unsigned long, long, ppc_cpu_t, const char **); + static long extract_mbe (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_mb6 (unsigned long, long, ppc_cpu_t, const char **); +@@ -76,12 +78,17 @@ static long extract_nsi (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_oimm (unsigned long, long, ppc_cpu_t, const char **); + static long extract_oimm (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_ral (unsigned long, long, ppc_cpu_t, const char **); ++static long extract_ral (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_ram (unsigned long, long, ppc_cpu_t, const char **); ++static long extract_ram (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_raq (unsigned long, long, ppc_cpu_t, const char **); ++static long extract_raq (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_ras (unsigned long, long, ppc_cpu_t, const char **); ++static long extract_ras (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_rbs (unsigned long, long, ppc_cpu_t, const char **); + static long extract_rbs (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_rbx (unsigned long, long, ppc_cpu_t, const char **); ++static long extract_rbx (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_rx (unsigned long, long, ppc_cpu_t, const char **); + static long extract_rx (unsigned long, ppc_cpu_t, int *); + static unsigned long insert_ry (unsigned long, long, ppc_cpu_t, const char **); +@@ -462,7 +469,7 @@ const struct powerpc_operand powerpc_operands[] = + /* The LS or WC field in an X (sync or wait) form instruction. */ + #define LS LIA + 1 + #define WC LS +- { 0x3, 21, insert_ls, NULL, PPC_OPERAND_OPTIONAL }, ++ { 0x3, 21, insert_ls, extract_ls, PPC_OPERAND_OPTIONAL }, + + /* The ME field in an M form instruction. */ + #define ME LS + 1 +@@ -519,24 +526,24 @@ const struct powerpc_operand powerpc_operands[] = + value restrictions. */ + #define RAQ RA0 + 1 + #define RAX RAQ +- { 0x1f, 16, insert_raq, NULL, PPC_OPERAND_GPR_0 }, ++ { 0x1f, 16, insert_raq, extract_raq, PPC_OPERAND_GPR_0 }, + + /* The RA field in a D or X form instruction which is an updating + load, which means that the RA field may not be zero and may not + equal the RT field. */ + #define RAL RAQ + 1 +- { 0x1f, 16, insert_ral, NULL, PPC_OPERAND_GPR_0 }, ++ { 0x1f, 16, insert_ral, extract_ral, PPC_OPERAND_GPR_0 }, + + /* The RA field in an lmw instruction, which has special value + restrictions. */ + #define RAM RAL + 1 +- { 0x1f, 16, insert_ram, NULL, PPC_OPERAND_GPR_0 }, ++ { 0x1f, 16, insert_ram, extract_ram, PPC_OPERAND_GPR_0 }, + + /* The RA field in a D or X form instruction which is an updating + store or an updating floating point load, which means that the RA + field may not be zero. */ + #define RAS RAM + 1 +- { 0x1f, 16, insert_ras, NULL, PPC_OPERAND_GPR_0 }, ++ { 0x1f, 16, insert_ras, extract_ras, PPC_OPERAND_GPR_0 }, + + /* The RA field of the tlbwe, dccci and iccci instructions, + which are optional. */ +@@ -557,7 +564,7 @@ const struct powerpc_operand powerpc_operands[] = + /* The RB field in an lswx instruction, which has special value + restrictions. */ + #define RBX RBS + 1 +- { 0x1f, 11, insert_rbx, NULL, PPC_OPERAND_GPR }, ++ { 0x1f, 11, insert_rbx, extract_rbx, PPC_OPERAND_GPR }, + + /* The RB field of the dccci and iccci instructions, which are optional. */ + #define RBOPT RBX + 1 +@@ -580,6 +587,7 @@ const struct powerpc_operand powerpc_operands[] = + which have special value restrictions. */ + #define RSQ RS + 1 + #define RTQ RSQ ++#define Q_MASK (1 << 21) + { 0x1e, 21, NULL, NULL, PPC_OPERAND_GPR }, + + /* The RS field of the tlbwe instruction, which is optional. */ +@@ -694,7 +702,7 @@ const struct powerpc_operand powerpc_operands[] = + + /* The ESYNC field in an X (sync) form instruction. */ + #define ESYNC STRM + 1 +- { 0xf, 16, insert_esync, NULL, PPC_OPERAND_OPTIONAL }, ++ { 0xf, 16, insert_esync, extract_esync, PPC_OPERAND_OPTIONAL }, + + /* The SV field in a POWER SC form instruction. */ + #define SV ESYNC + 1 +@@ -1533,6 +1541,22 @@ insert_ls (unsigned long insn, + return insn | ((value & 0x3) << 21); + } -+2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de> -+ -+ * nios2.h: Edit comment. -+ -+2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de> -+ -+ * nios2.h (OPX_WRPRS): New define. -+ (OP_MATCH_WRPRS): Likewise. -+ -+2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de> ++static long ++extract_ls (unsigned long insn, ++ ppc_cpu_t dialect, ++ int *invalid) ++{ ++ unsigned long lvalue = (insn >> 21) & 3; + -+ * nios2.h (OP_RDPRS): New define. -+ (OP_MATCH_RDPRS): Likewise. ++ if (((insn >> 1) & 0x3ff) == 598) ++ { ++ unsigned long max_lvalue = (dialect & PPC_OPCODE_POWER4) ? 2 : 1; ++ if (lvalue > max_lvalue) ++ *invalid = 1; ++ } ++ return lvalue; ++} + - 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com> - - * arm.h (CRC_EXT_ARMV8): New constant. -@@ -798,6 +853,10 @@ - (make_instruction,match_opcode): Added function prototypes. - (cr16_words,cr16_allWords,cr16_currInsn): Declare as extern. + /* The 4-bit E field in a sync instruction that accepts 2 operands. + If ESYNC is non-zero, then the L field must be either 0 or 1 and + the complement of ESYNC-bit2. */ +@@ -1560,6 +1584,27 @@ insert_esync (unsigned long insn, + return insn | ((value & 0xf) << 16); + } -+2012-12-17 Nick Clifton <nickc@redhat.com> -+ -+ * tahoe.h: Add copyright notice. ++static long ++extract_esync (unsigned long insn, ++ ppc_cpu_t dialect, ++ int *invalid) ++{ ++ unsigned long ls = (insn >> 21) & 0x3; ++ unsigned long lvalue = (insn >> 16) & 0xf; + - 2012-11-23 Alan Modra <amodra@gmail.com> - - * ppc.h (ppc_parse_cpu): Update prototype. -@@ -811,10 +870,36 @@ - - * s390.h (s390_opcode_cpu_val): Add S390_OPCODE_ZEC12. - -+2012-09-27 Anthony Green <green@moxielogic.com> ++ if (lvalue == 0) ++ { ++ if (((dialect & PPC_OPCODE_E6500) != 0 && ls > 1) ++ || ((dialect & PPC_OPCODE_POWER9) != 0 && ls > 2)) ++ *invalid = 1; ++ } ++ else if ((ls & ~0x1) ++ || (((lvalue >> 1) & 0x1) ^ ls) == 0) ++ *invalid = 1; + -+ * moxie.h (MOXIE_BAD): New define. ++ return lvalue; ++} + - 2012-09-04 Sergey A. Guriev <sergey.a.guriev@intel.com> - - * ia64.h (ia64_opnd): Add new operand types. + /* The MB and ME fields in an M form instruction expressed as a single + operand which is itself a bitmask. The extraction function always + marks it as invalid, since we never want to recognize an +@@ -1743,6 +1788,19 @@ insert_ral (unsigned long insn, + return insn | ((value & 0x1f) << 16); + } -+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> -+ -+ * arm.h (ARM_CPU_IS_ANY): New define. -+ -+2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> ++static long ++extract_ral (unsigned long insn, ++ ppc_cpu_t dialect ATTRIBUTE_UNUSED, ++ int *invalid) ++{ ++ long rtvalue = (insn >> 21) & 0x1f; ++ long ravalue = (insn >> 16) & 0x1f; + -+ * arm.h (ARM_EXT_V8): New define. -+ (FPU_VFP_EXT_ARMV8): Likewise. -+ (FPU_NEON_EXT_ARMV8): Likewise. -+ (FPU_CRYPTO_EXT_ARMV8): Likewise. -+ (ARM_AEXT_V8A): Likewise. -+ (FPU_VFP_ARMV8): Likwise. -+ (FPU_NEON_ARMV8): Likewise. -+ (FPU_CRYPTO_ARMV8): Likewise. -+ (FPU_ARCH_VFP_ARMV8): Likewise. -+ (FPU_ARCH_NEON_VFP_ARMV8): Likewise. -+ (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise. -+ (ARM_ARCH_V8A): Likwise. -+ (ARM_ARCH_V8A_FP): Likewise. -+ (ARM_ARCH_V8A_SIMD): Likewise. -+ (ARM_ARCH_V8A_CRYPTO): Likewise. ++ if (rtvalue == ravalue || ravalue == 0) ++ *invalid = 1; ++ return ravalue; ++} + - 2012-08-21 David S. Miller <davem@davemloft.net> - - * sparc.h (F3F4): New macro. -@@ -859,6 +944,10 @@ + /* The RA field in an lmw instruction, which has special value + restrictions. */ - * mips.h: Fix a typo in description. +@@ -1757,6 +1815,19 @@ insert_ram (unsigned long insn, + return insn | ((value & 0x1f) << 16); + } -+2012-07-05 Sean Keys <skeys@ipdatasys.com> ++static long ++extract_ram (unsigned long insn, ++ ppc_cpu_t dialect ATTRIBUTE_UNUSED, ++ int *invalid) ++{ ++ unsigned long rtvalue = (insn >> 21) & 0x1f; ++ unsigned long ravalue = (insn >> 16) & 0x1f; + -+ * xgate.h: Changed the format string for mode XGATE_OP_DYA_MON. ++ if (ravalue >= rtvalue) ++ *invalid = 1; ++ return ravalue; ++} + - 2012-06-07 Georg-Johann Lay <avr@gjlay.de> + /* The RA field in the DQ form lq or an lswx instruction, which have special + value restrictions. */ - * avr.h: (AVR_ISA_XCH): New define. -@@ -906,6 +995,10 @@ - HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE, - HWCAP_CBCOND, HWCAP_CRC32): New defines. +@@ -1773,6 +1844,19 @@ insert_raq (unsigned long insn, + return insn | ((value & 0x1f) << 16); + } -+2012-04-12 David S. Miller <davem@davemloft.net> ++static long ++extract_raq (unsigned long insn, ++ ppc_cpu_t dialect ATTRIBUTE_UNUSED, ++ int *invalid) ++{ ++ unsigned long rtvalue = (insn >> 21) & 0x1f; ++ unsigned long ravalue = (insn >> 16) & 0x1f; + -+ * sparc.h: Define '=' as generating R_SPARC_WDISP10. ++ if (ravalue == rtvalue) ++ *invalid = 1; ++ return ravalue; ++} + - 2012-03-10 Edmar Wienskoski <edmar@freescale.com> - - * ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR. -@@ -1275,6 +1368,14 @@ - * cgen.h (CGEN_ATTR, CGEN_ATTR_TYPE): Rename bool attribute to bool_. - (CGEN_ATTR_BOOLS, CGEN_ATTR_CGEN_INSN_ALIAS_VALUE): Likewise. + /* The RA field in a D or X form instruction which is an updating + store or an updating floating point load, which means that the RA + field may not be zero. */ +@@ -1788,6 +1872,18 @@ insert_ras (unsigned long insn, + return insn | ((value & 0x1f) << 16); + } -+2010-09-29 Bernd Schmidt <bernds@codesourcery.com> -+ -+ * tic6x-control-registers.h (tscl): Now read_write. -+ -+2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> ++static long ++extract_ras (unsigned long insn, ++ ppc_cpu_t dialect ATTRIBUTE_UNUSED, ++ int *invalid) ++{ ++ unsigned long ravalue = (insn >> 16) & 0x1f; + -+ * s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val. ++ if (ravalue == 0) ++ *invalid = 1; ++ return ravalue; ++} + - 2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> - - * arm.h (ARM_EXT_VIRT): New define. -@@ -1306,6 +1407,16 @@ - - * bfin.h: Strip trailing whitespace. + /* The RB field in an X form instruction when it must be the same as + the RS field in the instruction. This is used for extended + mnemonics like mr. This operand is marked FAKE. The insertion +@@ -1829,6 +1925,19 @@ insert_rbx (unsigned long insn, + return insn | ((value & 0x1f) << 11); + } -+2009-09-04 Jie Zhang <jie.zhang@analog.com> ++static long ++extract_rbx (unsigned long insn, ++ ppc_cpu_t dialect ATTRIBUTE_UNUSED, ++ int *invalid) ++{ ++ unsigned long rtvalue = (insn >> 21) & 0x1f; ++ unsigned long rbvalue = (insn >> 11) & 0x1f; + -+ * bfin.h (PseudoDbg_Assert): Add bits_grp and mask_grp. -+ (PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask): Define. -+ (PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask, -+ PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask): -+ Adjust accordingly. -+ (init_PseudoDbg_Assert): Add PseudoDbg_Assert_grp_bits and -+ PseudoDbg_Assert_grp_mask. ++ if (rbvalue == rtvalue) ++ *invalid = 1; ++ return rbvalue; ++} + - 2010-07-29 DJ Delorie <dj@redhat.com> - - * rx.h (RX_Operand_Type): Add TwoReg. -@@ -1358,7 +1469,7 @@ - - 2010-05-26 Catherine Moore <clm@codesourcery.com> - -- * opcode/mips.h (INSN_MIPS16): Remove. -+ * mips.h (INSN_MIPS16): Remove. - - 2010-04-21 Joseph Myers <joseph@codesourcery.com> - -@@ -1428,7 +1539,7 @@ + /* The SCI8 field is made up of SCL and {U,N}I8 fields. */ + static unsigned long + insert_sci8 (unsigned long insn, +@@ -2443,6 +2552,8 @@ extract_vleil (unsigned long insn, + /* An DX form instruction. */ + #define DX(op, xop) (OP (op) | ((((unsigned long)(xop)) & 0x1f) << 1)) + #define DX_MASK DX (0x3f, 0x1f) ++/* An DX form instruction with the D bits specified. */ ++#define NODX_MASK (DX_MASK | 0x1fffc1) - 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com> + /* An EVSEL form instruction. */ + #define EVSEL(op, xop) (OP (op) | (((unsigned long)(xop)) & 0xff) << 3) +@@ -4155,6 +4266,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { -- * opcode/ppc.h (PPC_OPCODE_TITAN): Define. -+ * ppc.h (PPC_OPCODE_TITAN): Define. + {"mcrf", XL(19,0), XLBB_MASK|(3<<21)|(3<<16), COM, PPCVLE, {BF, BFA}}, - 2010-01-14 H.J. Lu <hongjiu.lu@intel.com> ++{"lnia", DX(19,2), NODX_MASK, POWER9, PPCVLE, {RT}}, + {"addpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, DXD}}, + {"subpcis", DX(19,2), DX_MASK, POWER9, PPCVLE, {RT, NDXD}}, -@@ -1552,7 +1663,7 @@ +@@ -4974,7 +5086,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { - 2009-01-28 Doug Evans <dje@google.com> + {"stdux", X(31,181), X_MASK, PPC64, 0, {RS, RAS, RB}}, -- * opcode/i386.h: Add multiple inclusion protection. -+ * i386.h: Add multiple inclusion protection. - (EAX_REG_NUM,ECX_REG_NUM,EDX_REGNUM,EBX_REG_NUM,ESI_REG_NUM) - (EDI_REG_NUM): New macros. - (MODRM_MOD_FIELD,MODRM_REG_FIELD,MODRM_RM_FIELD): New macros. -@@ -1583,6 +1694,14 @@ - * ia64.h (ia64_resource_specifier): Add IA64_RS_CR_IIB. Update - IA64_RS_CR. +-{"stqcx.", XRC(31,182,1), X_MASK, POWER8, 0, {RSQ, RA0, RB}}, ++{"stqcx.", XRC(31,182,1), X_MASK|Q_MASK, POWER8, 0, {RSQ, RA0, RB}}, + {"wchkall", X(31,182), X_MASK, PPCA2, 0, {OBF}}, -+2008-08-08 Anatoly Sokolov <aesok@post.ru> -+ -+ * avr.h (AVR_ISA_TINY3, AVR_ISA_ALL, AVR_ISA_USB162): Remove. -+ (AVR_ISA_AVR3): Redefine. -+ (AVR_ISA_AVR1, AVR_ISA_AVR2, AVR_ISA_AVR31, AVR_ISA_AVR35, -+ AVR_ISA_AVR3_ALL, AVR_ISA_AVR4, AVR_ISA_AVR5, AVR_ISA_AVR51, -+ AVR_ISA_AVR6): Define. -+ - 2008-08-01 Peter Bergner <bergner@vnet.ibm.com> + {"stwux", X(31,183), X_MASK, PPCCOM, 0, {RS, RAS, RB}}, +@@ -5105,7 +5217,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { - * ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New. -@@ -2039,7 +2158,7 @@ - 2005-07-28 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + {"mfapidi", X(31,275), X_MASK, BOOKE, E500|TITAN, {RT, RA}}, - PR gas/336 -- * hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb -+ * hppa.h (pa_opcodes): Allow 0 immediates in PA 2.0 variants of pdtlb - and pitlb. +-{"lqarx", X(31,276), XEH_MASK, POWER8, 0, {RTQ, RAX, RBX, EH}}, ++{"lqarx", X(31,276), XEH_MASK|Q_MASK, POWER8, 0, {RTQ, RAX, RBX, EH}}, - 2005-07-27 Jan Beulich <jbeulich@novell.com> -diff --git a/ld/ChangeLog b/ld/ChangeLog -index 75fd708..e74db8c 100644 ---- a/ld/ChangeLog -+++ b/ld/ChangeLog -@@ -1,3 +1,194 @@ -+2016-03-17 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-03-15 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR ld/19827 -+ * testsuite/ld-i386/i386.exp: Run PR ld/19827 tests. -+ * testsuite/ld-x86-64/x86-64.exp: Likewise. -+ * testsuite/ld-i386/pr19827.rd: New file. -+ * testsuite/ld-i386/pr19827a.S: Likewise. -+ * testsuite/ld-i386/pr19827b.S: Likewise. -+ * testsuite/ld-x86-64/pr19827.rd: Likewise. -+ * testsuite/ld-x86-64/pr19827a.S: Likewise. -+ * testsuite/ld-x86-64/pr19827b.S: Likewise. -+ -+2016-03-15 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-02-20 H.J. Lu <hongjiu.lu@intel.com> -+ -+ * testsuite/ld-elf/pr19539.d: Skip cris*-*-* targets. -+ -+ 2016-01-30 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR ld/19539 -+ * testsuite/ld-elf/pr19539.d: New file. -+ * testsuite/ld-elf/pr19539.s: Likewise. -+ * testsuite/ld-elf/pr19539.t: Likewise. -+ -+2016-03-14 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2015-12-07 Jan Beulich <jbeulich@suse.com> -+ -+ * ld-elf/gabiend.rt: Accept any alignment. -+ * ld-elf/gabinormal.rt: Likewise. -+ -+2016-03-09 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-03-04 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR ld/19579 -+ * testsuite/ld-elf/pr19579a.c: New file. -+ * testsuite/ld-elf/pr19579b.c: Likewise. -+ * testsuite/ld-elf/shared.exp: Run PR ld/19579 test. -+ -+2016-03-04 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-03-02 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR ld/19739 -+ * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Don't -+ merge flags of other input sections for relocatable link. -+ * emultempl/mmo.em (mmo_place_orphan): Likewise. -+ * emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise. -+ * emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise. -+ -+2016-03-01 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-03-01 H.J. Lu <hongjiu.lu@intel.com> -+ -+ * testsuite/ld-plugin/lto.exp: Update PR ld/12365 test for GCC 6. -+ -+2016-02-26 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-02-24 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR ld/19698 -+ * testsuite/ld-elf/pr19698.d: New file. -+ * testsuite/ld-elf/pr19698.s: Likewise. -+ * testsuite/ld-elf/pr19698.t: Likewise. -+ -+2016-02-26 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-02-01 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR ld/19553 -+ * testsuite/ld-elf/indirect.exp: Run tests for PR ld/19553. -+ * testsuite/ld-elf/pr19553.map: New file. -+ * testsuite/ld-elf/pr19553.map: Likewise. -+ * testsuite/ld-elf/pr19553a.c: Likewise. -+ * testsuite/ld-elf/pr19553b.c: Likewise. -+ * testsuite/ld-elf/pr19553b.out: Likewise. -+ * testsuite/ld-elf/pr19553c.c: Likewise. -+ * testsuite/ld-elf/pr19553c.out: Likewise. -+ * testsuite/ld-elf/pr19553d.c: Likewise. -+ * testsuite/ld-elf/pr19553d.out: Likewise. -+ -+2016-02-25 Jiong Wang <jiong.wang@arm.com> -+ -+ Backport from master -+ 2016-01-20 Jiong Wang <jiong.wang@arm.com> -+ -+ * testsuite/ld-aarch64/farcall-section.d: Delete. -+ * testsuite/ld-aarch64/farcall-section.s: Delete. -+ * testsuite/ld-aarch64/farcall-b-section.d: New expectation file. -+ * testsuite/ld-aarch64/farcall-bl-section.d: Likewise. -+ * testsuite/ld-aarch64/farcall-b-section.s: New testcase. -+ * testsuite/ld-aarch64/farcall-bl-section.s: Likewise. -+ * testsuite/ld-aarch64/aarch64-elf.exp: Likewise. -+ -+2016-02-11 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-02-11 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR ld/19615 -+ * ld.texinfo: Document -Bsymbolic and -Bsymbolic-functions for -+ PIE. -+ * lexsup.c (parse_args): Enable -Bsymbolic and -+ -Bsymbolic-functions for PIE. -+ * testsuite/ld-i386/i386.exp: Run pr19615. -+ * testsuite/ld-i386/pr19615.d: New file. -+ * testsuite/ld-i386/pr19615.s: Likewise. -+ * testsuite/ld-x86-64/pr19615.d: Likewise. -+ * testsuite/ld-x86-64/pr19615.s: Likewise. -+ -+2016-02-03 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-02-03 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR gas/19520 -+ * testsuite/ld-i386/branch1.d: Pass -mrelax-relocations=yes to as. -+ * testsuite/ld-i386/call1.d: Likewise. -+ * testsuite/ld-i386/call2.d: Likewise. -+ * testsuite/ld-i386/call3a.d: Likewise. -+ * testsuite/ld-i386/call3b.d: Likewise. -+ * testsuite/ld-i386/call3c.d: Likewise. -+ * testsuite/ld-i386/call3d.d: Likewise. -+ * testsuite/ld-i386/call3e.d: Likewise. -+ * testsuite/ld-i386/call3f.d: Likewise. -+ * testsuite/ld-i386/call3g.d: Likewise. -+ * testsuite/ld-i386/call3h.d: Likewise. -+ * testsuite/ld-i386/jmp1.d: Likewise. -+ * testsuite/ld-i386/jmp2.d: Likewise. -+ * testsuite/ld-i386/lea1c.d: Likewise. -+ * testsuite/ld-i386/load1.d: Likewise. -+ * testsuite/ld-i386/load2.d: Likewise. -+ * testsuite/ld-i386/load3.d: Likewise. -+ * testsuite/ld-i386/load4a.d: Likewise. -+ * testsuite/ld-i386/load5a.d: Likewise. -+ * testsuite/ld-i386/mov2b.d: Likewise. -+ * testsuite/ld-i386/mov3.d: Likewise. -+ * testsuite/ld-ifunc/ifunc-21-x86-64.d: Likewise. -+ * testsuite/ld-ifunc/ifunc-22-x86-64.d: Likewise. -+ * testsuite/ld-ifunc/ifunc-5r-local-x86-64.d: Likewise. -+ * testsuite/ld-x86-64/call1a.d: Likewise. -+ * testsuite/ld-x86-64/call1b.d: Likewise. -+ * testsuite/ld-x86-64/call1c.d: Likewise. -+ * testsuite/ld-x86-64/call1d.d: Likewise. -+ * testsuite/ld-x86-64/call1e.d: Likewise. -+ * testsuite/ld-x86-64/call1f.d: Likewise. -+ * testsuite/ld-x86-64/call1h.d: Likewise. -+ * testsuite/ld-x86-64/call1i.d: Likewise. -+ * testsuite/ld-x86-64/load1a.d: Likewise. -+ * testsuite/ld-x86-64/load1b.d: Likewise. -+ * testsuite/ld-i386/got1a.S: Load GOT into %ecx and use it. -+ * testsuite/ld-i386/got1.dd: Updated. -+ * testsuite/ld-i386/got1d.S (1): Removed. -+ * testsuite/ld-i386/i386.exp: Add -Wa,-mrelax-relocations=yes. -+ * testsuite/ld-x86-64/x86-64.exp: Likewise. -+ -+2016-02-02 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-02-02 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR ld/18591 -+ * testsuite/ld-x86-64/pr18591.d: New file. -+ * testsuite/ld-x86-64/pr18591.s: Likewise. -+ * testsuite/ld-x86-64/x86-64.exp: Run pr18591. -+ -+2016-01-29 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-01-29 H.J. Lu <hongjiu.lu@intel.com> -+ -+ PR ld/19533 -+ * configure.ac (compressed_debug_sections): Replace == with =. -+ * configure: Regenerated. -+ -+2016-01-25 Tristan Gingold <gingold@adacore.com> -+ -+ * configure: Regenerate. -+ - 2016-01-25 Tristan Gingold <gingold@adacore.com> + {"lscbx", XRC(31,277,0), X_MASK, M601, 0, {RT, RA, RB}}, + {"lscbx.", XRC(31,277,1), X_MASK, M601, 0, {RT, RA, RB}}, +@@ -6052,7 +6164,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { - * configure: Regenerate. -@@ -89,7 +280,7 @@ - decide placement. - - 2015-10-27 Laurent Alfonsi <laurent.alfonsi@st.com> -- Christophe Monat <christophe.monat@st.com> -+ Christophe Monat <christophe.monat@st.com> - - * ld.texinfo: Add description of the STM32L4xx erratum - workaround. -@@ -129,7 +320,7 @@ - - 2015-10-22 H.J. Lu <hongjiu.lu@intel.com> - -- * ld/ld.texinfo: Document "-z call-nop=PADDING" option. -+ * ld.texinfo: Document "-z call-nop=PADDING" option. - * emulparams/call_nop.sh: New file. - * emulparams/elf_i386_be.sh: Source - ${srcdir}/emulparams/call_nop.sh. -@@ -165,7 +356,7 @@ - - 2015-10-15 Simon Dardis <Simon.Dardis@imgtec.com> - -- * ld/ldexp.c: (try_copy_symbol_flags): New. Factored out from... -+ * ldexp.c: (try_copy_symbol_flags): New. Factored out from... - (exp_fold_tree_1): Here. Cope with ternary operator in - assignments. Use new helper. - -@@ -308,7 +499,7 @@ - 2015-09-09 James Bowman <james.bowman@ftdichip.com> - - * scripttempl/ft32.sc: default linker script RAM and -- FLASH size symbols -+ FLASH size symbols - - 2015-09-09 Nick Clifton <nickc@redhat.com> - -@@ -359,58 +550,58 @@ - - 2015-08-18 H.J. Lu <hongjiu.lu@intel.com> - -- * ld/ldctor.c: Replace shared, executable, relocatable and pie -+ * ldctor.c: Replace shared, executable, relocatable and pie - fields with bfd_link_executable, bfd_link_dll, - bfd_link_relocatable, bfd_link_pic and bfd_link_pie. -- * ld/ldemul.c: Likewise. -- * ld/ldfile.c: Likewise. -- * ld/ldlang.c: Likewise. -- * ld/ldmain.c: Likewise. -- * ld/ldwrite.c: Likewise. -- * ld/lexsup.c: Likewise. -- * ld/pe-dll.c: Likewise. -- * ld/plugin.c: Likewise. -- * ld/emultempl/aarch64elf.em: Likewise. -- * ld/emultempl/aix.em: Likewise. -- * ld/emultempl/alphaelf.em: Likewise. -- * ld/emultempl/armcoff.em: Likewise. -- * ld/emultempl/armelf.em: Likewise. -- * ld/emultempl/avrelf.em: Likewise. -- * ld/emultempl/beos.em: Likewise. -- * ld/emultempl/cr16elf.em: Likewise. -- * ld/emultempl/elf-generic.em: Likewise. -- * ld/emultempl/elf32.em: Likewise. -- * ld/emultempl/genelf.em: Likewise. -- * ld/emultempl/generic.em: Likewise. -- * ld/emultempl/gld960.em: Likewise. -- * ld/emultempl/gld960c.em: Likewise. -- * ld/emultempl/hppaelf.em: Likewise. -- * ld/emultempl/irix.em: Likewise. -- * ld/emultempl/linux.em: Likewise. -- * ld/emultempl/lnk960.em: Likewise. -- * ld/emultempl/m68hc1xelf.em: Likewise. -- * ld/emultempl/m68kcoff.em: Likewise. -- * ld/emultempl/m68kelf.em: Likewise. -- * ld/emultempl/metagelf.em: Likewise. -- * ld/emultempl/mipself.em: Likewise. -- * ld/emultempl/mmo.em: Likewise. -- * ld/emultempl/msp430.em: Likewise. -- * ld/emultempl/nds32elf.em: Likewise. -- * ld/emultempl/needrelax.em: Likewise. -- * ld/emultempl/nios2elf.em: Likewise. -- * ld/emultempl/pe.em: Likewise. -- * ld/emultempl/pep.em: Likewise. -- * ld/emultempl/ppc32elf.em: Likewise. -- * ld/emultempl/ppc64elf.em: Likewise. -- * ld/emultempl/sh64elf.em: Likewise. -- * ld/emultempl/solaris2.em: Likewise. -- * ld/emultempl/spuelf.em: Likewise. -- * ld/emultempl/sunos.em: Likewise. -- * ld/emultempl/tic6xdsbt.em: Likewise. -- * ld/emultempl/ticoff.em: Likewise. -- * ld/emultempl/v850elf.em: Likewise. -- * ld/emultempl/vms.em: Likewise. -- * ld/emultempl/vxworks.em: Likewise. -+ * ldemul.c: Likewise. -+ * ldfile.c: Likewise. -+ * ldlang.c: Likewise. -+ * ldmain.c: Likewise. -+ * ldwrite.c: Likewise. -+ * lexsup.c: Likewise. -+ * pe-dll.c: Likewise. -+ * plugin.c: Likewise. -+ * emultempl/aarch64elf.em: Likewise. -+ * emultempl/aix.em: Likewise. -+ * emultempl/alphaelf.em: Likewise. -+ * emultempl/armcoff.em: Likewise. -+ * emultempl/armelf.em: Likewise. -+ * emultempl/avrelf.em: Likewise. -+ * emultempl/beos.em: Likewise. -+ * emultempl/cr16elf.em: Likewise. -+ * emultempl/elf-generic.em: Likewise. -+ * emultempl/elf32.em: Likewise. -+ * emultempl/genelf.em: Likewise. -+ * emultempl/generic.em: Likewise. -+ * emultempl/gld960.em: Likewise. -+ * emultempl/gld960c.em: Likewise. -+ * emultempl/hppaelf.em: Likewise. -+ * emultempl/irix.em: Likewise. -+ * emultempl/linux.em: Likewise. -+ * emultempl/lnk960.em: Likewise. -+ * emultempl/m68hc1xelf.em: Likewise. -+ * emultempl/m68kcoff.em: Likewise. -+ * emultempl/m68kelf.em: Likewise. -+ * emultempl/metagelf.em: Likewise. -+ * emultempl/mipself.em: Likewise. -+ * emultempl/mmo.em: Likewise. -+ * emultempl/msp430.em: Likewise. -+ * emultempl/nds32elf.em: Likewise. -+ * emultempl/needrelax.em: Likewise. -+ * emultempl/nios2elf.em: Likewise. -+ * emultempl/pe.em: Likewise. -+ * emultempl/pep.em: Likewise. -+ * emultempl/ppc32elf.em: Likewise. -+ * emultempl/ppc64elf.em: Likewise. -+ * emultempl/sh64elf.em: Likewise. -+ * emultempl/solaris2.em: Likewise. -+ * emultempl/spuelf.em: Likewise. -+ * emultempl/sunos.em: Likewise. -+ * emultempl/tic6xdsbt.em: Likewise. -+ * emultempl/ticoff.em: Likewise. -+ * emultempl/v850elf.em: Likewise. -+ * emultempl/vms.em: Likewise. -+ * emultempl/vxworks.em: Likewise. - - 2015-08-18 Alan Modra <amodra@gmail.com> - -diff --git a/ld/configure b/ld/configure -index a446283..8095b71 100755 ---- a/ld/configure -+++ b/ld/configure -@@ -1,6 +1,6 @@ - #! /bin/sh - # Guess values for system-dependent variables and create Makefiles. --# Generated by GNU Autoconf 2.64 for ld 2.26. -+# Generated by GNU Autoconf 2.64 for ld 2.26.0. - # - # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, - # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software -@@ -556,8 +556,8 @@ MAKEFLAGS= - # Identity of this package. - PACKAGE_NAME='ld' - PACKAGE_TARNAME='ld' --PACKAGE_VERSION='2.26' --PACKAGE_STRING='ld 2.26' -+PACKAGE_VERSION='2.26.0' -+PACKAGE_STRING='ld 2.26.0' - PACKAGE_BUGREPORT='' - PACKAGE_URL='' - -@@ -1350,7 +1350,7 @@ if test "$ac_init_help" = "long"; then - # Omit some internal or obsolete options to make the list less imposing. - # This message is too long to be a string in the A/UX 3.1 sh. - cat <<_ACEOF --\`configure' configures ld 2.26 to adapt to many kinds of systems. -+\`configure' configures ld 2.26.0 to adapt to many kinds of systems. - - Usage: $0 [OPTION]... [VAR=VALUE]... - -@@ -1421,7 +1421,7 @@ fi - - if test -n "$ac_init_help"; then - case $ac_init_help in -- short | recursive ) echo "Configuration of ld 2.26:";; -+ short | recursive ) echo "Configuration of ld 2.26.0:";; - esac - cat <<\_ACEOF - -@@ -1545,7 +1545,7 @@ fi - test -n "$ac_init_help" && exit $ac_status - if $ac_init_version; then - cat <<\_ACEOF --ld configure 2.26 -+ld configure 2.26.0 - generated by GNU Autoconf 2.64 - - Copyright (C) 2009 Free Software Foundation, Inc. -@@ -2254,7 +2254,7 @@ cat >config.log <<_ACEOF - This file contains any messages produced by compilers while - running configure, to aid debugging if configure makes a mistake. - --It was created by ld $as_me 2.26, which was -+It was created by ld $as_me 2.26.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - $ $0 $@ -@@ -4063,7 +4063,7 @@ fi - - # Define the identity of the package. - PACKAGE='ld' -- VERSION='2.26' -+ VERSION='2.26.0' - - - cat >>confdefs.h <<_ACEOF -@@ -17134,7 +17134,7 @@ do - fi - done - --if test x$ac_default_compressed_debug_sections == xyes ; then -+if test x$ac_default_compressed_debug_sections = xyes ; then - - $as_echo "#define DEFAULT_FLAG_COMPRESS_DEBUG 1" >>confdefs.h - -@@ -17740,7 +17740,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 - # report actual input values of CONFIG_FILES etc. instead of their - # values after options handling. - ac_log=" --This file was extended by ld $as_me 2.26, which was -+This file was extended by ld $as_me 2.26.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - CONFIG_FILES = $CONFIG_FILES -@@ -17804,7 +17804,7 @@ Report bugs to the package provider." - _ACEOF - cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 - ac_cs_version="\\ --ld config.status 2.26 -+ld config.status 2.26.0 - configured by $0, generated by GNU Autoconf 2.64, - with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" - -diff --git a/ld/configure.ac b/ld/configure.ac -index 188172d..e28f38e 100644 ---- a/ld/configure.ac -+++ b/ld/configure.ac -@@ -384,7 +384,7 @@ do - fi - done - --if test x$ac_default_compressed_debug_sections == xyes ; then -+if test x$ac_default_compressed_debug_sections = xyes ; then - AC_DEFINE(DEFAULT_FLAG_COMPRESS_DEBUG, 1, [Define if you want compressed debug sections by default.]) - fi - -diff --git a/ld/emultempl/elf32.em b/ld/emultempl/elf32.em -index 0405d4f..809b27c 100644 ---- a/ld/emultempl/elf32.em -+++ b/ld/emultempl/elf32.em -@@ -1946,25 +1946,32 @@ gld${EMULATION_NAME}_place_orphan (asection *s, - return os; - } + {"lhbrx", X(31,790), X_MASK, COM, 0, {RT, RA0, RB}}, -+ flags = s->flags; -+ if (!bfd_link_relocatable (&link_info)) -+ { -+ nexts = s; -+ while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)) -+ != NULL) -+ if (nexts->output_section == NULL -+ && (nexts->flags & SEC_EXCLUDE) == 0 -+ && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 -+ && (nexts->owner->flags & DYNAMIC) == 0 -+ && nexts->owner->usrdata != NULL -+ && !(((lang_input_statement_type *) nexts->owner->usrdata) -+ ->flags.just_syms) -+ && _bfd_elf_match_sections_by_type (nexts->owner, nexts, -+ s->owner, s)) -+ flags = (((flags ^ SEC_READONLY) -+ | (nexts->flags ^ SEC_READONLY)) -+ ^ SEC_READONLY); -+ } -+ - /* Decide which segment the section should go in based on the - section name and section flags. We put loadable .note sections - right after the .interp section, so that the PT_NOTE segment is - stored right after the program headers where the OS can read it - in the first page. */ - -- flags = s->flags; -- nexts = s; -- while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)) != NULL) -- if (nexts->output_section == NULL -- && (nexts->flags & SEC_EXCLUDE) == 0 -- && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 -- && (nexts->owner->flags & DYNAMIC) == 0 -- && nexts->owner->usrdata != NULL -- && !(((lang_input_statement_type *) nexts->owner->usrdata) -- ->flags.just_syms) -- && _bfd_elf_match_sections_by_type (nexts->owner, nexts, s->owner, s)) -- flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY)) -- ^ SEC_READONLY); - place = NULL; - if ((flags & (SEC_ALLOC | SEC_DEBUGGING)) == 0) - place = &hold[orphan_nonalloc]; -diff --git a/ld/emultempl/mmo.em b/ld/emultempl/mmo.em -index 8949aed..3a382ec 100644 ---- a/ld/emultempl/mmo.em -+++ b/ld/emultempl/mmo.em -@@ -107,22 +107,28 @@ mmo_place_orphan (asection *s, - return os; - } +-{"lfdpx", X(31,791), X_MASK, POWER6, POWER7, {FRTp, RA0, RB}}, ++{"lfdpx", X(31,791), X_MASK|Q_MASK, POWER6, POWER7, {FRTp, RA0, RB}}, + {"lfqx", X(31,791), X_MASK, POWER2, 0, {FRT, RA, RB}}, -+ flags = s->flags; -+ if (!bfd_link_relocatable (&link_info)) -+ { -+ nexts = s; -+ while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)) -+ != NULL) -+ if (nexts->output_section == NULL -+ && (nexts->flags & SEC_EXCLUDE) == 0 -+ && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 -+ && (nexts->owner->flags & DYNAMIC) == 0 -+ && nexts->owner->usrdata != NULL -+ && !(((lang_input_statement_type *) nexts->owner->usrdata) -+ ->flags.just_syms)) -+ flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY)) -+ ^ SEC_READONLY); -+ } -+ - /* Check for matching section type flags for sections we care about. - A section without contents can have SEC_LOAD == 0, but we still - want it attached to a sane section so the symbols appear as - expected. */ -- flags = s->flags; -- nexts = s; -- while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts)) != NULL) -- if (nexts->output_section == NULL -- && (nexts->flags & SEC_EXCLUDE) == 0 -- && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 -- && (nexts->owner->flags & DYNAMIC) == 0 -- && nexts->owner->usrdata != NULL -- && !(((lang_input_statement_type *) nexts->owner->usrdata) -- ->flags.just_syms)) -- flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY)) -- ^ SEC_READONLY); -+ - if ((flags & (SEC_ALLOC | SEC_READONLY)) != SEC_READONLY) - for (i = 0; i < sizeof (holds) / sizeof (holds[0]); i++) - if ((flags & holds[i].nonzero_flags) != 0) -diff --git a/ld/emultempl/pe.em b/ld/emultempl/pe.em -index 0370c5a..bddd9a8 100644 ---- a/ld/emultempl/pe.em -+++ b/ld/emultempl/pe.em -@@ -2225,21 +2225,27 @@ gld_${EMULATION_NAME}_place_orphan (asection *s, - orphan_init_done = 1; - } - -+ flags = s->flags; -+ if (!bfd_link_relocatable (&link_info)) -+ { -+ nexts = s; -+ while ((nexts = bfd_get_next_section_by_name (nexts->owner, -+ nexts))) -+ if (nexts->output_section == NULL -+ && (nexts->flags & SEC_EXCLUDE) == 0 -+ && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 -+ && (nexts->owner->flags & DYNAMIC) == 0 -+ && nexts->owner->usrdata != NULL -+ && !(((lang_input_statement_type *) nexts->owner->usrdata) -+ ->flags.just_syms)) -+ flags = (((flags ^ SEC_READONLY) -+ | (nexts->flags ^ SEC_READONLY)) -+ ^ SEC_READONLY); -+ } -+ - /* Try to put the new output section in a reasonable place based - on the section name and section flags. */ - -- flags = s->flags; -- nexts = s; -- while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts))) -- if (nexts->output_section == NULL -- && (nexts->flags & SEC_EXCLUDE) == 0 -- && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 -- && (nexts->owner->flags & DYNAMIC) == 0 -- && nexts->owner->usrdata != NULL -- && !(((lang_input_statement_type *) nexts->owner->usrdata) -- ->flags.just_syms)) -- flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY)) -- ^ SEC_READONLY); - place = NULL; - if ((flags & SEC_ALLOC) == 0) - ; -diff --git a/ld/emultempl/pep.em b/ld/emultempl/pep.em -index 91de501..5ddeffc 100644 ---- a/ld/emultempl/pep.em -+++ b/ld/emultempl/pep.em -@@ -1996,21 +1996,27 @@ gld_${EMULATION_NAME}_place_orphan (asection *s, - orphan_init_done = 1; - } - -+ flags = s->flags; -+ if (!bfd_link_relocatable (&link_info)) -+ { -+ nexts = s; -+ while ((nexts = bfd_get_next_section_by_name (nexts->owner, -+ nexts))) -+ if (nexts->output_section == NULL -+ && (nexts->flags & SEC_EXCLUDE) == 0 -+ && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 -+ && (nexts->owner->flags & DYNAMIC) == 0 -+ && nexts->owner->usrdata != NULL -+ && !(((lang_input_statement_type *) nexts->owner->usrdata) -+ ->flags.just_syms)) -+ flags = (((flags ^ SEC_READONLY) -+ | (nexts->flags ^ SEC_READONLY)) -+ ^ SEC_READONLY); -+ } -+ - /* Try to put the new output section in a reasonable place based - on the section name and section flags. */ - -- flags = s->flags; -- nexts = s; -- while ((nexts = bfd_get_next_section_by_name (nexts->owner, nexts))) -- if (nexts->output_section == NULL -- && (nexts->flags & SEC_EXCLUDE) == 0 -- && ((nexts->flags ^ flags) & (SEC_LOAD | SEC_ALLOC)) == 0 -- && (nexts->owner->flags & DYNAMIC) == 0 -- && nexts->owner->usrdata != NULL -- && !(((lang_input_statement_type *) nexts->owner->usrdata) -- ->flags.just_syms)) -- flags = (((flags ^ SEC_READONLY) | (nexts->flags ^ SEC_READONLY)) -- ^ SEC_READONLY); - place = NULL; - if ((flags & SEC_ALLOC) == 0) - ; -diff --git a/ld/ld.texinfo b/ld/ld.texinfo -index 1dd7492..2389661 100644 ---- a/ld/ld.texinfo -+++ b/ld/ld.texinfo -@@ -1325,15 +1325,21 @@ libraries. - When creating a shared library, bind references to global symbols to the - definition within the shared library, if any. Normally, it is possible - for a program linked against a shared library to override the definition --within the shared library. This option is only meaningful on ELF --platforms which support shared libraries. -+within the shared library. This option can also be used with the -+@option{--export-dynamic} option, when creating a position independent -+executable, to bind references to global symbols to the definition within -+the executable. This option is only meaningful on ELF platforms which -+support shared libraries and position independent executables. - - @kindex -Bsymbolic-functions - @item -Bsymbolic-functions - When creating a shared library, bind references to global function - symbols to the definition within the shared library, if any. -+This option can also be used with the @option{--export-dynamic} option, -+when creating a position independent executable, to bind references -+to global function symbols to the definition within the executable. - This option is only meaningful on ELF platforms which support shared --libraries. -+libraries and position independent executables. - - @kindex --dynamic-list=@var{dynamic-list-file} - @item --dynamic-list=@var{dynamic-list-file} -diff --git a/ld/lexsup.c b/ld/lexsup.c -index 4cad209..e2fb212 100644 ---- a/ld/lexsup.c -+++ b/ld/lexsup.c -@@ -1586,15 +1586,14 @@ parse_args (unsigned argc, char **argv) - /* We may have -Bsymbolic, -Bsymbolic-functions, --dynamic-list-data, - --dynamic-list-cpp-new, --dynamic-list-cpp-typeinfo and - --dynamic-list FILE. -Bsymbolic and -Bsymbolic-functions are -- for shared libraries. -Bsymbolic overrides all others and vice -- versa. */ -+ for PIC outputs. -Bsymbolic overrides all others and vice versa. */ - switch (command_line.symbolic) - { - case symbolic_unset: - break; - case symbolic: -- /* -Bsymbolic is for shared library only. */ -- if (bfd_link_dll (&link_info)) -+ /* -Bsymbolic is for PIC output only. */ -+ if (bfd_link_pic (&link_info)) - { - link_info.symbolic = TRUE; - /* Should we free the unused memory? */ -@@ -1603,8 +1602,8 @@ parse_args (unsigned argc, char **argv) - } - break; - case symbolic_functions: -- /* -Bsymbolic-functions is for shared library only. */ -- if (bfd_link_dll (&link_info)) -+ /* -Bsymbolic-functions is for PIC output only. */ -+ if (bfd_link_pic (&link_info)) - command_line.dynamic_list = dynamic_list_data; - break; - } -diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog -index cb51928..d09a332 100644 ---- a/ld/testsuite/ChangeLog -+++ b/ld/testsuite/ChangeLog -@@ -117,12 +117,12 @@ - * ld-x86-64/plt-main3.rd: Also check GOTPCRELX. - - 2015-10-29 Catherine Moore <clm@codesourcery.com> -- -- * ld-mips-elf/mips16-fp-stub-1.s: New. -- * ld-mips-elf/mips16-fp-stub-2.s: New. -- * ld-mips-elf/mips16-fp-stub.d: New. -- * ld-mips-elf/mips-elf.exp: Run new tests. -- * ld-mips-elf/mips16-intermix.d: Update expected output. -+ -+ * ld-mips-elf/mips16-fp-stub-1.s: New. -+ * ld-mips-elf/mips16-fp-stub-2.s: New. -+ * ld-mips-elf/mips16-fp-stub.d: New. -+ * ld-mips-elf/mips-elf.exp: Run new tests. -+ * ld-mips-elf/mips16-intermix.d: Update expected output. - - 2015-10-28 H.J. Lu <hongjiu.lu@intel.com> - -@@ -133,7 +133,7 @@ - * ld-x86-64/pr19162b.s: Likewise. - - 2015-10-27 Laurent Alfonsi <laurent.alfonsi@st.com> -- Christophe Monat <christophe.monat@st.com> -+ Christophe Monat <christophe.monat@st.com> - - * ld-arm/arm-elf.exp (armelftests_common): Add STM32L4XX - tests. -@@ -1069,7 +1069,6 @@ - - 2015-05-28 Catherine Moore <clm@codesourcery.com> - -- ld/testsuite/ - * ld-mips-elf/compact-eh.ld: New linker script. - * ld-mips-elf/compact-eh1.d: New. - * ld-mips-elf/compact-eh1.s: New. -diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp -index 0e5b31e..576cc65 100644 ---- a/ld/testsuite/ld-aarch64/aarch64-elf.exp -+++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp -@@ -170,7 +170,6 @@ run_dump_test "pcrel_pic_defined_local" - - run_dump_test "limit-b" - run_dump_test "limit-bl" --run_dump_test "farcall-section" - run_dump_test "farcall-back" - run_dump_test "farcall-b-defsym" - run_dump_test "farcall-bl-defsym" -@@ -181,6 +180,8 @@ run_dump_test "farcall-bl" - run_dump_test "farcall-b" - run_dump_test "farcall-b-none-function" - run_dump_test "farcall-bl-none-function" -+run_dump_test "farcall-b-section" -+run_dump_test "farcall-bl-section" - - run_dump_test "tls-relax-all" - run_dump_test "tls-relax-gd-le" -diff --git a/ld/testsuite/ld-aarch64/farcall-b-none-function.d b/ld/testsuite/ld-aarch64/farcall-b-none-function.d -index 34a6568..ba2981f 100644 ---- a/ld/testsuite/ld-aarch64/farcall-b-none-function.d -+++ b/ld/testsuite/ld-aarch64/farcall-b-none-function.d -@@ -2,4 +2,23 @@ - #source: farcall-b-none-function.s - #as: - #ld: -Ttext 0x1000 --section-start .foo=0x8001000 --#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_JUMP26 against symbol `bar'.* -+#objdump: -dr -+#... -+ -+Disassembly of section .text: -+ -+.* <_start>: -+ 1000: 14000003 b 100c <__bar_veneer> -+ 1004: d65f03c0 ret -+ 1008: 14000007 b 1024 <__bar_veneer\+0x18> -+ -+.* <__bar_veneer>: -+ 100c: 90040010 adrp x16, 8001000 <bar> -+ 1010: 91000210 add x16, x16, #0x0 -+ 1014: d61f0200 br x16 -+ ... -+ -+Disassembly of section .foo: -+ -+.* <bar>: -+ 8001000: d65f03c0 ret -diff --git a/ld/testsuite/ld-aarch64/farcall-b-section.d b/ld/testsuite/ld-aarch64/farcall-b-section.d -new file mode 100644 -index 0000000..4745c0f ---- /dev/null -+++ b/ld/testsuite/ld-aarch64/farcall-b-section.d -@@ -0,0 +1,34 @@ -+#name: aarch64-farcall-b-section -+#source: farcall-b-section.s -+#as: -+#ld: -Ttext 0x1000 --section-start .foo=0x8001000 -+#objdump: -dr -+#... -+ -+Disassembly of section .text: -+ -+.* <_start>: -+ 1000: 14000008 b 1020 <___veneer> -+ 1004: 14000003 b 1010 <___veneer> -+ 1008: d65f03c0 ret -+ 100c: 1400000d b 1040 <___veneer\+0x20> -+ -+.* <___veneer>: -+ 1010: 90040010 adrp x16, 8001000 <bar> -+ 1014: 91001210 add x16, x16, #0x4 -+ 1018: d61f0200 br x16 -+ 101c: 00000000 .inst 0x00000000 ; undefined -+ -+.* <___veneer>: -+ 1020: 90040010 adrp x16, 8001000 <bar> -+ 1024: 91000210 add x16, x16, #0x0 -+ 1028: d61f0200 br x16 -+ ... -+ -+Disassembly of section .foo: -+ -+.* <bar>: -+ 8001000: d65f03c0 ret -+ -+.* <bar2>: -+ 8001004: d65f03c0 ret -diff --git a/ld/testsuite/ld-aarch64/farcall-b-section.s b/ld/testsuite/ld-aarch64/farcall-b-section.s -new file mode 100644 -index 0000000..1a135ef ---- /dev/null -+++ b/ld/testsuite/ld-aarch64/farcall-b-section.s -@@ -0,0 +1,20 @@ -+.global _start -+ -+# We will place the section .text at 0x1000. -+ -+ .text -+ -+_start: -+ b bar -+ b bar2 -+ ret -+ -+# We will place the section .foo at 0x8001000. -+ -+ .section .foo, "xa" -+ .type bar, @function -+bar: -+ ret -+ .type bar2, @function -+bar2: -+ ret -diff --git a/ld/testsuite/ld-aarch64/farcall-bl-none-function.d b/ld/testsuite/ld-aarch64/farcall-bl-none-function.d -index 6ce9ca4..b6a4dda 100644 ---- a/ld/testsuite/ld-aarch64/farcall-bl-none-function.d -+++ b/ld/testsuite/ld-aarch64/farcall-bl-none-function.d -@@ -2,4 +2,23 @@ - #source: farcall-bl-none-function.s - #as: - #ld: -Ttext 0x1000 --section-start .foo=0x8001000 --#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_CALL26 against symbol `bar'.* -+#objdump: -dr -+#... -+ -+Disassembly of section .text: -+ -+.* <_start>: -+ 1000: 94000003 bl 100c <__bar_veneer> -+ 1004: d65f03c0 ret -+ 1008: 14000007 b 1024 <__bar_veneer\+0x18> -+ -+.* <__bar_veneer>: -+ 100c: 90040010 adrp x16, 8001000 <bar> -+ 1010: 91000210 add x16, x16, #0x0 -+ 1014: d61f0200 br x16 -+ ... -+ -+Disassembly of section .foo: -+ -+.* <bar>: -+ 8001000: d65f03c0 ret -diff --git a/ld/testsuite/ld-aarch64/farcall-bl-section.d b/ld/testsuite/ld-aarch64/farcall-bl-section.d -new file mode 100644 -index 0000000..2bd4f85 ---- /dev/null -+++ b/ld/testsuite/ld-aarch64/farcall-bl-section.d -@@ -0,0 +1,34 @@ -+#name: aarch64-farcall-bl-section -+#source: farcall-bl-section.s -+#as: -+#ld: -Ttext 0x1000 --section-start .foo=0x8001000 -+#objdump: -dr -+#... -+ -+Disassembly of section .text: -+ -+.* <_start>: -+ 1000: 94000008 bl 1020 <___veneer> -+ 1004: 94000003 bl 1010 <___veneer> -+ 1008: d65f03c0 ret -+ 100c: 1400000d b 1040 <___veneer\+0x20> -+ -+.* <___veneer>: -+ 1010: 90040010 adrp x16, 8001000 <bar> -+ 1014: 91001210 add x16, x16, #0x4 -+ 1018: d61f0200 br x16 -+ 101c: 00000000 .inst 0x00000000 ; undefined -+ -+.* <___veneer>: -+ 1020: 90040010 adrp x16, 8001000 <bar> -+ 1024: 91000210 add x16, x16, #0x0 -+ 1028: d61f0200 br x16 -+ ... -+ -+Disassembly of section .foo: -+ -+.* <bar>: -+ 8001000: d65f03c0 ret -+ -+.* <bar2>: -+ 8001004: d65f03c0 ret -diff --git a/ld/testsuite/ld-aarch64/farcall-bl-section.s b/ld/testsuite/ld-aarch64/farcall-bl-section.s -new file mode 100644 -index 0000000..4469d4d ---- /dev/null -+++ b/ld/testsuite/ld-aarch64/farcall-bl-section.s -@@ -0,0 +1,20 @@ -+ .global _start -+ -+# We will place the section .text at 0x1000. -+ -+ .text -+ -+_start: -+ bl bar -+ bl bar2 -+ ret -+ -+# We will place the section .foo at 0x8001000. -+ -+ .section .foo, "xa" -+ .type bar, @function -+bar: -+ ret -+ .type bar2, @function -+bar2: -+ ret -diff --git a/ld/testsuite/ld-aarch64/farcall-section.d b/ld/testsuite/ld-aarch64/farcall-section.d -deleted file mode 100644 -index 85775e1..0000000 ---- a/ld/testsuite/ld-aarch64/farcall-section.d -+++ /dev/null -@@ -1,5 +0,0 @@ --#name: Aarch64 farcall to symbol of type STT_SECTION --#source: farcall-section.s --#as: --#ld: -Ttext 0x1000 --section-start .foo=0x8001014 --#error: .*\(.text\+0x0\): relocation truncated to fit: R_AARCH64_CALL26 against `.foo' -diff --git a/ld/testsuite/ld-aarch64/farcall-section.s b/ld/testsuite/ld-aarch64/farcall-section.s -deleted file mode 100644 -index 86a070c..0000000 ---- a/ld/testsuite/ld-aarch64/farcall-section.s -+++ /dev/null -@@ -1,19 +0,0 @@ --# Test to ensure that an Aarch64 call exceeding 128MB generates an error --# if the destination is of type STT_SECTION (eg non-global symbol) -- -- .global _start -- --# We will place the section .text at 0x1000. -- -- .text -- --_start: -- bl bar -- --# We will place the section .foo at 0x8001020. -- -- .section .foo, "xa" -- --bar: -- ret -- -diff --git a/ld/testsuite/ld-elf/gabiend.rt b/ld/testsuite/ld-elf/gabiend.rt -index 23bc36c..75b5ba7 100644 ---- a/ld/testsuite/ld-elf/gabiend.rt -+++ b/ld/testsuite/ld-elf/gabiend.rt -@@ -1,4 +1,4 @@ - #... - +\[[0-9a-f]+\]: .*COMPRESSED -- +ZLIB, [0-9a-f]+, 1 -+ +ZLIB, [0-9a-f]+, [1-9][0-9]* - #pass -diff --git a/ld/testsuite/ld-elf/gabinormal.rt b/ld/testsuite/ld-elf/gabinormal.rt -index 23bc36c..75b5ba7 100644 ---- a/ld/testsuite/ld-elf/gabinormal.rt -+++ b/ld/testsuite/ld-elf/gabinormal.rt -@@ -1,4 +1,4 @@ - #... - +\[[0-9a-f]+\]: .*COMPRESSED -- +ZLIB, [0-9a-f]+, 1 -+ +ZLIB, [0-9a-f]+, [1-9][0-9]* - #pass -diff --git a/ld/testsuite/ld-elf/indirect.exp b/ld/testsuite/ld-elf/indirect.exp -index e8ac1ae..25845a0 100644 ---- a/ld/testsuite/ld-elf/indirect.exp -+++ b/ld/testsuite/ld-elf/indirect.exp -@@ -66,7 +66,11 @@ if { ![ld_compile $CC $srcdir/$subdir/indirect1a.c tmpdir/indirect1a.o] - || ![ld_compile $CC $srcdir/$subdir/indirect4a.c tmpdir/indirect4a.o] - || ![ld_compile $CC $srcdir/$subdir/indirect4b.c tmpdir/indirect4b.o] - || ![ld_compile "$CC -O2 -fPIC -I../bfd" $srcdir/$subdir/pr18720a.c tmpdir/pr18720a.o] -- || ![ld_compile $CC $srcdir/$subdir/pr18720b.c tmpdir/pr18720b.o] } { -+ || ![ld_compile $CC $srcdir/$subdir/pr18720b.c tmpdir/pr18720b.o] -+ || ![ld_compile "$CC -fPIC" $srcdir/$subdir/pr19553d.c tmpdir/pr19553d.o] -+ || ![ld_compile "$CC -fPIC" $srcdir/$subdir/pr19553c.c tmpdir/pr19553c.o] -+ || ![ld_compile "$CC -fPIC" $srcdir/$subdir/pr19553b.c tmpdir/pr19553b.o] -+ || ![ld_compile $CC $srcdir/$subdir/pr19553a.c tmpdir/pr19553a.o] } { - unresolved "Indirect symbol tests" - return - } -@@ -87,6 +91,15 @@ set build_tests { - {"Build pr18720b1.o" - "-r -nostdlib tmpdir/pr18720b.o" "" - {dummy.c} {} "pr18720b1.o"} -+ {"Build libpr19553b.so" -+ "-shared -Wl,--version-script=pr19553.map" "-fPIC" -+ {pr19553b.c} {} "libpr19553b.so"} -+ {"Build libpr19553c.so" -+ "-shared -Wl,--version-script=pr19553.map" "-fPIC" -+ {pr19553c.c} {} "libpr19553c.so"} -+ {"Build libpr19553d.so" -+ "-shared tmpdir/libpr19553c.so" "-fPIC" -+ {pr19553d.c} {} "libpr19553d.so"} - } + {"sraw", XRC(31,792,0), X_MASK, PPCCOM, 0, {RA, RS, RB}}, +@@ -6167,7 +6279,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { - run_cc_link_tests $build_tests -@@ -155,6 +168,15 @@ set run_tests { - {"Run with libpr18720c.so 5" - "tmpdir/libpr18720c.so tmpdir/pr18720b1.o tmpdir/pr18720a.o" "" - {check-ptr-eq.c} "pr18720d" "pr18720.out"} -+ {"Run with libpr19553b.so" -+ "tmpdir/libpr19553b.so tmpdir/libpr19553d.so -rpath-link ." "" -+ {pr19553a.c} "pr19553b" "pr19553b.out"} -+ {"Run with libpr19553c.so" -+ "tmpdir/libpr19553c.so tmpdir/libpr19553b.so tmpdir/libpr19553d.so" "" -+ {pr19553a.c} "pr19553c" "pr19553c.out"} -+ {"Run with libpr19553d.so" -+ "tmpdir/libpr19553d.so tmpdir/libpr19553b.so -rpath-link ." "" -+ {pr19553a.c} "pr19553d" "pr19553d.out"} - } + {"sthbrx", X(31,918), X_MASK, COM, 0, {RS, RA0, RB}}, - run_ld_link_exec_tests [] $run_tests -diff --git a/ld/testsuite/ld-elf/pr19539.d b/ld/testsuite/ld-elf/pr19539.d -new file mode 100644 -index 0000000..87c2b1b ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19539.d -@@ -0,0 +1,9 @@ -+#source: start.s -+#source: pr19539.s -+#ld: -pie -T pr19539.t -+#readelf : --dyn-syms --wide -+#target: *-*-linux* *-*-gnu* *-*-solaris* -+#notarget: cris*-*-* -+ -+Symbol table '\.dynsym' contains [0-9]+ entries: -+#pass -diff --git a/ld/testsuite/ld-elf/pr19539.s b/ld/testsuite/ld-elf/pr19539.s -new file mode 100644 -index 0000000..0f55d3f ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19539.s -@@ -0,0 +1,2 @@ -+ .section .prefix,"a",%progbits -+ .dc.a foo -diff --git a/ld/testsuite/ld-elf/pr19539.t b/ld/testsuite/ld-elf/pr19539.t -new file mode 100644 -index 0000000..b6b48e7 ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19539.t -@@ -0,0 +1 @@ -+HIDDEN (foo = .); -diff --git a/ld/testsuite/ld-elf/pr19553.map b/ld/testsuite/ld-elf/pr19553.map -new file mode 100644 -index 0000000..f2c03ac ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19553.map -@@ -0,0 +1,5 @@ -+FOO -+{ -+global: -+ foo; -+}; -diff --git a/ld/testsuite/ld-elf/pr19553a.c b/ld/testsuite/ld-elf/pr19553a.c -new file mode 100644 -index 0000000..f1cb6b4 ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19553a.c -@@ -0,0 +1,8 @@ -+extern void foo (void); -+ -+int -+main (void) -+{ -+ foo (); -+ return 0; -+} -diff --git a/ld/testsuite/ld-elf/pr19553b.c b/ld/testsuite/ld-elf/pr19553b.c -new file mode 100644 -index 0000000..0c438a2 ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19553b.c -@@ -0,0 +1,8 @@ -+#include <stdio.h> -+ -+__attribute__ ((weak)) -+void -+foo (void) -+{ -+ printf ("pr19553b\n"); -+} -diff --git a/ld/testsuite/ld-elf/pr19553b.out b/ld/testsuite/ld-elf/pr19553b.out -new file mode 100644 -index 0000000..a5575d9 ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19553b.out -@@ -0,0 +1 @@ -+pr19553b -diff --git a/ld/testsuite/ld-elf/pr19553c.c b/ld/testsuite/ld-elf/pr19553c.c -new file mode 100644 -index 0000000..d80dfc9 ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19553c.c -@@ -0,0 +1,9 @@ -+#include <stdio.h> -+ -+void -+foo (void) -+{ -+ printf ("pr19553c\n"); -+} -+ -+asm (".symver foo,foo@FOO"); -diff --git a/ld/testsuite/ld-elf/pr19553c.out b/ld/testsuite/ld-elf/pr19553c.out -new file mode 100644 -index 0000000..9d23215 ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19553c.out -@@ -0,0 +1 @@ -+pr19553c -diff --git a/ld/testsuite/ld-elf/pr19553d.c b/ld/testsuite/ld-elf/pr19553d.c -new file mode 100644 -index 0000000..d48f8f3 ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19553d.c -@@ -0,0 +1,8 @@ -+#include <stdio.h> -+ -+__attribute__ ((weak)) -+void -+foo (void) -+{ -+ printf ("pr19553d\n"); -+} -diff --git a/ld/testsuite/ld-elf/pr19553d.out b/ld/testsuite/ld-elf/pr19553d.out -new file mode 100644 -index 0000000..2b4cf0b ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19553d.out -@@ -0,0 +1 @@ -+pr19553d -diff --git a/ld/testsuite/ld-elf/pr19579a.c b/ld/testsuite/ld-elf/pr19579a.c -new file mode 100644 -index 0000000..e4a6eb1 ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19579a.c -@@ -0,0 +1,15 @@ -+#include <stdio.h> -+ -+int foo[1]; -+int bar[2]; -+ -+extern int *foo_p (void); -+extern int *bar_p (void); -+ -+int -+main () -+{ -+ if (foo[0] == 0 && foo == foo_p () && bar[0] == 0 && bar == bar_p ()) -+ printf ("PASS\n"); -+ return 0; -+} -diff --git a/ld/testsuite/ld-elf/pr19579b.c b/ld/testsuite/ld-elf/pr19579b.c -new file mode 100644 -index 0000000..d906545 ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19579b.c -@@ -0,0 +1,14 @@ -+int foo[2]; -+int bar[2] = { -1, -1 }; -+ -+int * -+foo_p (void) -+{ -+ return foo; -+} -+ -+int * -+bar_p (void) -+{ -+ return bar; -+} -diff --git a/ld/testsuite/ld-elf/pr19698.d b/ld/testsuite/ld-elf/pr19698.d -new file mode 100644 -index 0000000..a39f67a ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19698.d -@@ -0,0 +1,10 @@ -+#ld: -shared $srcdir/$subdir/pr19698.t -+#readelf : --dyn-syms --wide -+#target: *-*-linux* *-*-gnu* *-*-solaris* -+ -+Symbol table '\.dynsym' contains [0-9]+ entries: -+#... -+ +[0-9]+: +[0-9a-f]+ +[0-9a-f]+ +FUNC +GLOBAL +DEFAULT +[0-9]+ +foo@VERS.1 -+#... -+ +[0-9]+: +[0-9a-f]+ +[0-9a-f]+ +FUNC +GLOBAL +DEFAULT +[0-9]+ +foo@@VERS.2 -+#pass -diff --git a/ld/testsuite/ld-elf/pr19698.s b/ld/testsuite/ld-elf/pr19698.s -new file mode 100644 -index 0000000..875dca4 ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19698.s -@@ -0,0 +1,5 @@ -+ .text -+ .globl foo -+ .type foo, %function -+foo: -+ .byte 0 -diff --git a/ld/testsuite/ld-elf/pr19698.t b/ld/testsuite/ld-elf/pr19698.t -new file mode 100644 -index 0000000..09d9125 ---- /dev/null -+++ b/ld/testsuite/ld-elf/pr19698.t -@@ -0,0 +1,11 @@ -+"foo@VERS.1" = foo; -+ -+VERSION { -+VERS.2 { -+ global: -+ foo; -+}; -+ -+VERS.1 { -+}; -+} -diff --git a/ld/testsuite/ld-elf/shared.exp b/ld/testsuite/ld-elf/shared.exp -index 731eef3..b8c12cb 100644 ---- a/ld/testsuite/ld-elf/shared.exp -+++ b/ld/testsuite/ld-elf/shared.exp -@@ -524,6 +524,21 @@ if { [istarget *-*-linux*] - {} \ - "libpr2404b.a" \ - ] \ -+ [list \ -+ "Build pr19579a.o" \ -+ "" "-fPIE" \ -+ {pr19579a.c} \ -+ {} \ -+ "libpr19579a.a" \ -+ ] \ -+ [list \ -+ "Build libpr19579.so" \ -+ "-shared" \ -+ "-fPIC" \ -+ {pr19579b.c} \ -+ {} \ -+ "libpr19579.so" \ -+ ] \ - ] - run_ld_link_exec_tests [] [list \ - [list \ -@@ -580,5 +595,14 @@ if { [istarget *-*-linux*] - "pass.out" \ - "-O2 -fPIC -I../bfd" \ - ] \ -+ [list \ -+ "Run pr19579" \ -+ "-pie -z text tmpdir/pr19579a.o tmpdir/libpr19579.so" \ -+ "" \ -+ {dummy.c} \ -+ "pr19579" \ -+ "pass.out" \ -+ "-fPIE" \ -+ ] \ - ] - } -diff --git a/ld/testsuite/ld-i386/branch1.d b/ld/testsuite/ld-i386/branch1.d -index a078f1d..81b069e 100644 ---- a/ld/testsuite/ld-i386/branch1.d -+++ b/ld/testsuite/ld-i386/branch1.d -@@ -1,4 +1,4 @@ --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -melf_i386 - #objdump: -dw - -diff --git a/ld/testsuite/ld-i386/call1.d b/ld/testsuite/ld-i386/call1.d -index 69383b2..e3ebedc 100644 ---- a/ld/testsuite/ld-i386/call1.d -+++ b/ld/testsuite/ld-i386/call1.d -@@ -1,3 +1,3 @@ --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -shared -melf_i386 - #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object -diff --git a/ld/testsuite/ld-i386/call2.d b/ld/testsuite/ld-i386/call2.d -index 69383b2..e3ebedc 100644 ---- a/ld/testsuite/ld-i386/call2.d -+++ b/ld/testsuite/ld-i386/call2.d -@@ -1,3 +1,3 @@ --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -shared -melf_i386 - #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object -diff --git a/ld/testsuite/ld-i386/call3a.d b/ld/testsuite/ld-i386/call3a.d -index a8ff27f..5a1e1df 100644 ---- a/ld/testsuite/ld-i386/call3a.d -+++ b/ld/testsuite/ld-i386/call3a.d -@@ -1,5 +1,5 @@ - #source: call3.s --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -melf_i386 - #objdump: -dw - -diff --git a/ld/testsuite/ld-i386/call3b.d b/ld/testsuite/ld-i386/call3b.d -index 06af6f5..de98ce4 100644 ---- a/ld/testsuite/ld-i386/call3b.d -+++ b/ld/testsuite/ld-i386/call3b.d -@@ -1,5 +1,5 @@ - #source: call3.s --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -melf_i386 -z call-nop=prefix-addr - #objdump: -dw - -diff --git a/ld/testsuite/ld-i386/call3c.d b/ld/testsuite/ld-i386/call3c.d -index 64e8372..0fdbee4 100644 ---- a/ld/testsuite/ld-i386/call3c.d -+++ b/ld/testsuite/ld-i386/call3c.d -@@ -1,5 +1,5 @@ - #source: call3.s --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -melf_i386 -z call-nop=prefix-nop - #objdump: -dw - -diff --git a/ld/testsuite/ld-i386/call3d.d b/ld/testsuite/ld-i386/call3d.d -index a9274c8..4d965b3 100644 ---- a/ld/testsuite/ld-i386/call3d.d -+++ b/ld/testsuite/ld-i386/call3d.d -@@ -1,5 +1,5 @@ - #source: call3.s --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -melf_i386 -z call-nop=suffix-nop - #objdump: -dw - -diff --git a/ld/testsuite/ld-i386/call3e.d b/ld/testsuite/ld-i386/call3e.d -index 2876b49..608682c 100644 ---- a/ld/testsuite/ld-i386/call3e.d -+++ b/ld/testsuite/ld-i386/call3e.d -@@ -1,5 +1,5 @@ - #source: call3.s --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -melf_i386 -z call-nop=prefix-0x67 - #objdump: -dw - -diff --git a/ld/testsuite/ld-i386/call3f.d b/ld/testsuite/ld-i386/call3f.d -index 5ab0cf1..f3a4869 100644 ---- a/ld/testsuite/ld-i386/call3f.d -+++ b/ld/testsuite/ld-i386/call3f.d -@@ -1,5 +1,5 @@ - #source: call3.s --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -melf_i386 -z call-nop=prefix-0x90 - #objdump: -dw - -diff --git a/ld/testsuite/ld-i386/call3g.d b/ld/testsuite/ld-i386/call3g.d -index 8287770..f3e3f36 100644 ---- a/ld/testsuite/ld-i386/call3g.d -+++ b/ld/testsuite/ld-i386/call3g.d -@@ -1,5 +1,5 @@ - #source: call3.s --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -melf_i386 -z call-nop=suffix-0x90 - #objdump: -dw - -diff --git a/ld/testsuite/ld-i386/call3h.d b/ld/testsuite/ld-i386/call3h.d -index 83f371a..afd1ce8 100644 ---- a/ld/testsuite/ld-i386/call3h.d -+++ b/ld/testsuite/ld-i386/call3h.d -@@ -1,5 +1,5 @@ - #source: call3.s --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -melf_i386 -z call-nop=suffix-144 - #objdump: -dw - -diff --git a/ld/testsuite/ld-i386/got1.dd b/ld/testsuite/ld-i386/got1.dd -index e46153d..e6e82de 100644 ---- a/ld/testsuite/ld-i386/got1.dd -+++ b/ld/testsuite/ld-i386/got1.dd -@@ -10,6 +10,8 @@ - [ ]*[a-f0-9]+: ff d0 call \*%eax - [ ]*[a-f0-9]+: [ a-f0-9]+ mov *0x[a-f0-9]+,%eax - [ ]*[a-f0-9]+: ff d0 call \*%eax -+[ ]*[a-f0-9]+: [ a-f0-9]+ call [a-f0-9]+ <__x86.get_pc_thunk.cx> -+[ ]*[a-f0-9]+: [ a-f0-9]+ add \$0x[a-f0-9]+,%ecx - [ ]*[a-f0-9]+: [ a-f0-9]+ lea *0x[a-f0-9]+,%ecx - [ ]*[a-f0-9]+: ff d1 call \*%ecx - [ ]*[a-f0-9]+: 83 ec 0c sub \$0xc,%esp -diff --git a/ld/testsuite/ld-i386/got1a.S b/ld/testsuite/ld-i386/got1a.S -index f3d5330..7a3f7b5 100644 ---- a/ld/testsuite/ld-i386/got1a.S -+++ b/ld/testsuite/ld-i386/got1a.S -@@ -12,10 +12,19 @@ main: - call *%eax - movl plt@GOT, %eax - call *%eax -- movl foo@GOT(%ebx), %ecx -+ call __x86.get_pc_thunk.cx -+ addl $_GLOBAL_OFFSET_TABLE_, %ecx -+ movl foo@GOT(%ecx), %ecx - call *%ecx - subl $12, %esp - pushl $0 - pushl $0 # Push a dummy return address onto stack. - jmp *myexit@GOT - .size main, .-main -+ .section .text.__x86.get_pc_thunk.cx,"axG",@progbits,__x86.get_pc_thunk.cx,comdat -+ .globl __x86.get_pc_thunk.cx -+ .hidden __x86.get_pc_thunk.cx -+ .type __x86.get_pc_thunk.cx, @function -+__x86.get_pc_thunk.cx: -+ movl (%esp), %ecx -+ ret -diff --git a/ld/testsuite/ld-i386/got1d.S b/ld/testsuite/ld-i386/got1d.S -index a6d51c6..7e4c9b1 100644 ---- a/ld/testsuite/ld-i386/got1d.S -+++ b/ld/testsuite/ld-i386/got1d.S -@@ -19,7 +19,6 @@ plt: - pushl %esi - pushl %ebx - call __x86.get_pc_thunk.bx --1: - addl $_GLOBAL_OFFSET_TABLE_, %ebx - subl $20, %esp - leal __FUNCTION__.1866@GOTOFF(%ebx), %esi -diff --git a/ld/testsuite/ld-i386/i386.exp b/ld/testsuite/ld-i386/i386.exp -index fb1d3ea..1916c24 100644 ---- a/ld/testsuite/ld-i386/i386.exp -+++ b/ld/testsuite/ld-i386/i386.exp -@@ -195,6 +195,14 @@ set i386tests { - "--32" {pr17709a.s} {} "libpr17709.so"} - {"PR ld/17709 (2)" "-melf_i386 tmpdir/libpr17709.so" "" - "--32" {pr17709b.s} {{readelf -r pr17709.rd}} "pr17709"} -+ {"Build pr19827a.o" "" "" -+ "--32" { pr19827a.S }} -+ {"Build pr19827b.so" "-melf_i386 -shared" "" -+ "--32" { pr19827b.S } {} "pr19827b.so"} -+ {"Build pr19827" "-melf_i386 -pie tmpdir/pr19827a.o tmpdir/pr19827b.so" "" -+ "--32" { dummy.s } {{readelf {-rW} pr19827.rd}} "pr19827"} -+ {"Build pr19827.so" "-melf_i386 -shared -Bsymbolic" "" -+ "--32" { pr19827a.S } {{readelf {-rW} pr19827.rd}} "pr19827.so"} - } +-{"stfdpx", X(31,919), X_MASK, POWER6, POWER7, {FRSp, RA0, RB}}, ++{"stfdpx", X(31,919), X_MASK|Q_MASK, POWER6, POWER7, {FRSp, RA0, RB}}, + {"stfqx", X(31,919), X_MASK, POWER2, 0, {FRS, RA0, RB}}, - # So as to avoid rewriting every last test case here in a nacl variant, -@@ -319,6 +327,7 @@ run_dump_test "load5a" - run_dump_test "load5b" - run_dump_test "load6" - run_dump_test "pr19175" -+run_dump_test "pr19615" - - if { !([istarget "i?86-*-linux*"] - || [istarget "i?86-*-gnu*"] -@@ -357,7 +366,7 @@ if { [isnative] - [list \ - "Build libplt-main1.a" \ - "" \ -- "-fPIC" \ -+ "-fPIC -Wa,-mrelax-relocations=yes" \ - { plt-main1.c } \ - {{readelf {-Wr} plt-main1.rd}} \ - "libplt-main1.a" \ -@@ -365,7 +374,7 @@ if { [isnative] - [list \ - "Build libplt-main2.a" \ - "" \ -- "-fPIC" \ -+ "-fPIC -Wa,-mrelax-relocations=yes" \ - { plt-main2.c } \ - {{readelf {-Wr} plt-main2.rd}} \ - "libplt-main2.a" \ -@@ -373,7 +382,7 @@ if { [isnative] - [list \ - "Build libplt-main3.a" \ - "" \ -- "-fPIC $PLT_CFLAGS" \ -+ "-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \ - { plt-main3.c } \ - {{readelf {-Wr} plt-main3.rd}} \ - "libplt-main3.a" \ -@@ -381,7 +390,7 @@ if { [isnative] - [list \ - "Build libplt-main4.a" \ - "" \ -- "-fPIC $PLT_CFLAGS" \ -+ "-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \ - { plt-main4.c } \ - {{readelf {-Wr} plt-main4.rd}} \ - "libplt-main4.a" \ -@@ -535,7 +544,7 @@ if { [isnative] - [list \ - "Build gotpc1" \ - "tmpdir/got1d.so" \ -- "" \ -+ "-Wa,-mrelax-relocations=yes" \ - { got1a.S got1b.c got1c.c } \ - {{objdump {-dw} got1.dd}} \ - "got1" \ -diff --git a/ld/testsuite/ld-i386/jmp1.d b/ld/testsuite/ld-i386/jmp1.d -index 69383b2..e3ebedc 100644 ---- a/ld/testsuite/ld-i386/jmp1.d -+++ b/ld/testsuite/ld-i386/jmp1.d -@@ -1,3 +1,3 @@ --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -shared -melf_i386 - #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object -diff --git a/ld/testsuite/ld-i386/jmp2.d b/ld/testsuite/ld-i386/jmp2.d -index 69383b2..e3ebedc 100644 ---- a/ld/testsuite/ld-i386/jmp2.d -+++ b/ld/testsuite/ld-i386/jmp2.d -@@ -1,3 +1,3 @@ --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -shared -melf_i386 - #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object -diff --git a/ld/testsuite/ld-i386/lea1c.d b/ld/testsuite/ld-i386/lea1c.d -index dd76258..0c3580d 100644 ---- a/ld/testsuite/ld-i386/lea1c.d -+++ b/ld/testsuite/ld-i386/lea1c.d -@@ -1,5 +1,5 @@ - #source: lea1.s --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -melf_i386 - #objdump: -dw - -diff --git a/ld/testsuite/ld-i386/load1.d b/ld/testsuite/ld-i386/load1.d -index 062ea18..a252a15 100644 ---- a/ld/testsuite/ld-i386/load1.d -+++ b/ld/testsuite/ld-i386/load1.d -@@ -1,4 +1,4 @@ --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -melf_i386 - #objdump: -dw --sym - #notarget: i?86-*-nacl* x86_64-*-nacl* -diff --git a/ld/testsuite/ld-i386/load2.d b/ld/testsuite/ld-i386/load2.d -index 87c2509..467fee0 100644 ---- a/ld/testsuite/ld-i386/load2.d -+++ b/ld/testsuite/ld-i386/load2.d -@@ -1,3 +1,3 @@ --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -melf_i386 -shared - #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object -diff --git a/ld/testsuite/ld-i386/load3.d b/ld/testsuite/ld-i386/load3.d -index 87c2509..467fee0 100644 ---- a/ld/testsuite/ld-i386/load3.d -+++ b/ld/testsuite/ld-i386/load3.d -@@ -1,3 +1,3 @@ --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -melf_i386 -shared - #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object -diff --git a/ld/testsuite/ld-i386/load4a.d b/ld/testsuite/ld-i386/load4a.d -index 3aa56bd..f3f02ea 100644 ---- a/ld/testsuite/ld-i386/load4a.d -+++ b/ld/testsuite/ld-i386/load4a.d -@@ -1,4 +1,4 @@ - #source: load4.s --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -Bsymbolic -shared -melf_i386 - #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object -diff --git a/ld/testsuite/ld-i386/load5a.d b/ld/testsuite/ld-i386/load5a.d -index 88c225a..9744316 100644 ---- a/ld/testsuite/ld-i386/load5a.d -+++ b/ld/testsuite/ld-i386/load5a.d -@@ -1,4 +1,4 @@ - #source: load5.s --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -Bsymbolic -shared -melf_i386 - #error: direct GOT relocation R_386_GOT32X against `foo' without base register can not be used when making a shared object -diff --git a/ld/testsuite/ld-i386/mov2b.d b/ld/testsuite/ld-i386/mov2b.d -index ea5dd9b..295a7c5 100644 ---- a/ld/testsuite/ld-i386/mov2b.d -+++ b/ld/testsuite/ld-i386/mov2b.d -@@ -1,5 +1,5 @@ - #source: mov2.s --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -pie -melf_i386 - #objdump: -dw - -diff --git a/ld/testsuite/ld-i386/mov3.d b/ld/testsuite/ld-i386/mov3.d -index 17da244..4ce5cd8 100644 ---- a/ld/testsuite/ld-i386/mov3.d -+++ b/ld/testsuite/ld-i386/mov3.d -@@ -1,4 +1,4 @@ --#as: --32 -+#as: --32 -mrelax-relocations=yes - #ld: -melf_i386 - #objdump: -dw + {"sraq", XRC(31,920,0), X_MASK, M601, 0, {RA, RS, RB}}, +@@ -6345,13 +6457,13 @@ const struct powerpc_opcode powerpc_opcodes[] = { -diff --git a/ld/testsuite/ld-i386/pr19615.d b/ld/testsuite/ld-i386/pr19615.d -new file mode 100644 -index 0000000..86aebd1 ---- /dev/null -+++ b/ld/testsuite/ld-i386/pr19615.d -@@ -0,0 +1,13 @@ -+#as: --32 -+#ld: -pie -Bsymbolic -E -melf_i386 -+#readelf: -r --wide --dyn-syms -+ -+Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 1 entries: -+ Offset Info Type Sym. Value Symbol's Name -+[0-9a-f]+ +[0-9a-f]+ +R_386_RELATIVE + -+ -+Symbol table '.dynsym' contains [0-9]+ entries: -+ Num: Value Size Type Bind Vis Ndx Name -+#... -+[ ]*[a-f0-9]+: [a-f0-9]+ 0 FUNC GLOBAL DEFAULT [a-f0-9]+ xyzzy -+#... -diff --git a/ld/testsuite/ld-i386/pr19615.s b/ld/testsuite/ld-i386/pr19615.s -new file mode 100644 -index 0000000..1d85926 ---- /dev/null -+++ b/ld/testsuite/ld-i386/pr19615.s -@@ -0,0 +1,13 @@ -+ .text -+ .globl _start -+ .type _start, @function -+_start: -+ ret -+ -+ .globl xyzzy /* This symbol should be exported */ -+ .type xyzzy, @function -+xyzzy: -+ ret -+ -+ .section ".xyzzy_ptr","aw",%progbits -+ .dc.a xyzzy -diff --git a/ld/testsuite/ld-i386/pr19827.rd b/ld/testsuite/ld-i386/pr19827.rd -new file mode 100644 -index 0000000..5d2a885 ---- /dev/null -+++ b/ld/testsuite/ld-i386/pr19827.rd -@@ -0,0 +1,5 @@ -+#readelf: -r --wide -+ -+Relocation section '.rel.dyn' at offset 0x[0-9a-f]+ contains 1 entries: -+ Offset Info Type Sym. Value Symbol's Name -+[0-9a-f]+ +[0-9a-f]+ +R_386_RELATIVE + -diff --git a/ld/testsuite/ld-i386/pr19827a.S b/ld/testsuite/ld-i386/pr19827a.S -new file mode 100644 -index 0000000..cdf1d4b ---- /dev/null -+++ b/ld/testsuite/ld-i386/pr19827a.S -@@ -0,0 +1,8 @@ -+ .text -+ .global _start -+_start: -+ .dc.a foo -+ .data -+ .globl foo -+foo: -+ .byte 0 -diff --git a/ld/testsuite/ld-i386/pr19827b.S b/ld/testsuite/ld-i386/pr19827b.S -new file mode 100644 -index 0000000..bb46e1d ---- /dev/null -+++ b/ld/testsuite/ld-i386/pr19827b.S -@@ -0,0 +1,2 @@ -+ .data -+ .dc.a foo -diff --git a/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d b/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d -index 53ccd5a..ae75487 100644 ---- a/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d -+++ b/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d -@@ -1,4 +1,4 @@ --#as: --64 -+#as: --64 -mrelax-relocations=yes - #ld: -melf_x86_64 - #objdump: -dw - #target: x86_64-*-* -diff --git a/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d b/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d -index 53ccd5a..ae75487 100644 ---- a/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d -+++ b/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d -@@ -1,4 +1,4 @@ --#as: --64 -+#as: --64 -mrelax-relocations=yes - #ld: -melf_x86_64 - #objdump: -dw - #target: x86_64-*-* -diff --git a/ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d b/ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d -index 18021e7..2ce53a9 100644 ---- a/ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d -+++ b/ld/testsuite/ld-ifunc/ifunc-5r-local-x86-64.d -@@ -1,5 +1,5 @@ - #source: ifunc-5-local-x86-64.s --#as: --64 -+#as: --64 -mrelax-relocations=yes - #ld: -r -melf_x86_64 - #readelf: -r --wide - #target: x86_64-*-* -diff --git a/ld/testsuite/ld-plugin/lto.exp b/ld/testsuite/ld-plugin/lto.exp -index 81e72b4..982ffee 100644 ---- a/ld/testsuite/ld-plugin/lto.exp -+++ b/ld/testsuite/ld-plugin/lto.exp -@@ -400,9 +400,20 @@ if { [at_least_gcc_version 4 7] } { - || [istarget "x86_64-*-linux*"] - || [istarget "amd64-*-linux*"]) } { - set testname "PR ld/12365" -- set exec_output [run_host_cmd "$CC" "-O2 -flto -flto-partition=none -fuse-linker-plugin tmpdir/pr12365a.o tmpdir/pr12365b.o tmpdir/pr12365c.o"] -+ set exec_output [run_host_cmd "$CC" "-O2 -flto -flto-partition=none -fuse-linker-plugin -o tmpdir/pr12365 tmpdir/pr12365a.o tmpdir/pr12365b.o tmpdir/pr12365c.o"] - if { [ regexp "undefined reference to `my_bcopy'" $exec_output ] } { -+ # Linker should catch the reference to undefined `my_bcopy' -+ # error caused by a GCC bug. - pass $testname -+ } elseif { [ string match "" $exec_output ] } { -+ global READELF -+ set exec_output [run_host_cmd "$READELF" "-s -W tmpdir/pr12365"] -+ if { [ regexp "my_bcopy" $exec_output ] } { -+ # Verify that there is no `my_bcopy' symbol in executable. -+ fail $testname -+ } { -+ pass $testname -+ } - } { - fail $testname - } -diff --git a/ld/testsuite/ld-x86-64/call1a.d b/ld/testsuite/ld-x86-64/call1a.d -index 2a63b1c..2b131ee 100644 ---- a/ld/testsuite/ld-x86-64/call1a.d -+++ b/ld/testsuite/ld-x86-64/call1a.d -@@ -1,5 +1,5 @@ - #source: call1.s --#as: --64 -+#as: --64 -mrelax-relocations=yes - #ld: -melf_x86_64 - #objdump: -dw - -diff --git a/ld/testsuite/ld-x86-64/call1b.d b/ld/testsuite/ld-x86-64/call1b.d -index e782fa2..e2fef07 100644 ---- a/ld/testsuite/ld-x86-64/call1b.d -+++ b/ld/testsuite/ld-x86-64/call1b.d -@@ -1,5 +1,5 @@ - #source: call1.s --#as: --64 -+#as: --64 -mrelax-relocations=yes - #ld: -melf_x86_64 -z call-nop=prefix-addr - #objdump: -dw - -diff --git a/ld/testsuite/ld-x86-64/call1c.d b/ld/testsuite/ld-x86-64/call1c.d -index d058fc7..7fe8056 100644 ---- a/ld/testsuite/ld-x86-64/call1c.d -+++ b/ld/testsuite/ld-x86-64/call1c.d -@@ -1,5 +1,5 @@ - #source: call1.s --#as: --64 -+#as: --64 -mrelax-relocations=yes - #ld: -melf_x86_64 -z call-nop=prefix-nop - #objdump: -dw - -diff --git a/ld/testsuite/ld-x86-64/call1d.d b/ld/testsuite/ld-x86-64/call1d.d -index 8871cc6..c93756b 100644 ---- a/ld/testsuite/ld-x86-64/call1d.d -+++ b/ld/testsuite/ld-x86-64/call1d.d -@@ -1,5 +1,5 @@ - #source: call1.s --#as: --64 -+#as: --64 -mrelax-relocations=yes - #ld: -melf_x86_64 -z call-nop=suffix-nop - #objdump: -dw - -diff --git a/ld/testsuite/ld-x86-64/call1e.d b/ld/testsuite/ld-x86-64/call1e.d -index 7127f1a..c7c467c 100644 ---- a/ld/testsuite/ld-x86-64/call1e.d -+++ b/ld/testsuite/ld-x86-64/call1e.d -@@ -1,5 +1,5 @@ - #source: call1.s --#as: --64 -+#as: --64 -mrelax-relocations=yes - #ld: -melf_x86_64 -z call-nop=prefix-0x67 - #objdump: -dw - -diff --git a/ld/testsuite/ld-x86-64/call1f.d b/ld/testsuite/ld-x86-64/call1f.d -index 587bade..d0c3f11 100644 ---- a/ld/testsuite/ld-x86-64/call1f.d -+++ b/ld/testsuite/ld-x86-64/call1f.d -@@ -1,5 +1,5 @@ - #source: call1.s --#as: --64 -+#as: --64 -mrelax-relocations=yes - #ld: -melf_x86_64 -z call-nop=prefix-0x90 - #objdump: -dw - -diff --git a/ld/testsuite/ld-x86-64/call1g.d b/ld/testsuite/ld-x86-64/call1g.d -index 3bb512e..6a8d790 100644 ---- a/ld/testsuite/ld-x86-64/call1g.d -+++ b/ld/testsuite/ld-x86-64/call1g.d -@@ -1,5 +1,5 @@ - #source: call1.s --#as: --64 -+#as: --64 -mrelax-relocations=yes - #ld: -melf_x86_64 -z call-nop=suffix-0x90 - #objdump: -dw - -diff --git a/ld/testsuite/ld-x86-64/call1h.d b/ld/testsuite/ld-x86-64/call1h.d -index c7c8dde..f8e1d07 100644 ---- a/ld/testsuite/ld-x86-64/call1h.d -+++ b/ld/testsuite/ld-x86-64/call1h.d -@@ -1,5 +1,5 @@ - #source: call1.s --#as: --64 -+#as: --64 -mrelax-relocations=yes - #ld: -melf_x86_64 -z call-nop=suffix-144 - #objdump: -dw - -diff --git a/ld/testsuite/ld-x86-64/call1i.d b/ld/testsuite/ld-x86-64/call1i.d -index b3684ad..d5a157b 100644 ---- a/ld/testsuite/ld-x86-64/call1i.d -+++ b/ld/testsuite/ld-x86-64/call1i.d -@@ -1,5 +1,5 @@ - #source: call1.s --#as: --x32 -+#as: --x32 -mrelax-relocations=yes - #ld: -melf32_x86_64 -z call-nop=suffix-0x90 - #objdump: -dw - -diff --git a/ld/testsuite/ld-x86-64/load1a.d b/ld/testsuite/ld-x86-64/load1a.d -index 5c9349e..0eb4880 100644 ---- a/ld/testsuite/ld-x86-64/load1a.d -+++ b/ld/testsuite/ld-x86-64/load1a.d -@@ -1,5 +1,5 @@ - #source: load1.s --#as: --64 -+#as: --64 -mrelax-relocations=yes - #ld: -melf_x86_64 - #objdump: -dw --sym - #notarget: x86_64-*-nacl* -diff --git a/ld/testsuite/ld-x86-64/load1b.d b/ld/testsuite/ld-x86-64/load1b.d -index 70ef274..8827f38 100644 ---- a/ld/testsuite/ld-x86-64/load1b.d -+++ b/ld/testsuite/ld-x86-64/load1b.d -@@ -1,5 +1,5 @@ - #source: load1.s --#as: --x32 -+#as: --x32 -mrelax-relocations=yes - #ld: -melf32_x86_64 - #objdump: -dw --sym - #notarget: x86_64-*-nacl* -diff --git a/ld/testsuite/ld-x86-64/pr18591.d b/ld/testsuite/ld-x86-64/pr18591.d -new file mode 100644 -index 0000000..9f60622 ---- /dev/null -+++ b/ld/testsuite/ld-x86-64/pr18591.d -@@ -0,0 +1,12 @@ -+#as: --64 -+#ld: -melf_x86_64 -shared -z max-page-size=0x200000 -+#objdump: -dw -+ -+.*: +file format .* -+ -+ -+Disassembly of section .text: -+ -+[a-f0-9]+ <bar>: -+[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> -+#pass -diff --git a/ld/testsuite/ld-x86-64/pr18591.s b/ld/testsuite/ld-x86-64/pr18591.s -new file mode 100644 -index 0000000..d726f08 ---- /dev/null -+++ b/ld/testsuite/ld-x86-64/pr18591.s -@@ -0,0 +1,8 @@ -+ .hidden foo -+ .comm pad,0x80000000,8 -+ .comm foo,8,8 -+ .text -+ .globl bar -+ .type bar, @function -+bar: -+ movq foo@GOTPCREL(%rip), %rax -diff --git a/ld/testsuite/ld-x86-64/pr19615.d b/ld/testsuite/ld-x86-64/pr19615.d -new file mode 100644 -index 0000000..f09bcf3 ---- /dev/null -+++ b/ld/testsuite/ld-x86-64/pr19615.d -@@ -0,0 +1,13 @@ -+#as: --64 -+#ld: -pie -Bsymbolic -E -melf_x86_64 -+#readelf: -r --wide --dyn-syms -+ -+Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: -+ Offset Info Type Symbol's Value Symbol's Name \+ Addend -+[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE +[0-9]+ -+ -+Symbol table '.dynsym' contains [0-9]+ entries: -+ Num: Value Size Type Bind Vis Ndx Name -+#... -+[ ]*[a-f0-9]+: [a-f0-9]+ 0 FUNC GLOBAL DEFAULT [a-f0-9]+ xyzzy -+#... -diff --git a/ld/testsuite/ld-x86-64/pr19615.s b/ld/testsuite/ld-x86-64/pr19615.s -new file mode 100644 -index 0000000..1d85926 ---- /dev/null -+++ b/ld/testsuite/ld-x86-64/pr19615.s -@@ -0,0 +1,13 @@ -+ .text -+ .globl _start -+ .type _start, @function -+_start: -+ ret -+ -+ .globl xyzzy /* This symbol should be exported */ -+ .type xyzzy, @function -+xyzzy: -+ ret -+ -+ .section ".xyzzy_ptr","aw",%progbits -+ .dc.a xyzzy -diff --git a/ld/testsuite/ld-x86-64/pr19827.rd b/ld/testsuite/ld-x86-64/pr19827.rd -new file mode 100644 -index 0000000..67eaacc ---- /dev/null -+++ b/ld/testsuite/ld-x86-64/pr19827.rd -@@ -0,0 +1,5 @@ -+#readelf: -r --wide -+ -+Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 1 entries: -+ Offset Info Type Symbol's Value Symbol's Name \+ Addend -+[0-9a-f]+ +[0-9a-f]+ +R_X86_64_RELATIVE +[0-9a-f]+ -diff --git a/ld/testsuite/ld-x86-64/pr19827a.S b/ld/testsuite/ld-x86-64/pr19827a.S -new file mode 100644 -index 0000000..cdf1d4b ---- /dev/null -+++ b/ld/testsuite/ld-x86-64/pr19827a.S -@@ -0,0 +1,8 @@ -+ .text -+ .global _start -+_start: -+ .dc.a foo -+ .data -+ .globl foo -+foo: -+ .byte 0 -diff --git a/ld/testsuite/ld-x86-64/pr19827b.S b/ld/testsuite/ld-x86-64/pr19827b.S -new file mode 100644 -index 0000000..bb46e1d ---- /dev/null -+++ b/ld/testsuite/ld-x86-64/pr19827b.S -@@ -0,0 +1,2 @@ -+ .data -+ .dc.a foo -diff --git a/ld/testsuite/ld-x86-64/x86-64.exp b/ld/testsuite/ld-x86-64/x86-64.exp -index 45b7f09..378c13f 100644 ---- a/ld/testsuite/ld-x86-64/x86-64.exp -+++ b/ld/testsuite/ld-x86-64/x86-64.exp -@@ -148,6 +148,14 @@ set x86_64tests { - "--64" {pr17709a.s} {} "libpr17709.so"} - {"PR ld/17709 (2)" "-melf_x86_64 tmpdir/libpr17709.so" "" - "--64" {pr17709b.s} {{readelf -rW pr17709.rd}} "pr17709"} -+ {"Build pr19827a.o" "" "" -+ "--64" { pr19827a.S }} -+ {"Build pr19827b.so" "-melf_x86_64 -shared" "" -+ "--64" { pr19827b.S } {} "pr19827b.so"} -+ {"Build pr19827" "-melf_x86_64 -pie tmpdir/pr19827a.o tmpdir/pr19827b.so" "" -+ "--64" { dummy.s } {{readelf {-rW} pr19827.rd}} "pr19827"} -+ {"Build pr19827.so" "-melf_x86_64 -shared -Bsymbolic" "" -+ "--64" { pr19827a.S } {{readelf {-rW} pr19827.rd}} "pr19827.so"} - } + {"stfdu", OP(55), OP_MASK, COM, PPCEFS|PPCVLE, {FRS, D, RAS}}, - # So as to avoid rewriting every last test case here in a nacl variant, -@@ -353,6 +361,8 @@ run_dump_test "pr19013-x32" - run_dump_test "pr19013-nacl" - run_dump_test "pr19162" - run_dump_test "pr19175" -+run_dump_test "pr18591" -+run_dump_test "pr19615" - - # Add $PLT_CFLAGS if PLT is expected. - global PLT_CFLAGS -@@ -391,7 +401,7 @@ if { [isnative] && [which $CC] != 0 } { - [list \ - "Build libplt-main1.a" \ - "" \ -- "-fPIC" \ -+ "-fPIC -Wa,-mrelax-relocations=yes" \ - { plt-main1.c } \ - {{readelf {-Wr} plt-main1.rd}} \ - "libplt-main1.a" \ -@@ -399,7 +409,7 @@ if { [isnative] && [which $CC] != 0 } { - [list \ - "Build libplt-main2.a" \ - "" \ -- "-fPIC" \ -+ "-fPIC -Wa,-mrelax-relocations=yes" \ - { plt-main2.c } \ - {{readelf {-Wr} plt-main2.rd}} \ - "libplt-main2.a" \ -@@ -407,7 +417,7 @@ if { [isnative] && [which $CC] != 0 } { - [list \ - "Build libplt-main3.a" \ - "" \ -- "-fPIC $PLT_CFLAGS" \ -+ "-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \ - { plt-main3.c } \ - {{readelf {-Wr} plt-main3.rd}} \ - "libplt-main3.a" \ -@@ -415,7 +425,7 @@ if { [isnative] && [which $CC] != 0 } { - [list \ - "Build libplt-main4.a" \ - "" \ -- "-fPIC $PLT_CFLAGS" \ -+ "-fPIC -Wa,-mrelax-relocations=yes $PLT_CFLAGS" \ - { plt-main4.c } \ - {{readelf {-Wr} plt-main4.rd}} \ - "libplt-main4.a" \ -@@ -545,7 +555,7 @@ if { [isnative] && [which $CC] != 0 } { - [list \ - "Build gotpcrel1" \ - "tmpdir/gotpcrel1d.so" \ -- "" \ -+ "-Wa,-mrelax-relocations=yes" \ - { gotpcrel1a.S gotpcrel1b.c gotpcrel1c.c } \ - {{objdump {-dw} gotpcrel1.dd}} \ - "gotpcrel1" \ -diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog -index 726335d..e7f539a 100644 ---- a/opcodes/ChangeLog -+++ b/opcodes/ChangeLog -@@ -1,3 +1,24 @@ -+2016-02-26 Alan Modra <amodra@gmail.com> -+ -+ Apply from master. -+ 2015-12-12 Alan Modra <amodra@gmail.com> -+ PR 19359 -+ * ppc-opc.c (insert_fxm): Remove "ignored" from error message. -+ (powerpc_opcodes): Remove single-operand mfcr. -+ -+2016-02-15 H.J. Lu <hongjiu.lu@intel.com> -+ -+ Backport from master -+ 2016-02-15 H.J. Lu <hongjiu.lu@intel.com> -+ -+ * i386-dis.c (print_insn): Parenthesize expression to prevent -+ truncated addresses. -+ (OP_J): Likewise. -+ -+2016-01-25 Tristan Gingold <gingold@adacore.com> -+ -+ * configure: Regenerate. -+ - 2016-01-25 Tristan Gingold <gingold@adacore.com> +-{"lq", OP(56), OP_MASK, POWER4, PPC476|PPCVLE, {RTQ, DQ, RAQ}}, ++{"lq", OP(56), OP_MASK|Q_MASK, POWER4, PPC476|PPCVLE, {RTQ, DQ, RAQ}}, + {"psq_l", OP(56), OP_MASK, PPCPS, PPCVLE, {FRT,PSD,RA,PSW,PSQ}}, + {"lfq", OP(56), OP_MASK, POWER2, PPCVLE, {FRT, D, RA0}}, - * configure: Regenerate. -@@ -810,7 +831,7 @@ - - 2015-05-11 H.J. Lu <hongjiu.lu@intel.com> - -- * opcodes/i386-opc.tbl (call): Remove Disp16|Disp32 from 64-bit -+ * i386-opc.tbl (call): Remove Disp16|Disp32 from 64-bit - direct branch. - (jmp): Likewise. - * i386-tbl.h: Regenerated. -diff --git a/opcodes/configure b/opcodes/configure -index 3be129b..eedb184 100755 ---- a/opcodes/configure -+++ b/opcodes/configure -@@ -1,6 +1,6 @@ - #! /bin/sh - # Guess values for system-dependent variables and create Makefiles. --# Generated by GNU Autoconf 2.64 for opcodes 2.26. -+# Generated by GNU Autoconf 2.64 for opcodes 2.26.0. - # - # Copyright (C) 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2001, - # 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software -@@ -556,8 +556,8 @@ MAKEFLAGS= - # Identity of this package. - PACKAGE_NAME='opcodes' - PACKAGE_TARNAME='opcodes' --PACKAGE_VERSION='2.26' --PACKAGE_STRING='opcodes 2.26' -+PACKAGE_VERSION='2.26.0' -+PACKAGE_STRING='opcodes 2.26.0' - PACKAGE_BUGREPORT='' - PACKAGE_URL='' - -@@ -1319,7 +1319,7 @@ if test "$ac_init_help" = "long"; then - # Omit some internal or obsolete options to make the list less imposing. - # This message is too long to be a string in the A/UX 3.1 sh. - cat <<_ACEOF --\`configure' configures opcodes 2.26 to adapt to many kinds of systems. -+\`configure' configures opcodes 2.26.0 to adapt to many kinds of systems. - - Usage: $0 [OPTION]... [VAR=VALUE]... - -@@ -1390,7 +1390,7 @@ fi - - if test -n "$ac_init_help"; then - case $ac_init_help in -- short | recursive ) echo "Configuration of opcodes 2.26:";; -+ short | recursive ) echo "Configuration of opcodes 2.26.0:";; - esac - cat <<\_ACEOF - -@@ -1497,7 +1497,7 @@ fi - test -n "$ac_init_help" && exit $ac_status - if $ac_init_version; then - cat <<\_ACEOF --opcodes configure 2.26 -+opcodes configure 2.26.0 - generated by GNU Autoconf 2.64 - - Copyright (C) 2009 Free Software Foundation, Inc. -@@ -1907,7 +1907,7 @@ cat >config.log <<_ACEOF - This file contains any messages produced by compilers while - running configure, to aid debugging if configure makes a mistake. - --It was created by opcodes $as_me 2.26, which was -+It was created by opcodes $as_me 2.26.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - $ $0 $@ -@@ -3715,7 +3715,7 @@ fi - - # Define the identity of the package. - PACKAGE='opcodes' -- VERSION='2.26' -+ VERSION='2.26.0' - - - cat >>confdefs.h <<_ACEOF -@@ -13223,7 +13223,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 - # report actual input values of CONFIG_FILES etc. instead of their - # values after options handling. - ac_log=" --This file was extended by opcodes $as_me 2.26, which was -+This file was extended by opcodes $as_me 2.26.0, which was - generated by GNU Autoconf 2.64. Invocation command line was - - CONFIG_FILES = $CONFIG_FILES -@@ -13287,7 +13287,7 @@ Report bugs to the package provider." - _ACEOF - cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 - ac_cs_version="\\ --opcodes config.status 2.26 -+opcodes config.status 2.26.0 - configured by $0, generated by GNU Autoconf 2.64, - with options \\"`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`\\" - -diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c -index 1b4c51a..3712b59 100644 ---- a/opcodes/i386-dis.c -+++ b/opcodes/i386-dis.c -@@ -13644,7 +13644,7 @@ print_insn (bfd_vma pc, disassemble_info *info) - if (op_index[i] != -1 && op_riprel[i]) - { - (*info->fprintf_func) (info->stream, " # "); -- (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep -+ (*info->print_address_func) ((bfd_vma) (start_pc + (codep - start_codep) - + op_address[op_index[i]]), info); - break; - } -@@ -16158,7 +16158,7 @@ OP_J (int bytemode, int sizeflag) - the displacement is added! */ - mask = 0xffff; - if ((prefixes & PREFIX_DATA) == 0) -- segment = ((start_pc + codep - start_codep) -+ segment = ((start_pc + (codep - start_codep)) - & ~((bfd_vma) 0xffff)); - } - if (address_mode != mode_64bit -diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c -index e8c92f6..9b25b60 100644 ---- a/opcodes/ppc-opc.c -+++ b/opcodes/ppc-opc.c -@@ -1434,7 +1434,7 @@ insert_fxm (unsigned long insn, - /* A value of -1 means we used the one operand form of - mfcr which is valid. */ - if (value != -1) -- *errmsg = _("ignoring invalid mfcr mask"); -+ *errmsg = _("invalid mfcr mask"); - value = 0; + {"lxsd", DSO(57,2), DS_MASK, PPCVSX3, PPCVLE, {VD, DS, RA0}}, + {"lxssp", DSO(57,3), DS_MASK, PPCVSX3, PPCVLE, {VD, DS, RA0}}, +-{"lfdp", OP(57), OP_MASK, POWER6, POWER7|PPCVLE, {FRTp, DS, RA0}}, ++{"lfdp", OP(57), OP_MASK|Q_MASK, POWER6, POWER7|PPCVLE, {FRTp, DS, RA0}}, + {"psq_lu", OP(57), OP_MASK, PPCPS, PPCVLE, {FRT,PSD,RA,PSW,PSQ}}, + {"lfqu", OP(57), OP_MASK, POWER2, PPCVLE, {FRT, D, RA0}}, + +@@ -6676,21 +6788,21 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"stxv", DQX(61,5), DQX_MASK, PPCVSX3, PPCVLE, {XSQ6, DQ, RA0}}, + {"stxsd", DSO(61,2), DS_MASK, PPCVSX3, PPCVLE, {VS, DS, RA0}}, + {"stxssp", DSO(61,3), DS_MASK, PPCVSX3, PPCVLE, {VS, DS, RA0}}, +-{"stfdp", OP(61), OP_MASK, POWER6, POWER7|PPCVLE, {FRSp, DS, RA0}}, ++{"stfdp", OP(61), OP_MASK|Q_MASK, POWER6, POWER7|PPCVLE, {FRSp, DS, RA0}}, + {"psq_stu", OP(61), OP_MASK, PPCPS, PPCVLE, {FRS,PSD,RA,PSW,PSQ}}, + {"stfqu", OP(61), OP_MASK, POWER2, PPCVLE, {FRS, D, RA}}, + + {"std", DSO(62,0), DS_MASK, PPC64, PPCVLE, {RS, DS, RA0}}, + {"stdu", DSO(62,1), DS_MASK, PPC64, PPCVLE, {RS, DS, RAS}}, +-{"stq", DSO(62,2), DS_MASK, POWER4, PPC476|PPCVLE, {RSQ, DS, RA0}}, ++{"stq", DSO(62,2), DS_MASK|Q_MASK, POWER4, PPC476|PPCVLE, {RSQ, DS, RA0}}, + + {"fcmpu", X(63,0), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}}, + +-{"daddq", XRC(63,2,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, +-{"daddq.", XRC(63,2,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"daddq", XRC(63,2,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"daddq.", XRC(63,2,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, + +-{"dquaq", ZRC(63,3,0), Z2_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp, RMC}}, +-{"dquaq.", ZRC(63,3,1), Z2_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp, RMC}}, ++{"dquaq", ZRC(63,3,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp, RMC}}, ++{"dquaq.", ZRC(63,3,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp, RMC}}, + + {"xsaddqp", XRC(63,4,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, + {"xsaddqpo", XRC(63,4,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, +@@ -6772,11 +6884,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"fcmpo", X(63,32), XBF_MASK, COM, PPCEFS|PPCVLE, {BF, FRA, FRB}}, + +-{"dmulq", XRC(63,34,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, +-{"dmulq.", XRC(63,34,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"dmulq", XRC(63,34,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"dmulq.", XRC(63,34,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, + +-{"drrndq", ZRC(63,35,0), Z2_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp, RMC}}, +-{"drrndq.", ZRC(63,35,1), Z2_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp, RMC}}, ++{"drrndq", ZRC(63,35,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp, RMC}}, ++{"drrndq.", ZRC(63,35,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp, RMC}}, + + {"xsmulqp", XRC(63,36,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, + {"xsmulqpo", XRC(63,36,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, +@@ -6791,11 +6903,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { + + {"mcrfs", X(63,64), XRB_MASK|(3<<21)|(3<<16), COM, PPCVLE, {BF, BFA}}, + +-{"dscliq", ZRC(63,66,0), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, +-{"dscliq.", ZRC(63,66,1), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, ++{"dscliq", ZRC(63,66,0), Z_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, ++{"dscliq.", ZRC(63,66,1), Z_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, + +-{"dquaiq", ZRC(63,67,0), Z2_MASK, POWER6, PPCVLE, {TE, FRTp, FRBp, RMC}}, +-{"dquaiq.", ZRC(63,67,1), Z2_MASK, POWER6, PPCVLE, {TE, FRTp, FRBp, RMC}}, ++{"dquaiq", ZRC(63,67,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {TE, FRTp, FRBp, RMC}}, ++{"dquaiq.", ZRC(63,67,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {TE, FRTp, FRBp, RMC}}, + + {"mtfsb0", XRC(63,70,0), XRARB_MASK, COM, PPCVLE, {BT}}, + {"mtfsb0.", XRC(63,70,1), XRARB_MASK, COM, PPCVLE, {BT}}, +@@ -6803,11 +6915,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"fmr", XRC(63,72,0), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}}, + {"fmr.", XRC(63,72,1), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}}, + +-{"dscriq", ZRC(63,98,0), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, +-{"dscriq.", ZRC(63,98,1), Z_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, ++{"dscriq", ZRC(63,98,0), Z_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, ++{"dscriq.", ZRC(63,98,1), Z_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, SH16}}, + +-{"drintxq", ZRC(63,99,0), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, +-{"drintxq.", ZRC(63,99,1), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, ++{"drintxq", ZRC(63,99,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, ++{"drintxq.", ZRC(63,99,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, + + {"xscpsgnqp", X(63,100), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, + +@@ -6839,11 +6951,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"dtstdcq", Z(63,194), Z_MASK, POWER6, PPCVLE, {BF, FRAp, DCM}}, + {"dtstdgq", Z(63,226), Z_MASK, POWER6, PPCVLE, {BF, FRAp, DGM}}, + +-{"drintnq", ZRC(63,227,0), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, +-{"drintnq.", ZRC(63,227,1), Z2_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, ++{"drintnq", ZRC(63,227,0), Z2_MASK|Q_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, ++{"drintnq.", ZRC(63,227,1), Z2_MASK|Q_MASK, POWER6, PPCVLE, {R, FRTp, FRBp, RMC}}, + +-{"dctqpq", XRC(63,258,0), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, +-{"dctqpq.", XRC(63,258,1), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, ++{"dctqpq", XRC(63,258,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRB}}, ++{"dctqpq.", XRC(63,258,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRB}}, + + {"fabs", XRC(63,264,0), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}}, + {"fabs.", XRC(63,264,1), XRA_MASK, COM, PPCEFS|PPCVLE, {FRT, FRB}}, +@@ -6851,8 +6963,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"dctfixq", XRC(63,290,0), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, + {"dctfixq.", XRC(63,290,1), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, + +-{"ddedpdq", XRC(63,322,0), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}}, +-{"ddedpdq.", XRC(63,322,1), X_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}}, ++{"ddedpdq", XRC(63,322,0), X_MASK|Q_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}}, ++{"ddedpdq.", XRC(63,322,1), X_MASK|Q_MASK, POWER6, PPCVLE, {SP, FRTp, FRBp}}, + + {"dxexq", XRC(63,354,0), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, + {"dxexq.", XRC(63,354,1), X_MASK, POWER6, PPCVLE, {FRT, FRBp}}, +@@ -6881,14 +6993,14 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"frim", XRC(63,488,0), XRA_MASK, POWER5, PPCVLE, {FRT, FRB}}, + {"frim.", XRC(63,488,1), XRA_MASK, POWER5, PPCVLE, {FRT, FRB}}, + +-{"dsubq", XRC(63,514,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, +-{"dsubq.", XRC(63,514,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"dsubq", XRC(63,514,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"dsubq.", XRC(63,514,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, + + {"xssubqp", XRC(63,516,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, + {"xssubqpo", XRC(63,516,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, + +-{"ddivq", XRC(63,546,0), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, +-{"ddivq.", XRC(63,546,1), X_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"ddivq", XRC(63,546,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, ++{"ddivq.", XRC(63,546,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRAp, FRBp}}, + + {"xsdivqp", XRC(63,548,0), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, + {"xsdivqpo", XRC(63,548,1), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, +@@ -6917,11 +7029,11 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"mtfsf.", XFL(63,711,1), XFL_MASK, POWER6|PPCA2|PPC476, PPCVLE, {FLM, FRB, XFL_L, W}}, + {"mtfsf.", XFL(63,711,1), XFL_MASK, COM, POWER6|PPCA2|PPC476|PPCEFS|PPCVLE, {FLM, FRB}}, + +-{"drdpq", XRC(63,770,0), X_MASK, POWER6, PPCVLE, {FRTp, FRBp}}, +-{"drdpq.", XRC(63,770,1), X_MASK, POWER6, PPCVLE, {FRTp, FRBp}}, ++{"drdpq", XRC(63,770,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRBp}}, ++{"drdpq.", XRC(63,770,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRBp}}, + +-{"dcffixq", XRC(63,802,0), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, +-{"dcffixq.", XRC(63,802,1), X_MASK, POWER6, PPCVLE, {FRTp, FRB}}, ++{"dcffixq", XRC(63,802,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRB}}, ++{"dcffixq.", XRC(63,802,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRB}}, + + {"xsabsqp", XVA(63,804,0), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}}, + {"xsxexpqp", XVA(63,804,2), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}}, +@@ -6941,8 +7053,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"fctidz.", XRC(63,815,1), XRA_MASK, PPC64, PPCVLE, {FRT, FRB}}, + {"fctidz.", XRC(63,815,1), XRA_MASK, PPC476, PPCVLE, {FRT, FRB}}, + +-{"denbcdq", XRC(63,834,0), X_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}}, +-{"denbcdq.", XRC(63,834,1), X_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}}, ++{"denbcdq", XRC(63,834,0), X_MASK|Q_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}}, ++{"denbcdq.", XRC(63,834,1), X_MASK|Q_MASK, POWER6, PPCVLE, {S, FRTp, FRBp}}, + + {"xscvqpuwz", XVA(63,836,1), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}}, + {"xscvudqp", XVA(63,836,2), XVA_MASK, PPCVSX3, PPCVLE, {VD, VB}}, +@@ -6961,8 +7073,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { + {"fcfid.", XRC(63,846,1), XRA_MASK, PPC64, PPCVLE, {FRT, FRB}}, + {"fcfid.", XRC(63,846,1), XRA_MASK, PPC476, PPCVLE, {FRT, FRB}}, + +-{"diexq", XRC(63,866,0), X_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}}, +-{"diexq.", XRC(63,866,1), X_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}}, ++{"diexq", XRC(63,866,0), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}}, ++{"diexq.", XRC(63,866,1), X_MASK|Q_MASK, POWER6, PPCVLE, {FRTp, FRA, FRBp}}, + + {"xsiexpqp", X(63,868), X_MASK, PPCVSX3, PPCVLE, {VD, VA, VB}}, + +diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c +index 070c96e..bdc961c 100644 +--- a/opcodes/riscv-dis.c ++++ b/opcodes/riscv-dis.c +@@ -383,7 +383,7 @@ riscv_disassemble_insn (bfd_vma memaddr, insn_t word, disassemble_info *info) + pd->hi_addr[i] = -1; + + for (i = 0; i < info->symtab_size; i++) +- if (strcmp (bfd_asymbol_name (info->symtab[i]), "_gp") == 0) ++ if (strcmp (bfd_asymbol_name (info->symtab[i]), RISCV_GP_SYMBOL) == 0) + pd->gp = bfd_asymbol_value (info->symtab[i]); } + else +diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c +index 867a026..8343198 100644 +--- a/opcodes/riscv-opc.c ++++ b/opcodes/riscv-opc.c +@@ -147,7 +147,7 @@ const struct riscv_opcode riscv_opcodes[] = + {"jal", "32C", "Ca", MATCH_C_JAL, MASK_C_JAL, match_opcode, INSN_ALIAS }, + {"jal", "I", "a", MATCH_JAL | (X_RA << OP_SH_RD), MASK_JAL | MASK_RD, match_opcode, INSN_ALIAS }, + {"call", "I", "d,c", (X_T1 << OP_SH_RS1), (int) M_CALL, match_never, INSN_MACRO }, +-{"call", "I", "c", (X_T1 << OP_SH_RS1) | (X_RA << OP_SH_RD), (int) M_CALL, match_never, INSN_MACRO }, ++{"call", "I", "c", (X_RA << OP_SH_RS1) | (X_RA << OP_SH_RD), (int) M_CALL, match_never, INSN_MACRO }, + {"tail", "I", "c", (X_T1 << OP_SH_RS1), (int) M_CALL, match_never, INSN_MACRO }, + {"jump", "I", "c,s", 0, (int) M_CALL, match_never, INSN_MACRO }, + {"nop", "C", "", MATCH_C_ADDI, 0xffff, match_opcode, INSN_ALIAS }, +@@ -210,14 +210,14 @@ const struct riscv_opcode riscv_opcodes[] = + {"sll", "C", "d,CU,C>", MATCH_C_SLLI, MASK_C_SLLI, match_rd_nonzero, INSN_ALIAS }, + {"sll", "I", "d,s,t", MATCH_SLL, MASK_SLL, match_opcode, 0 }, + {"sll", "I", "d,s,>", MATCH_SLLI, MASK_SLLI, match_opcode, INSN_ALIAS }, +-{"srli", "C", "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_rd_nonzero, INSN_ALIAS }, ++{"srli", "C", "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_opcode, INSN_ALIAS }, + {"srli", "I", "d,s,>", MATCH_SRLI, MASK_SRLI, match_opcode, 0 }, +-{"srl", "C", "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_rd_nonzero, INSN_ALIAS }, ++{"srl", "C", "Cs,Cw,C>", MATCH_C_SRLI, MASK_C_SRLI, match_opcode, INSN_ALIAS }, + {"srl", "I", "d,s,t", MATCH_SRL, MASK_SRL, match_opcode, 0 }, + {"srl", "I", "d,s,>", MATCH_SRLI, MASK_SRLI, match_opcode, INSN_ALIAS }, +-{"srai", "C", "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_rd_nonzero, INSN_ALIAS }, ++{"srai", "C", "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_opcode, INSN_ALIAS }, + {"srai", "I", "d,s,>", MATCH_SRAI, MASK_SRAI, match_opcode, 0 }, +-{"sra", "C", "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_rd_nonzero, INSN_ALIAS }, ++{"sra", "C", "Cs,Cw,C>", MATCH_C_SRAI, MASK_C_SRAI, match_opcode, INSN_ALIAS }, + {"sra", "I", "d,s,t", MATCH_SRA, MASK_SRA, match_opcode, 0 }, + {"sra", "I", "d,s,>", MATCH_SRAI, MASK_SRAI, match_opcode, INSN_ALIAS }, + {"sub", "C", "Cs,Cw,Ct", MATCH_C_SUB, MASK_C_SUB, match_opcode, INSN_ALIAS }, +@@ -562,10 +562,10 @@ const struct riscv_opcode riscv_opcodes[] = + {"c.nop", "C", "", MATCH_C_ADDI, 0xffff, match_opcode, 0 }, + {"c.mv", "C", "d,CV", MATCH_C_MV, MASK_C_MV, match_c_add, 0 }, + {"c.lui", "C", "d,Cu", MATCH_C_LUI, MASK_C_LUI, match_c_lui, 0 }, +-{"c.li", "C", "d,Cj", MATCH_C_LI, MASK_C_LI, match_rd_nonzero, 0 }, ++{"c.li", "C", "d,Co", MATCH_C_LI, MASK_C_LI, match_rd_nonzero, 0 }, + {"c.addi4spn","C", "Ct,Cc,CK", MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN, match_opcode, 0 }, + {"c.addi16sp","C", "Cc,CL", MATCH_C_ADDI16SP, MASK_C_ADDI16SP, match_opcode, 0 }, +-{"c.addi", "C", "d,Cj", MATCH_C_ADDI, MASK_C_ADDI, match_rd_nonzero, 0 }, ++{"c.addi", "C", "d,Cj", MATCH_C_ADDI, MASK_C_ADDI, match_opcode, 0 }, + {"c.add", "C", "d,CV", MATCH_C_ADD, MASK_C_ADD, match_c_add, 0 }, + {"c.sub", "C", "Cs,Ct", MATCH_C_SUB, MASK_C_SUB, match_opcode, 0 }, + {"c.and", "C", "Cs,Ct", MATCH_C_AND, MASK_C_AND, match_opcode, 0 }, +@@ -574,8 +574,8 @@ const struct riscv_opcode riscv_opcodes[] = + {"c.slli", "C", "d,C>", MATCH_C_SLLI, MASK_C_SLLI, match_rd_nonzero, 0 }, + {"c.srli", "C", "Cs,C>", MATCH_C_SRLI, MASK_C_SRLI, match_opcode, 0 }, + {"c.srai", "C", "Cs,C>", MATCH_C_SRAI, MASK_C_SRAI, match_opcode, 0 }, +-{"c.andi", "C", "Cs,Cj", MATCH_C_ANDI, MASK_C_ANDI, match_opcode, 0 }, +-{"c.addiw", "64C", "d,Cj", MATCH_C_ADDIW, MASK_C_ADDIW, match_rd_nonzero, 0 }, ++{"c.andi", "C", "Cs,Co", MATCH_C_ANDI, MASK_C_ANDI, match_opcode, 0 }, ++{"c.addiw", "64C", "d,Co", MATCH_C_ADDIW, MASK_C_ADDIW, match_rd_nonzero, 0 }, + {"c.addw", "64C", "Cs,Ct", MATCH_C_ADDW, MASK_C_ADDW, match_opcode, 0 }, + {"c.subw", "64C", "Cs,Ct", MATCH_C_SUBW, MASK_C_SUBW, match_opcode, 0 }, + {"c.ldsp", "64C", "d,Cn(Cc)", MATCH_C_LDSP, MASK_C_LDSP, match_rd_nonzero, 0 }, +diff --git a/opcodes/s390-mkopc.c b/opcodes/s390-mkopc.c +index 8e0b332..68c55a9 100644 +--- a/opcodes/s390-mkopc.c ++++ b/opcodes/s390-mkopc.c +@@ -419,10 +419,6 @@ main (void) + && (str[2] == 0 || str[2] == ',')) { + flag_bits |= S390_INSTR_FLAG_VX; + str += 2; +- } else if (strncmp (str, "vx2", 3) == 0 +- && (str[3] == 0 || str[3] == ',')) { +- flag_bits |= S390_INSTR_FLAG_VX2; +- str += 3; + } else { + fprintf (stderr, "Couldn't parse flags string %s\n", + flags_string); +diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt +index b381587..51a17f3 100644 +--- a/opcodes/s390-opc.txt ++++ b/opcodes/s390-opc.txt +@@ -1685,146 +1685,146 @@ b93c ppno RRE_RR "perform pseudorandom number operation" z13 zarch + # Vector Enhancements Facility 1 + + e70000000085 vbperm VRR_VVV "vector bit permute" arch12 zarch +-e70000006004 vllezlf VRX_VRRD "vector load logical word element and zero - left aligned" arch12 zarch vx2 +-e700000000b8 vmsl VRR_VVVUU0V "vector multiply sum logical" arch12 zarch vx2 +-e700030000b8 vmslg VRR_VVVU0VB "vector multiply sum logical double word" arch12 zarch vx2 +-e7000000006c vnx VRR_VVV "vector not exclusive or" arch12 zarch vx2 ++e70000006004 vllezlf VRX_VRRD "vector load logical word element and zero - left aligned" arch12 zarch ++e700000000b8 vmsl VRR_VVVUU0V "vector multiply sum logical" arch12 zarch ++e700030000b8 vmslg VRR_VVVU0VB "vector multiply sum logical double word" arch12 zarch ++e7000000006c vnx VRR_VVV "vector not exclusive or" arch12 zarch + e7000000006e vnn VRR_VVV "vector nand" arch12 zarch +-e7000000006f voc VRR_VVV "vector or with complement" arch12 zarch vx2 +-e70000000050 vpopctb VRR_VV "vector population count byte" arch12 zarch vx2 +-e70000001050 vpopcth VRR_VV "vector population count halfword" arch12 zarch vx2 +-e70000002050 vpopctf VRR_VV "vector population count word" arch12 zarch vx2 +-e70000003050 vpopctg VRR_VV "vector population count double word" arch12 zarch vx2 +-e700000020e3 vfasb VRR_VVV "vector fp add short" arch12 zarch vx2 +-e700000820e3 wfasb VRR_VVV "scalar vector fp add scalar short" arch12 zarch vx2 +-e700000840e3 wfaxb VRR_VVV "scalar vector fp add scalar extended" arch12 zarch vx2 +-e700000020cb wfcsb VRR_VV "scalar vector fp compare scalar short" arch12 zarch vx2 +-e700000040cb wfcxb VRR_VV "scalar vector fp compare scalar extended" arch12 zarch vx2 +-e700000020ca wfksb VRR_VV "scalar vector fp compare and signal scalar short" arch12 zarch vx2 +-e700000040ca wfkxb VRR_VV "scalar vector fp compare and signal scalar extended" arch12 zarch vx2 ++e7000000006f voc VRR_VVV "vector or with complement" arch12 zarch ++e70000000050 vpopctb VRR_VV "vector population count byte" arch12 zarch ++e70000001050 vpopcth VRR_VV "vector population count halfword" arch12 zarch ++e70000002050 vpopctf VRR_VV "vector population count word" arch12 zarch ++e70000003050 vpopctg VRR_VV "vector population count double word" arch12 zarch ++e700000020e3 vfasb VRR_VVV "vector fp add short" arch12 zarch ++e700000820e3 wfasb VRR_VVV "scalar vector fp add scalar short" arch12 zarch ++e700000840e3 wfaxb VRR_VVV "scalar vector fp add scalar extended" arch12 zarch ++e700000020cb wfcsb VRR_VV "scalar vector fp compare scalar short" arch12 zarch ++e700000040cb wfcxb VRR_VV "scalar vector fp compare scalar extended" arch12 zarch ++e700000020ca wfksb VRR_VV "scalar vector fp compare and signal scalar short" arch12 zarch ++e700000040ca wfkxb VRR_VV "scalar vector fp compare and signal scalar extended" arch12 zarch + +-e700000020e8 vfcesb VRR_VVV "vector fp compare equal short" arch12 zarch vx2 +-e700001020e8 vfcesbs VRR_VVV "vector fp compare equal short" arch12 zarch vx2 +-e700000820e8 wfcesb VRR_VVV "scalar vector fp compare equal scalar short" arch12 zarch vx2 +-e700001820e8 wfcesbs VRR_VVV "scalar fp compare equal scalar short" arch12 zarch vx2 +-e700000840e8 wfcexb VRR_VVV "scalar vector fp compare equal scalar extended" arch12 zarch vx2 +-e700001840e8 wfcexbs VRR_VVV "scalar vector fp compare equal scalar extended" arch12 zarch vx2 ++e700000020e8 vfcesb VRR_VVV "vector fp compare equal short" arch12 zarch ++e700001020e8 vfcesbs VRR_VVV "vector fp compare equal short" arch12 zarch ++e700000820e8 wfcesb VRR_VVV "scalar vector fp compare equal scalar short" arch12 zarch ++e700001820e8 wfcesbs VRR_VVV "scalar fp compare equal scalar short" arch12 zarch ++e700000840e8 wfcexb VRR_VVV "scalar vector fp compare equal scalar extended" arch12 zarch ++e700001840e8 wfcexbs VRR_VVV "scalar vector fp compare equal scalar extended" arch12 zarch + +-e700000420e8 vfkesb VRR_VVV "vector fp compare and signal equal short" arch12 zarch vx2 +-e700001420e8 vfkesbs VRR_VVV "vector fp compare and signal equal short" arch12 zarch vx2 +-e700000c20e8 wfkesb VRR_VVV "scalar vector fp compare and signal equal scalar short" arch12 zarch vx2 +-e700001c20e8 wfkesbs VRR_VVV "scalar fp compare and signal equal scalar short" arch12 zarch vx2 ++e700000420e8 vfkesb VRR_VVV "vector fp compare and signal equal short" arch12 zarch ++e700001420e8 vfkesbs VRR_VVV "vector fp compare and signal equal short" arch12 zarch ++e700000c20e8 wfkesb VRR_VVV "scalar vector fp compare and signal equal scalar short" arch12 zarch ++e700001c20e8 wfkesbs VRR_VVV "scalar fp compare and signal equal scalar short" arch12 zarch + e700000430e8 vfkedb VRR_VVV "vector fp compare and signal equal long" arch12 zarch vx + e700001430e8 vfkedbs VRR_VVV "vector fp compare and signal equal long" arch12 zarch vx + e700000c30e8 wfkedb VRR_VVV "vector fp compare and signal equal long" arch12 zarch vx + e700001c30e8 wfkedbs VRR_VVV "vector fp compare and signal equal long" arch12 zarch vx +-e700000c40e8 wfkexb VRR_VVV "scalar vector fp compare and signal equal scalar extended" arch12 zarch vx2 +-e700001c40e8 wfkexbs VRR_VVV "scalar vector fp compare and signal equal scalar extended" arch12 zarch vx2 ++e700000c40e8 wfkexb VRR_VVV "scalar vector fp compare and signal equal scalar extended" arch12 zarch ++e700001c40e8 wfkexbs VRR_VVV "scalar vector fp compare and signal equal scalar extended" arch12 zarch + +-e700000020eb vfchsb VRR_VVV "vector fp compare high short" arch12 zarch vx2 +-e700001020eb vfchsbs VRR_VVV "vector fp compare high short" arch12 zarch vx2 +-e700000820eb wfchsb VRR_VVV "scalar vector fp compare high scalar short" arch12 zarch vx2 +-e700001820eb wfchsbs VRR_VVV "scalar vector fp compare high scalar short" arch12 zarch vx2 +-e700000840eb wfchxb VRR_VVV "scalar vector fp compare high scalar extended" arch12 zarch vx2 +-e700001840eb wfchxbs VRR_VVV "scalar vector fp compare high scalar extended" arch12 zarch vx2 ++e700000020eb vfchsb VRR_VVV "vector fp compare high short" arch12 zarch ++e700001020eb vfchsbs VRR_VVV "vector fp compare high short" arch12 zarch ++e700000820eb wfchsb VRR_VVV "scalar vector fp compare high scalar short" arch12 zarch ++e700001820eb wfchsbs VRR_VVV "scalar vector fp compare high scalar short" arch12 zarch ++e700000840eb wfchxb VRR_VVV "scalar vector fp compare high scalar extended" arch12 zarch ++e700001840eb wfchxbs VRR_VVV "scalar vector fp compare high scalar extended" arch12 zarch + +-e700000420eb vfkhsb VRR_VVV "vector fp compare and signal high short" arch12 zarch vx2 +-e700001420eb vfkhsbs VRR_VVV "vector fp compare and signal high short" arch12 zarch vx2 +-e700000c20eb wfkhsb VRR_VVV "scalar vector fp compare and signal high scalar short" arch12 zarch vx2 +-e700001c20eb wfkhsbs VRR_VVV "scalar vector fp compare and signal high scalar short" arch12 zarch vx2 ++e700000420eb vfkhsb VRR_VVV "vector fp compare and signal high short" arch12 zarch ++e700001420eb vfkhsbs VRR_VVV "vector fp compare and signal high short" arch12 zarch ++e700000c20eb wfkhsb VRR_VVV "scalar vector fp compare and signal high scalar short" arch12 zarch ++e700001c20eb wfkhsbs VRR_VVV "scalar vector fp compare and signal high scalar short" arch12 zarch + e700000430eb vfkhdb VRR_VVV "vector fp compare and signal high long" arch12 zarch vx + e700001430eb vfkhdbs VRR_VVV "vector fp compare and signal high long" arch12 zarch vx + e700000c30eb wfkhdb VRR_VVV "vector fp compare and signal high long" arch12 zarch vx + e700001c30eb wfkhdbs VRR_VVV "vector fp compare and signal high long" arch12 zarch vx +-e700000c40eb wfkhxb VRR_VVV "scalar vector fp compare and signal high scalar extended" arch12 zarch vx2 +-e700001c40eb wfkhxbs VRR_VVV "scalar vector fp compare and signal high scalar extended" arch12 zarch vx2 ++e700000c40eb wfkhxb VRR_VVV "scalar vector fp compare and signal high scalar extended" arch12 zarch ++e700001c40eb wfkhxbs VRR_VVV "scalar vector fp compare and signal high scalar extended" arch12 zarch + +-e700000020ea vfchesb VRR_VVV "vector fp compare high or equal short" arch12 zarch vx2 +-e700001020ea vfchesbs VRR_VVV "vector fp compare high or equal short" arch12 zarch vx2 +-e700000820ea wfchesb VRR_VVV "scalar vector fp compare high or equal scalar short" arch12 zarch vx2 +-e700001820ea wfchesbs VRR_VVV "scalar vector fp compare high or equal scalar short" arch12 zarch vx2 +-e700000840ea wfchexb VRR_VVV "scalar vector fp compare high or equal scalar extended" arch12 zarch vx2 +-e700001840ea wfchexbs VRR_VVV "scalar vector fp compare high or equal scalar extended" arch12 zarch vx2 ++e700000020ea vfchesb VRR_VVV "vector fp compare high or equal short" arch12 zarch ++e700001020ea vfchesbs VRR_VVV "vector fp compare high or equal short" arch12 zarch ++e700000820ea wfchesb VRR_VVV "scalar vector fp compare high or equal scalar short" arch12 zarch ++e700001820ea wfchesbs VRR_VVV "scalar vector fp compare high or equal scalar short" arch12 zarch ++e700000840ea wfchexb VRR_VVV "scalar vector fp compare high or equal scalar extended" arch12 zarch ++e700001840ea wfchexbs VRR_VVV "scalar vector fp compare high or equal scalar extended" arch12 zarch + +-e700000420ea vfkhesb VRR_VVV "vector fp compare and signal high or equal short" arch12 zarch vx2 +-e700001420ea vfkhesbs VRR_VVV "vector fp compare and signal high or equal short" arch12 zarch vx2 +-e700000c20ea wfkhesb VRR_VVV "scalar vector fp compare and signal high or equal scalar short" arch12 zarch vx2 +-e700001c20ea wfkhesbs VRR_VVV "scalar vector fp compare and signal high or equal scalar short" arch12 zarch vx2 ++e700000420ea vfkhesb VRR_VVV "vector fp compare and signal high or equal short" arch12 zarch ++e700001420ea vfkhesbs VRR_VVV "vector fp compare and signal high or equal short" arch12 zarch ++e700000c20ea wfkhesb VRR_VVV "scalar vector fp compare and signal high or equal scalar short" arch12 zarch ++e700001c20ea wfkhesbs VRR_VVV "scalar vector fp compare and signal high or equal scalar short" arch12 zarch + e700000430ea vfkhedb VRR_VVV "vector fp compare and signal high or equal long" arch12 zarch vx + e700001430ea vfkhedbs VRR_VVV "vector fp compare and signal high or equal long" arch12 zarch vx + e700000c30ea wfkhedb VRR_VVV "vector fp compare and signal high or equal long" arch12 zarch vx + e700001c30ea wfkhedbs VRR_VVV "vector fp compare and signal high or equal long" arch12 zarch vx +-e700000c40ea wfkhexb VRR_VVV "scalar vector fp compare and signal high or equal scalar extended" arch12 zarch vx2 +-e700001c40ea wfkhexbs VRR_VVV "scalar vector fp compare and signal high or equal scalar extended" arch12 zarch vx2 ++e700000c40ea wfkhexb VRR_VVV "scalar vector fp compare and signal high or equal scalar extended" arch12 zarch ++e700001c40ea wfkhexbs VRR_VVV "scalar vector fp compare and signal high or equal scalar extended" arch12 zarch + +-e700000020e5 vfdsb VRR_VVV "vector fp divide short" arch12 zarch vx2 +-e700000820e5 wfdsb VRR_VVV "scalar vector fp divide scalar short" arch12 zarch vx2 +-e700000840e5 wfdxb VRR_VVV "scalar vector fp divide scalar extended" arch12 zarch vx2 +-e700000020c7 vfisb VRR_VV0UU "vector load fp integer short" arch12 zarch vx2 +-e700000820c7 wfisb VRR_VV0UU8 "scalar vector load fp integer scalar short" arch12 zarch vx2 +-e700000840c7 wfixb VRR_VV0UU8 "scalar vector load fp integer scalar extended" arch12 zarch vx2 +-e700000000c4 vfll VRR_VV0UU2 "vector fp load lengthened" arch12 zarch vx2 +-e700000020c4 vflls VRR_VV "vector fp load lengthened" arch12 zarch vx2 +-e700000820c4 wflls VRR_VV "scalar vector fp load lengthened short" arch12 zarch vx2 +-e700000830c4 wflld VRR_VV "scalar vector fp load lengthened long" arch12 zarch vx2 +-e700000000c5 vflr VRR_VV0UUU "vector fp load rounded" arch12 zarch vx2 +-e700000030c5 vflrd VRR_VV0UU "vector fp load rounded long" arch12 zarch vx2 +-e700000830c5 wflrd VRR_VV0UU8 "scalar vector fp load rounded long" arch12 zarch vx2 +-e700000840c5 wflrx VRR_VV0UU8 "scalar vector fp load rounded extended" arch12 zarch vx2 +-e700000000ef vfmax VRR_VVV0UUU "vector fp maximum" arch12 zarch vx2 +-e700000020ef vfmaxsb VRR_VVV0U0 "vector fp maximum short" arch12 zarch vx2 +-e700000030ef vfmaxdb VRR_VVV0U0 "vector fp maximum long" arch12 zarch vx2 +-e700000820ef wfmaxsb VRR_VVV0U0 "scalar fp maximum scalar short" arch12 zarch vx2 +-e700000830ef wfmaxdb VRR_VVV0U0 "scalar fp maximum scalar long" arch12 zarch vx2 +-e700000840ef wfmaxxb VRR_VVV0U0 "scalar fp maximum scalar extended" arch12 zarch vx2 +-e700000000ee vfmin VRR_VVV0UUU "vector fp minimum" arch12 zarch vx2 +-e700000020ee vfminsb VRR_VVV0U0 "vector fp minimum short" arch12 zarch vx2 +-e700000030ee vfmindb VRR_VVV0U0 "vector fp minimum long" arch12 zarch vx2 +-e700000820ee wfminsb VRR_VVV0U0 "scalar fp minimum scalar short" arch12 zarch vx2 +-e700000830ee wfmindb VRR_VVV0U0 "scalar fp minimum scalar long" arch12 zarch vx2 +-e700000840ee wfminxb VRR_VVV0U0 "scalar fp minimum scalar extended" arch12 zarch vx2 +-e700000020e7 vfmsb VRR_VVV "vector fp multiply short" arch12 zarch vx2 +-e700000820e7 wfmsb VRR_VVV "scalar vector fp multiply scalar short" arch12 zarch vx2 +-e700000840e7 wfmxb VRR_VVV "scalar vector fp multiply scalar extended" arch12 zarch vx2 +-e7000200008f vfmasb VRR_VVVV "vector fp multiply and add short" arch12 zarch vx2 +-e7000208008f wfmasb VRR_VVVV "scalar vector fp multiply and add scalar short" arch12 zarch vx2 +-e7000408008f wfmaxb VRR_VVVV "scalar vector fp multiply and add scalar extended" arch12 zarch vx2 +-e7000200008e vfmssb VRR_VVVV "vector fp multiply and subtract short" arch12 zarch vx2 +-e7000208008e wfmssb VRR_VVVV "scalar vector fp multiply and subtract scalar short" arch12 zarch vx2 +-e7000408008e wfmsxb VRR_VVVV "scalar vector fp multiply and subtract scalar extended" arch12 zarch vx2 +-e7000000009f vfnma VRR_VVVU0UV "vector fp negative multiply and add" arch12 zarch vx2 +-e7000200009f vfnmasb VRR_VVVV "vector fp negative multiply and add short" arch12 zarch vx2 +-e7000208009f wfnmasb VRR_VVVV "scalar vector fp negative multiply and add scalar short" arch12 zarch vx2 +-e7000300009f vfnmadb VRR_VVVV "vector fp negative multiply and add long" arch12 zarch vx2 +-e7000308009f wfnmadb VRR_VVVV "scalar vector fp negative multiply and add scalar long" arch12 zarch vx2 +-e7000408009f wfnmaxb VRR_VVVV "scalar vector fp negative multiply and add scalar extended" arch12 zarch vx2 +-e7000000009e vfnms VRR_VVVU0UV "vector fp negative multiply and subtract" arch12 zarch vx2 +-e7000200009e vfnmssb VRR_VVVV "vector fp negative multiply and subtract short" arch12 zarch vx2 +-e7000208009e wfnmssb VRR_VVVV "scalar vector fp negative multiply and subtract scalar short" arch12 zarch vx2 +-e7000300009e vfnmsdb VRR_VVVV "vector fp negative multiply and subtract long" arch12 zarch vx2 +-e7000308009e wfnmsdb VRR_VVVV "scalar vector fp negative multiply and subtract scalar long" arch12 zarch vx2 +-e7000408009e wfnmsxb VRR_VVVV "scalar vector fp negative multiply and subtract scalar extended" arch12 zarch vx2 +-e700000020cc vfpsosb VRR_VV0U2 "vector fp perform sign operation short" arch12 zarch vx2 +-e700000820cc wfpsosb VRR_VV0U2 "scalar vector fp perform sign operation scalar short" arch12 zarch vx2 +-e700000020cc vflcsb VRR_VV "vector fp perform sign operation short" arch12 zarch vx2 +-e700000820cc wflcsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch vx2 +-e700001020cc vflnsb VRR_VV "vector fp perform sign operation short" arch12 zarch vx2 +-e700001820cc wflnsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch vx2 +-e700002020cc vflpsb VRR_VV "vector fp perform sign operation short" arch12 zarch vx2 +-e700002820cc wflpsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch vx2 +-e700000840cc wfpsoxb VRR_VV0U2 "scalar vector fp perform sign operation scalar extended" arch12 zarch vx2 +-e700000840cc wflcxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch vx2 +-e700001840cc wflnxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch vx2 +-e700002840cc wflpxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch vx2 +-e700000020ce vfsqsb VRR_VV "vector fp square root short" arch12 zarch vx2 +-e700000820ce wfsqsb VRR_VV "scalar vector fp square root scalar short" arch12 zarch vx2 +-e700000840ce wfsqxb VRR_VV "scalar vector fp square root scalar extended" arch12 zarch vx2 +-e700000020e2 vfssb VRR_VVV "vector fp subtract short" arch12 zarch vx2 +-e700000820e2 wfssb VRR_VVV "scalar vector fp subtract scalar short" arch12 zarch vx2 +-e700000840e2 wfsxb VRR_VVV "scalar vector fp subtract scalar extended" arch12 zarch vx2 +-e7000000204a vftcisb VRI_VVU2 "vector fp test data class immediate short" arch12 zarch vx2 +-e7000008204a wftcisb VRI_VVU2 "scalar vector fp test data class immediate scalar short" arch12 zarch vx2 +-e7000008404a wftcixb VRI_VVU2 "scalar vector fp test data class immediate scalar extended" arch12 zarch vx2 ++e700000020e5 vfdsb VRR_VVV "vector fp divide short" arch12 zarch ++e700000820e5 wfdsb VRR_VVV "scalar vector fp divide scalar short" arch12 zarch ++e700000840e5 wfdxb VRR_VVV "scalar vector fp divide scalar extended" arch12 zarch ++e700000020c7 vfisb VRR_VV0UU "vector load fp integer short" arch12 zarch ++e700000820c7 wfisb VRR_VV0UU8 "scalar vector load fp integer scalar short" arch12 zarch ++e700000840c7 wfixb VRR_VV0UU8 "scalar vector load fp integer scalar extended" arch12 zarch ++e700000000c4 vfll VRR_VV0UU2 "vector fp load lengthened" arch12 zarch ++e700000020c4 vflls VRR_VV "vector fp load lengthened" arch12 zarch ++e700000820c4 wflls VRR_VV "scalar vector fp load lengthened short" arch12 zarch ++e700000830c4 wflld VRR_VV "scalar vector fp load lengthened long" arch12 zarch ++e700000000c5 vflr VRR_VV0UUU "vector fp load rounded" arch12 zarch ++e700000030c5 vflrd VRR_VV0UU "vector fp load rounded long" arch12 zarch ++e700000830c5 wflrd VRR_VV0UU8 "scalar vector fp load rounded long" arch12 zarch ++e700000840c5 wflrx VRR_VV0UU8 "scalar vector fp load rounded extended" arch12 zarch ++e700000000ef vfmax VRR_VVV0UUU "vector fp maximum" arch12 zarch ++e700000020ef vfmaxsb VRR_VVV0U0 "vector fp maximum short" arch12 zarch ++e700000030ef vfmaxdb VRR_VVV0U0 "vector fp maximum long" arch12 zarch ++e700000820ef wfmaxsb VRR_VVV0U0 "scalar fp maximum scalar short" arch12 zarch ++e700000830ef wfmaxdb VRR_VVV0U0 "scalar fp maximum scalar long" arch12 zarch ++e700000840ef wfmaxxb VRR_VVV0U0 "scalar fp maximum scalar extended" arch12 zarch ++e700000000ee vfmin VRR_VVV0UUU "vector fp minimum" arch12 zarch ++e700000020ee vfminsb VRR_VVV0U0 "vector fp minimum short" arch12 zarch ++e700000030ee vfmindb VRR_VVV0U0 "vector fp minimum long" arch12 zarch ++e700000820ee wfminsb VRR_VVV0U0 "scalar fp minimum scalar short" arch12 zarch ++e700000830ee wfmindb VRR_VVV0U0 "scalar fp minimum scalar long" arch12 zarch ++e700000840ee wfminxb VRR_VVV0U0 "scalar fp minimum scalar extended" arch12 zarch ++e700000020e7 vfmsb VRR_VVV "vector fp multiply short" arch12 zarch ++e700000820e7 wfmsb VRR_VVV "scalar vector fp multiply scalar short" arch12 zarch ++e700000840e7 wfmxb VRR_VVV "scalar vector fp multiply scalar extended" arch12 zarch ++e7000200008f vfmasb VRR_VVVV "vector fp multiply and add short" arch12 zarch ++e7000208008f wfmasb VRR_VVVV "scalar vector fp multiply and add scalar short" arch12 zarch ++e7000408008f wfmaxb VRR_VVVV "scalar vector fp multiply and add scalar extended" arch12 zarch ++e7000200008e vfmssb VRR_VVVV "vector fp multiply and subtract short" arch12 zarch ++e7000208008e wfmssb VRR_VVVV "scalar vector fp multiply and subtract scalar short" arch12 zarch ++e7000408008e wfmsxb VRR_VVVV "scalar vector fp multiply and subtract scalar extended" arch12 zarch ++e7000000009f vfnma VRR_VVVU0UV "vector fp negative multiply and add" arch12 zarch ++e7000200009f vfnmasb VRR_VVVV "vector fp negative multiply and add short" arch12 zarch ++e7000208009f wfnmasb VRR_VVVV "scalar vector fp negative multiply and add scalar short" arch12 zarch ++e7000300009f vfnmadb VRR_VVVV "vector fp negative multiply and add long" arch12 zarch ++e7000308009f wfnmadb VRR_VVVV "scalar vector fp negative multiply and add scalar long" arch12 zarch ++e7000408009f wfnmaxb VRR_VVVV "scalar vector fp negative multiply and add scalar extended" arch12 zarch ++e7000000009e vfnms VRR_VVVU0UV "vector fp negative multiply and subtract" arch12 zarch ++e7000200009e vfnmssb VRR_VVVV "vector fp negative multiply and subtract short" arch12 zarch ++e7000208009e wfnmssb VRR_VVVV "scalar vector fp negative multiply and subtract scalar short" arch12 zarch ++e7000300009e vfnmsdb VRR_VVVV "vector fp negative multiply and subtract long" arch12 zarch ++e7000308009e wfnmsdb VRR_VVVV "scalar vector fp negative multiply and subtract scalar long" arch12 zarch ++e7000408009e wfnmsxb VRR_VVVV "scalar vector fp negative multiply and subtract scalar extended" arch12 zarch ++e700000020cc vfpsosb VRR_VV0U2 "vector fp perform sign operation short" arch12 zarch ++e700000820cc wfpsosb VRR_VV0U2 "scalar vector fp perform sign operation scalar short" arch12 zarch ++e700000020cc vflcsb VRR_VV "vector fp perform sign operation short" arch12 zarch ++e700000820cc wflcsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch ++e700001020cc vflnsb VRR_VV "vector fp perform sign operation short" arch12 zarch ++e700001820cc wflnsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch ++e700002020cc vflpsb VRR_VV "vector fp perform sign operation short" arch12 zarch ++e700002820cc wflpsb VRR_VV "scalar vector fp perform sign operation scalar short" arch12 zarch ++e700000840cc wfpsoxb VRR_VV0U2 "scalar vector fp perform sign operation scalar extended" arch12 zarch ++e700000840cc wflcxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch ++e700001840cc wflnxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch ++e700002840cc wflpxb VRR_VV "scalar vector fp perform sign operation scalar extended" arch12 zarch ++e700000020ce vfsqsb VRR_VV "vector fp square root short" arch12 zarch ++e700000820ce wfsqsb VRR_VV "scalar vector fp square root scalar short" arch12 zarch ++e700000840ce wfsqxb VRR_VV "scalar vector fp square root scalar extended" arch12 zarch ++e700000020e2 vfssb VRR_VVV "vector fp subtract short" arch12 zarch ++e700000820e2 wfssb VRR_VVV "scalar vector fp subtract scalar short" arch12 zarch ++e700000840e2 wfsxb VRR_VVV "scalar vector fp subtract scalar extended" arch12 zarch ++e7000000204a vftcisb VRI_VVU2 "vector fp test data class immediate short" arch12 zarch ++e7000008204a wftcisb VRI_VVU2 "scalar vector fp test data class immediate scalar short" arch12 zarch ++e7000008404a wftcixb VRI_VVU2 "scalar vector fp test data class immediate scalar extended" arch12 zarch + + # Miscellaneous Instruction Extensions Facility 2 + +@@ -1843,28 +1843,28 @@ e30000000039 sgh RXY_RRRD "subtract halfword from 64 bit value" arch12 zarch + + # Vector packed decimal facility + +-e60000000037 vlrlr VRS_RRDV "vector load rightmost with length" arch12 zarch vx2 +-e60000000035 vlrl VSI_URDV "vector load rightmost with immediate length" arch12 zarch vx2 +-e6000000003f vstrlr VRS_RRDV "vector store rightmost with length" arch12 zarch vx2 +-e6000000003d vstrl VSI_URDV "vector store rightmost with immediate length" arch12 zarch vx2 +-e60000000071 vap VRI_VVV0UU2 "vector add decimal" arch12 zarch vx2 +-e60000000077 vcp VRR_0VV0U "vector compare decimal" arch12 zarch vx2 +-e60000000050 vcvb VRR_RV0U "vector convert to binary 32 bit" arch12 zarch vx2 +-e60000000052 vcvbg VRR_RV0U "vector convert to binary 64 bit" arch12 zarch vx2 +-e60000000058 vcvd VRI_VR0UU "vector convert to decimal 32 bit" arch12 zarch vx2 +-e6000000005a vcvdg VRI_VR0UU "vector convert to decimal 64 bit" arch12 zarch vx2 +-e6000000007a vdp VRI_VVV0UU2 "vector divide decimal" arch12 zarch vx2 +-e60000000049 vlip VRI_V0UU2 "vector load immediate decimal" arch12 zarch vx2 +-e60000000078 vmp VRI_VVV0UU2 "vector multiply decimal" arch12 zarch vx2 +-e60000000079 vmsp VRI_VVV0UU2 "vector multiply and shift decimal" arch12 zarch vx2 +-e60000000034 vpkz VSI_URDV "vector pack zoned" arch12 zarch vx2 +-e6000000005b vpsop VRI_VVUUU2 "vector perform sign operation decimal" arch12 zarch vx2 +-e6000000007b vrp VRI_VVV0UU2 "vector remainder decimal" arch12 zarch vx2 +-e6000000007e vsdp VRI_VVV0UU2 "vector shift and divide decimal" arch12 zarch vx2 +-e60000000059 vsrp VRI_VVUUU2 "vector shift and round decimal" arch12 zarch vx2 +-e60000000073 vsp VRI_VVV0UU2 "vector subtract decimal" arch12 zarch vx2 +-e6000000005f vtp VRR_0V "vector test decimal" arch12 zarch vx2 +-e6000000003c vupkz VSI_URDV "vector unpack zoned" arch12 zarch vx2 ++e60000000037 vlrlr VRS_RRDV "vector load rightmost with length" arch12 zarch ++e60000000035 vlrl VSI_URDV "vector load rightmost with immediate length" arch12 zarch ++e6000000003f vstrlr VRS_RRDV "vector store rightmost with length" arch12 zarch ++e6000000003d vstrl VSI_URDV "vector store rightmost with immediate length" arch12 zarch ++e60000000071 vap VRI_VVV0UU2 "vector add decimal" arch12 zarch ++e60000000077 vcp VRR_0VV0U "vector compare decimal" arch12 zarch ++e60000000050 vcvb VRR_RV0U "vector convert to binary 32 bit" arch12 zarch ++e60000000052 vcvbg VRR_RV0U "vector convert to binary 64 bit" arch12 zarch ++e60000000058 vcvd VRI_VR0UU "vector convert to decimal 32 bit" arch12 zarch ++e6000000005a vcvdg VRI_VR0UU "vector convert to decimal 64 bit" arch12 zarch ++e6000000007a vdp VRI_VVV0UU2 "vector divide decimal" arch12 zarch ++e60000000049 vlip VRI_V0UU2 "vector load immediate decimal" arch12 zarch ++e60000000078 vmp VRI_VVV0UU2 "vector multiply decimal" arch12 zarch ++e60000000079 vmsp VRI_VVV0UU2 "vector multiply and shift decimal" arch12 zarch ++e60000000034 vpkz VSI_URDV "vector pack zoned" arch12 zarch ++e6000000005b vpsop VRI_VVUUU2 "vector perform sign operation decimal" arch12 zarch ++e6000000007b vrp VRI_VVV0UU2 "vector remainder decimal" arch12 zarch ++e6000000007e vsdp VRI_VVV0UU2 "vector shift and divide decimal" arch12 zarch ++e60000000059 vsrp VRI_VVUUU2 "vector shift and round decimal" arch12 zarch ++e60000000073 vsp VRI_VVV0UU2 "vector subtract decimal" arch12 zarch ++e6000000005f vtp VRR_0V "vector test decimal" arch12 zarch ++e6000000003c vupkz VSI_URDV "vector unpack zoned" arch12 zarch + + # Guarded storage facility -@@ -4742,8 +4742,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { - {"tlbilxva", XTO(31,18,3), XTO_MASK, E500MC|PPCA2, PPCNONE, {RA0, RB}}, - {"tlbilx", X(31,18), X_MASK, E500MC|PPCA2, PPCNONE, {T, RA0, RB}}, - --{"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, POWER4, PPCNONE, {RT, FXM4}}, --{"mfcr", XFXM(31,19,0,0), XRARB_MASK, COM|PPCVLE, POWER4, {RT}}, -+{"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, COM|PPCVLE, PPCNONE, {RT, FXM4}}, - {"mfocrf", XFXM(31,19,0,1), XFXFXM_MASK, COM|PPCVLE, PPCNONE, {RT, FXM}}, - - {"lwarx", X(31,20), XEH_MASK, PPC|PPCVLE, PPCNONE, {RT, RA0, RB, EH}}, |