diff options
Diffstat (limited to 'debian')
| -rw-r--r-- | debian/changelog | 4 | ||||
| -rw-r--r-- | debian/patches/hjl-x32-gcc-4_7-branch-doc.diff | 18 | ||||
| -rw-r--r-- | debian/patches/hjl-x32-gcc-4_7-branch.diff | 713 | ||||
| -rw-r--r-- | debian/patches/svn-updates.diff | 1246 |
4 files changed, 1618 insertions, 363 deletions
diff --git a/debian/changelog b/debian/changelog index f45f725..6fa5c84 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,12 +1,14 @@ gcc-4.7 (4.7.3-10) UNRELEASED; urgency=low + * Update to SVN 20140112 (r206563) from the gcc-4_7-branch. + [ Matthias Klose ] * Configure --with-long-double-128 on powerpcspe. Closes: #731141. [ Aurelien Jarno ] * patches/note-gnu-stack.diff: restore and rebase lost parts. - -- Matthias Klose <doko@debian.org> Mon, 02 Dec 2013 14:11:44 +0100 + -- Matthias Klose <doko@debian.org> Sun, 12 Jan 2014 10:53:13 +0100 gcc-4.7 (4.7.3-9) unstable; urgency=low diff --git a/debian/patches/hjl-x32-gcc-4_7-branch-doc.diff b/debian/patches/hjl-x32-gcc-4_7-branch-doc.diff index 11f3736..1c96d08 100644 --- a/debian/patches/hjl-x32-gcc-4_7-branch-doc.diff +++ b/debian/patches/hjl-x32-gcc-4_7-branch-doc.diff @@ -1,7 +1,7 @@ -diff --git a/src/gcc/doc/invoke.texi b/src/gcc/doc/invoke.texi -index f989952..db09d61 100644 ---- a/src/gcc/doc/invoke.texi -+++ b/src/gcc/doc/invoke.texi +diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi +index c1ff004..91f9593 100644 +--- a/gcc/doc/invoke.texi ++++ b/gcc/doc/invoke.texi @@ -637,7 +637,7 @@ Objective-C and Objective-C++ Dialects}. -mveclibabi=@var{type} -mvect8-ret-in-mem @gol -mpc32 -mpc64 -mpc80 -mstackrealign @gol @@ -11,7 +11,7 @@ index f989952..db09d61 100644 -m32 -m64 -mx32 -mlarge-data-threshold=@var{num} @gol -msse2avx -mfentry -m8bit-idiv @gol -mavx256-split-unaligned-load -mavx256-split-unaligned-store} -@@ -13575,6 +13575,12 @@ Attempt to keep the stack boundary aligned to a 2 raised to @var{num} +@@ -13577,6 +13577,12 @@ Attempt to keep the stack boundary aligned to a 2 raised to @var{num} byte boundary. If @option{-mpreferred-stack-boundary} is not specified, the default is 4 (16 bytes or 128 bits). @@ -24,7 +24,7 @@ index f989952..db09d61 100644 @item -mincoming-stack-boundary=@var{num} @opindex mincoming-stack-boundary Assume the incoming stack is aligned to a 2 raised to @var{num} byte -@@ -13973,6 +13979,18 @@ be statically or dynamically linked. +@@ -13975,6 +13981,18 @@ be statically or dynamically linked. @opindex mcmodel=large Generate code for the large model: This model makes no assumptions about addresses and sizes of sections. @@ -43,10 +43,10 @@ index f989952..db09d61 100644 @end table @node i386 and x86-64 Windows Options -diff --git a/src/gcc/doc/options.texi b/src/gcc/doc/options.texi +diff --git a/gcc/doc/options.texi b/gcc/doc/options.texi index 0a54183..08b8b79 100644 ---- a/src/gcc/doc/options.texi -+++ b/src/gcc/doc/options.texi +--- a/gcc/doc/options.texi ++++ b/gcc/doc/options.texi @@ -346,8 +346,6 @@ the value 1 when the option is active and 0 otherwise. If you use @code{Var} to attach the option to a different variable, the associated macros are called @code{OPTION_MASK_@var{name}} and @code{OPTION_@var{name}} respectively. diff --git a/debian/patches/hjl-x32-gcc-4_7-branch.diff b/debian/patches/hjl-x32-gcc-4_7-branch.diff index e0fea5f..cc3de77 100644 --- a/debian/patches/hjl-x32-gcc-4_7-branch.diff +++ b/debian/patches/hjl-x32-gcc-4_7-branch.diff @@ -1,18 +1,18 @@ -diff --git a/src/ChangeLog.x32 b/src/ChangeLog.x32 +diff --git a/ChangeLog.x32 b/ChangeLog.x32 new file mode 100644 index 0000000..b633cf6 --- /dev/null -+++ b/src/ChangeLog.x32 ++++ b/ChangeLog.x32 @@ -0,0 +1,4 @@ +2012-05-15 H.J. Lu <hongjiu.lu@intel.com> + + Merge upstream change + * libtool.m4 (_LT_ENABLE_LOCK): Support x32. -diff --git a/src/boehm-gc/ChangeLog.x32 b/src/boehm-gc/ChangeLog.x32 +diff --git a/boehm-gc/ChangeLog.x32 b/boehm-gc/ChangeLog.x32 new file mode 100644 index 0000000..0990077 --- /dev/null -+++ b/src/boehm-gc/ChangeLog.x32 ++++ b/boehm-gc/ChangeLog.x32 @@ -0,0 +1,9 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + @@ -23,10 +23,10 @@ index 0000000..0990077 + Merge upstream changes + * include/private/gcconfig.h: (ALIGNMENT): Set to 4 for x32. + (CPP_WORDSZ): Set to 32 for x32. -diff --git a/src/boehm-gc/configure b/src/boehm-gc/configure +diff --git a/boehm-gc/configure b/boehm-gc/configure index c76ea44..aa61053 100755 ---- a/src/boehm-gc/configure -+++ b/src/boehm-gc/configure +--- a/boehm-gc/configure ++++ b/boehm-gc/configure @@ -6786,7 +6786,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; @@ -61,10 +61,10 @@ index c76ea44..aa61053 100755 #include "confdefs.h" #if HAVE_DLFCN_H -diff --git a/src/boehm-gc/include/private/gcconfig.h b/src/boehm-gc/include/private/gcconfig.h +diff --git a/boehm-gc/include/private/gcconfig.h b/boehm-gc/include/private/gcconfig.h index fb09cf7..0263c13 100644 ---- a/src/boehm-gc/include/private/gcconfig.h -+++ b/src/boehm-gc/include/private/gcconfig.h +--- a/boehm-gc/include/private/gcconfig.h ++++ b/boehm-gc/include/private/gcconfig.h @@ -1974,8 +1974,13 @@ # ifdef X86_64 @@ -81,11 +81,11 @@ index fb09cf7..0263c13 100644 # ifndef HBLKSIZE # define HBLKSIZE 4096 # endif -diff --git a/src/gcc/ChangeLog.pr53383 b/src/gcc/ChangeLog.pr53383 +diff --git a/gcc/ChangeLog.pr53383 b/gcc/ChangeLog.pr53383 new file mode 100644 index 0000000..bcb48cc --- /dev/null -+++ b/src/gcc/ChangeLog.pr53383 ++++ b/gcc/ChangeLog.pr53383 @@ -0,0 +1,10 @@ +2012-05-25 H.J. Lu <hongjiu.lu@intel.com> + @@ -97,11 +97,11 @@ index 0000000..bcb48cc + + * config/i386/i386.h (MIN_STACK_BOUNDARY): Set to 64 for 64-bit + if SSE is disenabled. -diff --git a/src/gcc/ChangeLog.x32 b/src/gcc/ChangeLog.x32 +diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32 new file mode 100644 index 0000000..6b8c31a --- /dev/null -+++ b/src/gcc/ChangeLog.x32 ++++ b/gcc/ChangeLog.x32 @@ -0,0 +1,343 @@ +2012-08-24 H.J. Lu <hongjiu.lu@intel.com> + @@ -446,11 +446,11 @@ index 0000000..6b8c31a + + * config/i386/i386.c (ix86_expand_prologue): Check Pmode to set + adjust_stack_insn. -diff --git a/src/gcc/ada/ChangeLog.x32 b/src/gcc/ada/ChangeLog.x32 +diff --git a/gcc/ada/ChangeLog.x32 b/gcc/ada/ChangeLog.x32 new file mode 100644 index 0000000..5d5bca2 --- /dev/null -+++ b/src/gcc/ada/ChangeLog.x32 ++++ b/gcc/ada/ChangeLog.x32 @@ -0,0 +1,10 @@ +2012-03-03 H.J. Lu <hongjiu.lu@intel.com> + @@ -462,10 +462,10 @@ index 0000000..5d5bca2 + * gcc-interface/Makefile.in (arch): Set to x32 if MULTISUBDIR + is /x32. + Support x32. -diff --git a/src/gcc/ada/gcc-interface/Makefile.in b/src/gcc/ada/gcc-interface/Makefile.in +diff --git a/gcc/ada/gcc-interface/Makefile.in b/gcc/ada/gcc-interface/Makefile.in index 9f20f07..96fab00 100644 ---- a/src/gcc/ada/gcc-interface/Makefile.in -+++ b/src/gcc/ada/gcc-interface/Makefile.in +--- a/gcc/ada/gcc-interface/Makefile.in ++++ b/gcc/ada/gcc-interface/Makefile.in @@ -350,6 +350,10 @@ GNATMAKE_OBJS = a-except.o ali.o ali-util.o aspects.o s-casuti.o alloc.o \ ifeq ($(strip $(filter-out %x86_64, $(arch))),) ifeq ($(strip $(MULTISUBDIR)),/32) @@ -521,10 +521,10 @@ index 9f20f07..96fab00 100644 ifeq ($(strip $(filter-out darwin%,$(osys))),) SO_OPTS = -shared-libgcc LIBGNAT_TARGET_PAIRS = \ -diff --git a/src/gcc/ada/init.c b/src/gcc/ada/init.c +diff --git a/gcc/ada/init.c b/gcc/ada/init.c index d8f5735..5015332 100644 ---- a/src/gcc/ada/init.c -+++ b/src/gcc/ada/init.c +--- a/gcc/ada/init.c ++++ b/gcc/ada/init.c @@ -615,9 +615,13 @@ __gnat_adjust_context_for_raise (int signo ATTRIBUTE_UNUSED, void *ucontext) if (signo == SIGSEGV && pc && *pc == 0x00240c83) mcontext->gregs[REG_ESP] += 4096 + 4 * sizeof (unsigned long); @@ -542,10 +542,10 @@ index d8f5735..5015332 100644 mcontext->gregs[REG_RSP] += 4096 + 4 * sizeof (unsigned long); #elif defined (__ia64__) /* ??? The IA-64 unwinder doesn't compensate for signals. */ -diff --git a/src/gcc/ada/link.c b/src/gcc/ada/link.c +diff --git a/gcc/ada/link.c b/gcc/ada/link.c index 51ea759..5a5dabe 100644 ---- a/src/gcc/ada/link.c -+++ b/src/gcc/ada/link.c +--- a/gcc/ada/link.c ++++ b/gcc/ada/link.c @@ -165,7 +165,11 @@ unsigned char __gnat_objlist_file_supported = 1; const char *__gnat_object_library_extension = ".a"; unsigned char __gnat_separate_run_path_options = 0; @@ -558,10 +558,10 @@ index 51ea759..5a5dabe 100644 #else const char *__gnat_default_libgcc_subdir = "lib"; #endif -diff --git a/src/gcc/config.gcc b/src/gcc/config.gcc -index 7282a68..a53c608 100644 ---- a/src/gcc/config.gcc -+++ b/src/gcc/config.gcc +diff --git a/gcc/config.gcc b/gcc/config.gcc +index 9503b96..ba45f6d 100644 +--- a/gcc/config.gcc ++++ b/gcc/config.gcc @@ -494,6 +494,10 @@ fi case ${target} in @@ -599,7 +599,7 @@ index 7282a68..a53c608 100644 if test "x$enable_cld" = xyes; then tm_defines="${tm_defines} USE_IX86_CLD=1" fi -@@ -1326,7 +1347,14 @@ x86_64-*-linux* | x86_64-*-kfreebsd*-gnu | x86_64-*-knetbsd*-gnu) +@@ -1325,7 +1346,14 @@ x86_64-*-linux* | x86_64-*-kfreebsd*-gnu | x86_64-*-knetbsd*-gnu) tmake_file="${tmake_file} i386/t-linux64" x86_multilibs="${with_multilib_list}" if test "$x86_multilibs" = "default"; then @@ -615,7 +615,7 @@ index 7282a68..a53c608 100644 fi x86_multilibs=`echo $x86_multilibs | sed -e 's/,/ /g'` for x86_multilib in ${x86_multilibs}; do -@@ -3245,7 +3273,7 @@ case "${target}" in +@@ -3244,7 +3272,7 @@ case "${target}" in ;; i[34567]86-*-* | x86_64-*-*) @@ -624,10 +624,10 @@ index 7282a68..a53c608 100644 for which in arch arch_32 arch_64 cpu cpu_32 cpu_64 tune tune_32 tune_64; do eval "val=\$with_$which" case ${val} in -diff --git a/src/gcc/config/arm/arm.opt b/src/gcc/config/arm/arm.opt +diff --git a/gcc/config/arm/arm.opt b/gcc/config/arm/arm.opt index 934aa35..e03a163 100644 ---- a/src/gcc/config/arm/arm.opt -+++ b/src/gcc/config/arm/arm.opt +--- a/gcc/config/arm/arm.opt ++++ b/gcc/config/arm/arm.opt @@ -59,7 +59,7 @@ Target Report Mask(ABORT_NORETURN) Generate a call to abort if a noreturn function returns @@ -637,10 +637,10 @@ index 934aa35..e03a163 100644 mapcs-float Target Report Mask(APCS_FLOAT) -diff --git a/src/gcc/config/cris/linux.opt b/src/gcc/config/cris/linux.opt +diff --git a/gcc/config/cris/linux.opt b/gcc/config/cris/linux.opt index a57c48d..e93bb53 100644 ---- a/src/gcc/config/cris/linux.opt -+++ b/src/gcc/config/cris/linux.opt +--- a/gcc/config/cris/linux.opt ++++ b/gcc/config/cris/linux.opt @@ -23,7 +23,7 @@ mlinux Target Report RejectNegative Undocumented @@ -650,10 +650,10 @@ index a57c48d..e93bb53 100644 Together with -fpic and -fPIC, do not use GOTPLT references ; There's a small added setup cost with using GOTPLT references -diff --git a/src/gcc/config/host-linux.c b/src/gcc/config/host-linux.c +diff --git a/gcc/config/host-linux.c b/gcc/config/host-linux.c index 94b7a0b..b535758 100644 ---- a/src/gcc/config/host-linux.c -+++ b/src/gcc/config/host-linux.c +--- a/gcc/config/host-linux.c ++++ b/gcc/config/host-linux.c @@ -68,8 +68,10 @@ # define TRY_EMPTY_VM_SPACE 0x10000000000 #elif defined(__ia64) @@ -666,10 +666,10 @@ index 94b7a0b..b535758 100644 #elif defined(__i386) # define TRY_EMPTY_VM_SPACE 0x60000000 #elif defined(__powerpc__) -diff --git a/src/gcc/config/i386/biarch64.h b/src/gcc/config/i386/biarch64.h +diff --git a/gcc/config/i386/biarch64.h b/gcc/config/i386/biarch64.h index 629ec98..0c3811e 100644 ---- a/src/gcc/config/i386/biarch64.h -+++ b/src/gcc/config/i386/biarch64.h +--- a/gcc/config/i386/biarch64.h ++++ b/gcc/config/i386/biarch64.h @@ -25,5 +25,5 @@ a copy of the GCC Runtime Library Exception along with this program; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see <http://www.gnu.org/licenses/>. */ @@ -677,11 +677,11 @@ index 629ec98..0c3811e 100644 -#define TARGET_64BIT_DEFAULT OPTION_MASK_ISA_64BIT +#define TARGET_64BIT_DEFAULT (OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_64) #define TARGET_BI_ARCH 1 -diff --git a/src/gcc/config/i386/biarchx32.h b/src/gcc/config/i386/biarchx32.h +diff --git a/gcc/config/i386/biarchx32.h b/gcc/config/i386/biarchx32.h new file mode 100644 index 0000000..69d6722 --- /dev/null -+++ b/src/gcc/config/i386/biarchx32.h ++++ b/gcc/config/i386/biarchx32.h @@ -0,0 +1,28 @@ +/* Make configure files to produce biarch compiler defaulting to x32 mode. + This file must be included very first, while the OS specific file later @@ -711,10 +711,10 @@ index 0000000..69d6722 + +#define TARGET_64BIT_DEFAULT (OPTION_MASK_ISA_64BIT | OPTION_MASK_ABI_X32) +#define TARGET_BI_ARCH 2 -diff --git a/src/gcc/config/i386/constraints.md b/src/gcc/config/i386/constraints.md +diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md index 25327dd..a937196 100644 ---- a/src/gcc/config/i386/constraints.md -+++ b/src/gcc/config/i386/constraints.md +--- a/gcc/config/i386/constraints.md ++++ b/gcc/config/i386/constraints.md @@ -18,7 +18,7 @@ ;; <http://www.gnu.org/licenses/>. @@ -741,10 +741,10 @@ index 25327dd..a937196 100644 (define_constraint "Z" "32-bit unsigned integer constant, or a symbolic reference known to fit that range (for immediate operands in zero-extending x86-64 -diff --git a/src/gcc/config/i386/gnu-user64.h b/src/gcc/config/i386/gnu-user64.h +diff --git a/gcc/config/i386/gnu-user64.h b/gcc/config/i386/gnu-user64.h index fd96df4..ba72f24 100644 ---- a/src/gcc/config/i386/gnu-user64.h -+++ b/src/gcc/config/i386/gnu-user64.h +--- a/gcc/config/i386/gnu-user64.h ++++ b/gcc/config/i386/gnu-user64.h @@ -58,8 +58,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #if TARGET_64BIT_DEFAULT @@ -778,10 +778,10 @@ index fd96df4..ba72f24 100644 + +#undef WCHAR_TYPE +#define WCHAR_TYPE (TARGET_LP64 ? "int" : "long int") -diff --git a/src/gcc/config/i386/i386-opts.h b/src/gcc/config/i386/i386-opts.h +diff --git a/gcc/config/i386/i386-opts.h b/gcc/config/i386/i386-opts.h index 3cc2253..eea85fd 100644 ---- a/src/gcc/config/i386/i386-opts.h -+++ b/src/gcc/config/i386/i386-opts.h +--- a/gcc/config/i386/i386-opts.h ++++ b/gcc/config/i386/i386-opts.h @@ -71,6 +71,11 @@ enum cmodel { CM_LARGE_PIC /* No assumptions. */ }; @@ -794,10 +794,10 @@ index 3cc2253..eea85fd 100644 enum asm_dialect { ASM_ATT, ASM_INTEL -diff --git a/src/gcc/config/i386/i386.c b/src/gcc/config/i386/i386.c -index 5bcb7e0..05cc627 100644 ---- a/src/gcc/config/i386/i386.c -+++ b/src/gcc/config/i386/i386.c +diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c +index 63622ab..cb07c9f 100644 +--- a/gcc/config/i386/i386.c ++++ b/gcc/config/i386/i386.c @@ -2448,6 +2448,8 @@ static rtx (*ix86_gen_andsp) (rtx, rtx, rtx); static rtx (*ix86_gen_allocate_stack_worker) (rtx, rtx); static rtx (*ix86_gen_adjust_stack_and_probe) (rtx, rtx, rtx); @@ -977,7 +977,7 @@ index 5bcb7e0..05cc627 100644 ix86_gen_andsp = gen_andsi3; ix86_gen_allocate_stack_worker = gen_allocate_stack_worker_probe_si; ix86_gen_adjust_stack_and_probe = gen_adjust_stack_and_probesi; -@@ -7239,8 +7324,8 @@ function_value_64 (enum machine_mode orig_mode, enum machine_mode mode, +@@ -7247,8 +7332,8 @@ function_value_64 (enum machine_mode orig_mode, enum machine_mode mode, } else if (POINTER_TYPE_P (valtype)) { @@ -988,7 +988,7 @@ index 5bcb7e0..05cc627 100644 } ret = construct_container (mode, orig_mode, valtype, 1, -@@ -7311,7 +7396,8 @@ ix86_function_value (const_tree valtype, const_tree fntype_or_decl, +@@ -7319,7 +7404,8 @@ ix86_function_value (const_tree valtype, const_tree fntype_or_decl, return ix86_function_value_1 (valtype, fntype_or_decl, orig_mode, mode); } @@ -998,7 +998,7 @@ index 5bcb7e0..05cc627 100644 static enum machine_mode ix86_promote_function_mode (const_tree type, enum machine_mode mode, -@@ -7321,7 +7407,7 @@ ix86_promote_function_mode (const_tree type, enum machine_mode mode, +@@ -7329,7 +7415,7 @@ ix86_promote_function_mode (const_tree type, enum machine_mode mode, if (type != NULL_TREE && POINTER_TYPE_P (type)) { *punsignedp = POINTERS_EXTEND_UNSIGNED; @@ -1007,7 +1007,7 @@ index 5bcb7e0..05cc627 100644 } return default_promote_function_mode (type, mode, punsignedp, fntype, for_return); -@@ -7599,12 +7685,13 @@ setup_incoming_varargs_64 (CUMULATIVE_ARGS *cum) +@@ -7607,12 +7693,13 @@ setup_incoming_varargs_64 (CUMULATIVE_ARGS *cum) for (i = cum->regno; i < max; i++) { @@ -1024,7 +1024,7 @@ index 5bcb7e0..05cc627 100644 } if (ix86_varargs_fpr_size) -@@ -8664,8 +8751,11 @@ gen_push (rtx arg) +@@ -8673,8 +8760,11 @@ gen_push (rtx arg) m->fs.cfa_offset += UNITS_PER_WORD; m->fs.sp_offset += UNITS_PER_WORD; @@ -1037,7 +1037,7 @@ index 5bcb7e0..05cc627 100644 gen_rtx_PRE_DEC (Pmode, stack_pointer_rtx)), arg); -@@ -8676,9 +8766,12 @@ gen_push (rtx arg) +@@ -8685,9 +8775,12 @@ gen_push (rtx arg) static rtx gen_pop (rtx arg) { @@ -1051,7 +1051,7 @@ index 5bcb7e0..05cc627 100644 gen_rtx_POST_INC (Pmode, stack_pointer_rtx))); } -@@ -9153,7 +9246,7 @@ ix86_emit_save_regs (void) +@@ -9163,7 +9256,7 @@ ix86_emit_save_regs (void) for (regno = FIRST_PSEUDO_REGISTER - 1; regno-- > 0; ) if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, true)) { @@ -1060,7 +1060,7 @@ index 5bcb7e0..05cc627 100644 RTX_FRAME_RELATED_P (insn) = 1; } } -@@ -9233,7 +9326,7 @@ ix86_emit_save_regs_using_mov (HOST_WIDE_INT cfa_offset) +@@ -9243,7 +9336,7 @@ ix86_emit_save_regs_using_mov (HOST_WIDE_INT cfa_offset) for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, true)) { @@ -1069,7 +1069,7 @@ index 5bcb7e0..05cc627 100644 cfa_offset -= UNITS_PER_WORD; } } -@@ -9308,7 +9401,7 @@ pro_epilogue_adjust_stack (rtx dest, rtx src, rtx offset, +@@ -9318,7 +9411,7 @@ pro_epilogue_adjust_stack (rtx dest, rtx src, rtx offset, rtx insn; bool add_frame_related_expr = false; @@ -1078,7 +1078,7 @@ index 5bcb7e0..05cc627 100644 insn = gen_pro_epilogue_adjust_stack_si_add (dest, src, offset); else if (x86_64_immediate_operand (offset, DImode)) insn = gen_pro_epilogue_adjust_stack_di_add (dest, src, offset); -@@ -10180,7 +10273,7 @@ ix86_expand_prologue (void) +@@ -10190,7 +10283,7 @@ ix86_expand_prologue (void) to implement macro RETURN_ADDR_RTX and intrinsic function expand_builtin_return_addr etc. */ t = plus_constant (crtl->drap_reg, -UNITS_PER_WORD); @@ -1087,7 +1087,7 @@ index 5bcb7e0..05cc627 100644 insn = emit_insn (gen_push (t)); RTX_FRAME_RELATED_P (insn) = 1; -@@ -10400,7 +10493,7 @@ ix86_expand_prologue (void) +@@ -10410,7 +10503,7 @@ ix86_expand_prologue (void) emit_insn (ix86_gen_allocate_stack_worker (eax, eax)); /* Use the fact that AX still contains ALLOCATE. */ @@ -1096,29 +1096,34 @@ index 5bcb7e0..05cc627 100644 ? gen_pro_epilogue_adjust_stack_di_sub : gen_pro_epilogue_adjust_stack_si_sub); -@@ -10422,14 +10515,18 @@ ix86_expand_prologue (void) +@@ -10431,16 +10524,19 @@ ix86_expand_prologue (void) + if (r10_live && eax_live) { - t = choose_baseaddr (m->fs.sp_offset - allocate); +- t = plus_constant (stack_pointer_rtx, allocate); - emit_move_insn (r10, gen_frame_mem (Pmode, t)); +- t = plus_constant (stack_pointer_rtx, +- allocate - UNITS_PER_WORD); +- emit_move_insn (eax, gen_frame_mem (Pmode, t)); ++ t = choose_baseaddr (m->fs.sp_offset - allocate); + emit_move_insn (gen_rtx_REG (word_mode, R10_REG), + gen_frame_mem (word_mode, t)); - t = choose_baseaddr (m->fs.sp_offset - allocate - UNITS_PER_WORD); -- emit_move_insn (eax, gen_frame_mem (Pmode, t)); ++ t = choose_baseaddr (m->fs.sp_offset - allocate - UNITS_PER_WORD); + emit_move_insn (gen_rtx_REG (word_mode, AX_REG), + gen_frame_mem (word_mode, t)); } else if (eax_live || r10_live) { - t = choose_baseaddr (m->fs.sp_offset - allocate); +- t = plus_constant (stack_pointer_rtx, allocate); - emit_move_insn ((eax_live ? eax : r10), gen_frame_mem (Pmode, t)); ++ t = choose_baseaddr (m->fs.sp_offset - allocate); + emit_move_insn (gen_rtx_REG (word_mode, + (eax_live ? AX_REG : R10_REG)), + gen_frame_mem (word_mode, t)); } } gcc_assert (m->fs.sp_offset == frame.stack_pointer_offset); -@@ -10599,7 +10696,7 @@ ix86_emit_restore_regs_using_pop (void) +@@ -10610,7 +10706,7 @@ ix86_emit_restore_regs_using_pop (void) for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, false)) @@ -1127,7 +1132,7 @@ index 5bcb7e0..05cc627 100644 } /* Emit code and notes for the LEAVE instruction. */ -@@ -10642,11 +10739,11 @@ ix86_emit_restore_regs_using_mov (HOST_WIDE_INT cfa_offset, +@@ -10653,11 +10749,11 @@ ix86_emit_restore_regs_using_mov (HOST_WIDE_INT cfa_offset, for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) if (!SSE_REGNO_P (regno) && ix86_save_reg (regno, maybe_eh_return)) { @@ -1141,7 +1146,7 @@ index 5bcb7e0..05cc627 100644 insn = emit_move_insn (reg, mem); if (m->fs.cfa_reg == crtl->drap_reg && regno == REGNO (crtl->drap_reg)) -@@ -11265,8 +11362,8 @@ ix86_expand_split_stack_prologue (void) +@@ -11276,8 +11372,8 @@ ix86_expand_split_stack_prologue (void) { rtx rax; @@ -1152,7 +1157,7 @@ index 5bcb7e0..05cc627 100644 use_reg (&call_fusage, rax); } -@@ -11345,8 +11442,8 @@ ix86_expand_split_stack_prologue (void) +@@ -11356,8 +11452,8 @@ ix86_expand_split_stack_prologue (void) /* If we are in 64-bit mode and this function uses a static chain, we saved %r10 in %rax before calling _morestack. */ if (TARGET_64BIT && DECL_STATIC_CHAIN (cfun->decl)) @@ -1163,7 +1168,7 @@ index 5bcb7e0..05cc627 100644 /* If this function calls va_start, we need to store a pointer to the arguments on the old stack, because they may not have been -@@ -11560,6 +11657,12 @@ ix86_decompose_address (rtx addr, struct ix86_address *out) +@@ -11547,6 +11643,12 @@ ix86_decompose_address (rtx addr, struct ix86_address *out) scale = 1 << scale; break; @@ -1176,7 +1181,7 @@ index 5bcb7e0..05cc627 100644 case UNSPEC: if (XINT (op, 1) == UNSPEC_TP && TARGET_TLS_DIRECT_SEG_REFS -@@ -11642,6 +11745,12 @@ ix86_decompose_address (rtx addr, struct ix86_address *out) +@@ -11616,6 +11718,12 @@ ix86_decompose_address (rtx addr, struct ix86_address *out) return 0; } @@ -1189,7 +1194,7 @@ index 5bcb7e0..05cc627 100644 /* Extract the integral value of scale. */ if (scale_rtx) { -@@ -12599,15 +12708,20 @@ legitimize_pic_address (rtx orig, rtx reg) +@@ -12610,15 +12718,20 @@ legitimize_pic_address (rtx orig, rtx reg) /* Load the thread pointer. If TO_REG is true, force it into a register. */ static rtx @@ -1214,7 +1219,7 @@ index 5bcb7e0..05cc627 100644 return tp; } -@@ -12659,6 +12773,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) +@@ -12670,6 +12783,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) { rtx dest, base, off; rtx pic = NULL_RTX, tp = NULL_RTX; @@ -1222,7 +1227,7 @@ index 5bcb7e0..05cc627 100644 int type; switch (model) -@@ -12684,7 +12799,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) +@@ -12695,7 +12809,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) else emit_insn (gen_tls_dynamic_gnu2_32 (dest, x, pic)); @@ -1231,7 +1236,7 @@ index 5bcb7e0..05cc627 100644 dest = force_reg (Pmode, gen_rtx_PLUS (Pmode, tp, dest)); if (GET_MODE (x) != Pmode) -@@ -12702,7 +12817,8 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) +@@ -12713,7 +12827,8 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) rtx insns; start_sequence (); @@ -1241,7 +1246,7 @@ index 5bcb7e0..05cc627 100644 insns = get_insns (); end_sequence (); -@@ -12740,7 +12856,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) +@@ -12751,7 +12866,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) else emit_insn (gen_tls_dynamic_gnu2_32 (base, tmp, pic)); @@ -1250,7 +1255,7 @@ index 5bcb7e0..05cc627 100644 set_unique_reg_note (get_last_insn (), REG_EQUAL, gen_rtx_MINUS (Pmode, tmp, tp)); } -@@ -12754,7 +12870,8 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) +@@ -12765,7 +12880,8 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) rtx insns, eqv; start_sequence (); @@ -1260,7 +1265,7 @@ index 5bcb7e0..05cc627 100644 insns = get_insns (); end_sequence (); -@@ -12800,6 +12917,9 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) +@@ -12811,6 +12927,9 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) return dest; } @@ -1270,7 +1275,7 @@ index 5bcb7e0..05cc627 100644 pic = NULL; type = UNSPEC_GOTNTPOFF; } -@@ -12822,22 +12942,23 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) +@@ -12833,22 +12952,23 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) type = UNSPEC_INDNTPOFF; } @@ -1302,7 +1307,7 @@ index 5bcb7e0..05cc627 100644 dest = gen_reg_rtx (Pmode); emit_insn (gen_subsi3 (dest, base, off)); } -@@ -12851,12 +12972,13 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) +@@ -12862,12 +12982,13 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) if (TARGET_64BIT || TARGET_ANY_GNU_TLS) { @@ -1318,7 +1323,7 @@ index 5bcb7e0..05cc627 100644 dest = gen_reg_rtx (Pmode); emit_insn (gen_subsi3 (dest, base, off)); } -@@ -13937,6 +14059,7 @@ get_some_local_dynamic_name (void) +@@ -13950,6 +14071,7 @@ get_some_local_dynamic_name (void) ; -- print a semicolon (after prefixes due to bug in older gas). ~ -- print "i" if TARGET_AVX2, "f" otherwise. @ -- print a segment register of thread base pointer load @@ -1326,7 +1331,7 @@ index 5bcb7e0..05cc627 100644 */ void -@@ -14447,6 +14570,11 @@ ix86_print_operand (FILE *file, rtx x, int code) +@@ -14460,6 +14582,11 @@ ix86_print_operand (FILE *file, rtx x, int code) putc (TARGET_AVX2 ? 'i' : 'f', file); return; @@ -1338,7 +1343,7 @@ index 5bcb7e0..05cc627 100644 default: output_operand_lossage ("invalid operand code '%c'", code); } -@@ -14587,8 +14715,8 @@ ix86_print_operand (FILE *file, rtx x, int code) +@@ -14600,8 +14727,8 @@ ix86_print_operand (FILE *file, rtx x, int code) static bool ix86_print_operand_punct_valid_p (unsigned char code) { @@ -1349,7 +1354,7 @@ index 5bcb7e0..05cc627 100644 } /* Print a memory operand whose address is ADDR. */ -@@ -20552,7 +20680,7 @@ ix86_split_to_parts (rtx operand, rtx *parts, enum machine_mode mode) +@@ -20560,7 +20687,7 @@ ix86_split_to_parts (rtx operand, rtx *parts, enum machine_mode mode) gcc_assert (ok); operand = copy_rtx (operand); @@ -1358,7 +1363,7 @@ index 5bcb7e0..05cc627 100644 parts[0] = parts[1] = parts[2] = parts[3] = operand; return size; } -@@ -20705,7 +20833,7 @@ ix86_split_long_move (rtx operands[]) +@@ -20713,7 +20840,7 @@ ix86_split_long_move (rtx operands[]) if (push_operand (operands[0], VOIDmode)) { operands[0] = copy_rtx (operands[0]); @@ -1367,7 +1372,7 @@ index 5bcb7e0..05cc627 100644 } else operands[0] = gen_lowpart (DImode, operands[0]); -@@ -21260,14 +21388,9 @@ ix86_adjust_counter (rtx countreg, HOST_WIDE_INT value) +@@ -21268,14 +21395,9 @@ ix86_adjust_counter (rtx countreg, HOST_WIDE_INT value) rtx ix86_zero_extend_to_Pmode (rtx exp) { @@ -1385,7 +1390,7 @@ index 5bcb7e0..05cc627 100644 } /* Divide COUNTREG by SCALE. */ -@@ -22295,11 +22418,11 @@ ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp, +@@ -22303,11 +22425,11 @@ ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp, gcc_unreachable (); case loop: need_zero_guard = true; @@ -1399,7 +1404,7 @@ index 5bcb7e0..05cc627 100644 break; case rep_prefix_8_byte: size_needed = 8; -@@ -22465,13 +22588,13 @@ ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp, +@@ -22473,13 +22595,13 @@ ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp, break; case loop: expand_set_or_movmem_via_loop (dst, src, destreg, srcreg, NULL, @@ -1415,7 +1420,7 @@ index 5bcb7e0..05cc627 100644 expected_size); break; case rep_prefix_8_byte: -@@ -22683,11 +22806,11 @@ ix86_expand_setmem (rtx dst, rtx count_exp, rtx val_exp, rtx align_exp, +@@ -22691,11 +22813,11 @@ ix86_expand_setmem (rtx dst, rtx count_exp, rtx val_exp, rtx align_exp, gcc_unreachable (); case loop: need_zero_guard = true; @@ -1429,7 +1434,7 @@ index 5bcb7e0..05cc627 100644 break; case rep_prefix_8_byte: size_needed = 8; -@@ -22858,11 +22981,11 @@ ix86_expand_setmem (rtx dst, rtx count_exp, rtx val_exp, rtx align_exp, +@@ -22866,11 +22988,11 @@ ix86_expand_setmem (rtx dst, rtx count_exp, rtx val_exp, rtx align_exp, break; case loop: expand_set_or_movmem_via_loop (dst, NULL, destreg, NULL, promoted_val, @@ -1443,7 +1448,7 @@ index 5bcb7e0..05cc627 100644 break; case rep_prefix_8_byte: expand_setmem_via_rep_stos (dst, destreg, promoted_val, count_exp, -@@ -23225,13 +23348,13 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1, +@@ -23233,13 +23355,13 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1, && !local_symbolic_operand (XEXP (fnaddr, 0), VOIDmode)) fnaddr = gen_rtx_MEM (QImode, construct_plt_address (XEXP (fnaddr, 0))); else if (sibcall @@ -1462,7 +1467,7 @@ index 5bcb7e0..05cc627 100644 } vec_len = 0; -@@ -24547,10 +24670,13 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) +@@ -24564,10 +24686,13 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) /* Load the function address to r11. Try to load address using the shorter movl instead of movabs. We may want to support movq for kernel mode, but kernel does not use trampolines at @@ -1479,7 +1484,7 @@ index 5bcb7e0..05cc627 100644 mem = adjust_address (m_tramp, HImode, offset); emit_move_insn (mem, gen_int_mode (0xbb41, HImode)); -@@ -24569,9 +24695,9 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) +@@ -24586,9 +24711,9 @@ ix86_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) offset += 10; } @@ -1492,7 +1497,7 @@ index 5bcb7e0..05cc627 100644 { opcode = 0xba41; size = 6; -@@ -32215,7 +32341,7 @@ x86_this_parameter (tree function) +@@ -32232,7 +32357,7 @@ x86_this_parameter (tree function) parm_regs = x86_64_ms_abi_int_parameter_registers; else parm_regs = x86_64_int_parameter_registers; @@ -1501,10 +1506,10 @@ index 5bcb7e0..05cc627 100644 } nregs = ix86_function_regparm (type, function); -diff --git a/src/gcc/config/i386/i386.h b/src/gcc/config/i386/i386.h +diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 835ea10..0a9a77a 100644 ---- a/src/gcc/config/i386/i386.h -+++ b/src/gcc/config/i386/i386.h +--- a/gcc/config/i386/i386.h ++++ b/gcc/config/i386/i386.h @@ -42,7 +42,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see /* Redefines for option macros. */ @@ -1541,10 +1546,10 @@ index 835ea10..0a9a77a 100644 /* A C expression whose value is zero if pointers that need to be extended from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and -diff --git a/src/gcc/config/i386/i386.md b/src/gcc/config/i386/i386.md -index b0e278e..8da9770 100644 ---- a/src/gcc/config/i386/i386.md -+++ b/src/gcc/config/i386/i386.md +diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md +index f85f17a..c23f9c6 100644 +--- a/gcc/config/i386/i386.md ++++ b/gcc/config/i386/i386.md @@ -61,7 +61,9 @@ ;; Y -- print condition for XOP pcom* instruction. ;; + -- print a branch hint as 'cs' or 'ds' prefix @@ -1555,7 +1560,7 @@ index b0e278e..8da9770 100644 (define_c_enum "unspec" [ ;; Relocation specifiers -@@ -896,6 +898,11 @@ +@@ -899,6 +901,11 @@ ;; pointer-sized quantities. Exactly one of the two alternatives will match. (define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")]) @@ -1567,7 +1572,7 @@ index b0e278e..8da9770 100644 ;; This mode iterator allows :PTR to be used for patterns that operate on ;; ptr_mode sized quantities. (define_mode_iterator PTR -@@ -1704,8 +1711,8 @@ +@@ -1707,8 +1714,8 @@ (set_attr "mode" "SI")]) (define_insn "*push<mode>2_prologue" @@ -1578,7 +1583,7 @@ index b0e278e..8da9770 100644 (clobber (mem:BLK (scratch)))] "" "push{<imodesuffix>}\t%1" -@@ -1713,16 +1720,16 @@ +@@ -1716,16 +1723,16 @@ (set_attr "mode" "<MODE>")]) (define_insn "*pop<mode>1" @@ -1599,7 +1604,7 @@ index b0e278e..8da9770 100644 (clobber (mem:BLK (scratch)))] "" "pop{<imodesuffix>}\t%0" -@@ -3443,9 +3450,9 @@ +@@ -3446,9 +3453,9 @@ }) (define_insn "*zero_extendsidi2_rex64" @@ -1611,7 +1616,7 @@ index b0e278e..8da9770 100644 "TARGET_64BIT" "@ mov{l}\t{%1, %k0|%k0, %1} -@@ -11128,10 +11135,15 @@ +@@ -11119,10 +11126,15 @@ (set_attr "modrm" "0")]) (define_expand "indirect_jump" @@ -1629,7 +1634,7 @@ index b0e278e..8da9770 100644 "" "jmp\t%A0" [(set_attr "type" "ibr") -@@ -11173,12 +11185,13 @@ +@@ -11164,12 +11176,13 @@ operands[0] = expand_simple_binop (Pmode, code, op0, op1, NULL_RTX, 0, OPTAB_DIRECT); } @@ -1646,7 +1651,7 @@ index b0e278e..8da9770 100644 (use (label_ref (match_operand 1 "" "")))] "" "jmp\t%A0" -@@ -11266,7 +11279,7 @@ +@@ -11257,7 +11270,7 @@ }) (define_insn_and_split "*call_vzeroupper" @@ -1655,7 +1660,7 @@ index b0e278e..8da9770 100644 (match_operand 1 "" "")) (unspec [(match_operand 2 "const_int_operand" "")] UNSPEC_CALL_NEEDS_VZEROUPPER)] -@@ -11278,7 +11291,7 @@ +@@ -11269,7 +11282,7 @@ [(set_attr "type" "call")]) (define_insn "*call" @@ -1664,7 +1669,7 @@ index b0e278e..8da9770 100644 (match_operand 1 "" ""))] "!SIBLING_CALL_P (insn)" "* return ix86_output_call_insn (insn, operands[0]);" -@@ -11330,7 +11343,7 @@ +@@ -11321,7 +11334,7 @@ [(set_attr "type" "call")]) (define_insn_and_split "*sibcall_vzeroupper" @@ -1673,7 +1678,7 @@ index b0e278e..8da9770 100644 (match_operand 1 "" "")) (unspec [(match_operand 2 "const_int_operand" "")] UNSPEC_CALL_NEEDS_VZEROUPPER)] -@@ -11342,7 +11355,7 @@ +@@ -11333,7 +11346,7 @@ [(set_attr "type" "call")]) (define_insn "*sibcall" @@ -1682,7 +1687,7 @@ index b0e278e..8da9770 100644 (match_operand 1 "" ""))] "SIBLING_CALL_P (insn)" "* return ix86_output_call_insn (insn, operands[0]);" -@@ -11439,7 +11452,7 @@ +@@ -11430,7 +11443,7 @@ (define_insn_and_split "*call_value_vzeroupper" [(set (match_operand 0 "" "") @@ -1691,7 +1696,7 @@ index b0e278e..8da9770 100644 (match_operand 2 "" ""))) (unspec [(match_operand 3 "const_int_operand" "")] UNSPEC_CALL_NEEDS_VZEROUPPER)] -@@ -11452,7 +11465,7 @@ +@@ -11443,7 +11456,7 @@ (define_insn "*call_value" [(set (match_operand 0 "" "") @@ -1700,7 +1705,7 @@ index b0e278e..8da9770 100644 (match_operand 2 "" "")))] "!SIBLING_CALL_P (insn)" "* return ix86_output_call_insn (insn, operands[1]);" -@@ -11460,7 +11473,7 @@ +@@ -11451,7 +11464,7 @@ (define_insn_and_split "*sibcall_value_vzeroupper" [(set (match_operand 0 "" "") @@ -1709,7 +1714,7 @@ index b0e278e..8da9770 100644 (match_operand 2 "" ""))) (unspec [(match_operand 3 "const_int_operand" "")] UNSPEC_CALL_NEEDS_VZEROUPPER)] -@@ -11473,7 +11486,7 @@ +@@ -11464,7 +11477,7 @@ (define_insn "*sibcall_value" [(set (match_operand 0 "" "") @@ -1718,7 +1723,7 @@ index b0e278e..8da9770 100644 (match_operand 2 "" "")))] "SIBLING_CALL_P (insn)" "* return ix86_output_call_insn (insn, operands[1]);" -@@ -12578,7 +12591,7 @@ +@@ -12569,7 +12582,7 @@ [(set (match_operand:SI 0 "register_operand" "=a") (unspec:SI [(match_operand:SI 1 "register_operand" "b") @@ -1727,7 +1732,7 @@ index b0e278e..8da9770 100644 (match_operand:SI 3 "constant_call_address_operand" "z")] UNSPEC_TLS_GD)) (clobber (match_scratch:SI 4 "=d")) -@@ -12603,20 +12616,20 @@ +@@ -12594,20 +12607,20 @@ [(parallel [(set (match_operand:SI 0 "register_operand" "") (unspec:SI [(match_operand:SI 2 "register_operand" "") @@ -1756,7 +1761,7 @@ index b0e278e..8da9770 100644 "TARGET_64BIT" { if (!TARGET_X32) -@@ -12633,14 +12646,15 @@ +@@ -12624,14 +12637,15 @@ (set (attr "length") (symbol_ref "TARGET_X32 ? 15 : 16"))]) @@ -1778,7 +1783,7 @@ index b0e278e..8da9770 100644 (define_insn "*tls_local_dynamic_base_32_gnu" [(set (match_operand:SI 0 "register_operand" "=a") -@@ -12677,12 +12691,12 @@ +@@ -12668,12 +12682,12 @@ (clobber (match_scratch:SI 4 "")) (clobber (reg:CC FLAGS_REG))])]) @@ -1797,7 +1802,7 @@ index b0e278e..8da9770 100644 "TARGET_64BIT" { output_asm_insn -@@ -12694,13 +12708,14 @@ +@@ -12685,13 +12699,14 @@ [(set_attr "type" "multi") (set_attr "length" "12")]) @@ -1817,7 +1822,7 @@ index b0e278e..8da9770 100644 ;; Local dynamic of a single variable is a lose. Show combine how ;; to convert that back to global dynamic. -@@ -12712,7 +12727,7 @@ +@@ -12703,7 +12718,7 @@ (match_operand:SI 2 "constant_call_address_operand" "z")] UNSPEC_TLS_LD_BASE) (const:SI (unspec:SI @@ -1826,7 +1831,7 @@ index b0e278e..8da9770 100644 UNSPEC_DTPOFF)))) (clobber (match_scratch:SI 4 "=d")) (clobber (match_scratch:SI 5 "=c")) -@@ -12810,7 +12825,7 @@ +@@ -12801,7 +12816,7 @@ (define_insn "tls_initial_exec_64_sun" [(set (match_operand:DI 0 "register_operand" "=a") (unspec:DI @@ -1835,7 +1840,7 @@ index b0e278e..8da9770 100644 UNSPEC_TLS_IE_SUN)) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && TARGET_SUN_TLS" -@@ -12827,7 +12842,7 @@ +@@ -12818,7 +12833,7 @@ [(set (match_dup 3) (plus:SI (match_operand:SI 2 "register_operand" "") (const:SI @@ -1844,7 +1849,7 @@ index b0e278e..8da9770 100644 UNSPEC_TLSDESC)))) (parallel [(set (match_operand:SI 0 "register_operand" "") -@@ -12845,7 +12860,7 @@ +@@ -12836,7 +12851,7 @@ [(set (match_operand:SI 0 "register_operand" "=r") (plus:SI (match_operand:SI 1 "register_operand" "b") (const:SI @@ -1853,7 +1858,7 @@ index b0e278e..8da9770 100644 UNSPEC_TLSDESC))))] "!TARGET_64BIT && TARGET_GNU2_TLS" "lea{l}\t{%E2@TLSDESC(%1), %0|%0, %E2@TLSDESC[%1]}" -@@ -12856,7 +12871,7 @@ +@@ -12847,7 +12862,7 @@ (define_insn "*tls_dynamic_gnu2_call_32" [(set (match_operand:SI 0 "register_operand" "=a") @@ -1862,7 +1867,7 @@ index b0e278e..8da9770 100644 (match_operand:SI 2 "register_operand" "0") ;; we have to make sure %ebx still points to the GOT (match_operand:SI 3 "register_operand" "b") -@@ -12872,13 +12887,13 @@ +@@ -12863,13 +12878,13 @@ (define_insn_and_split "*tls_dynamic_gnu2_combine_32" [(set (match_operand:SI 0 "register_operand" "=&a") (plus:SI @@ -1878,7 +1883,7 @@ index b0e278e..8da9770 100644 UNSPEC_DTPOFF)))) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT && TARGET_GNU2_TLS" -@@ -12932,7 +12947,7 @@ +@@ -12923,7 +12938,7 @@ (define_insn_and_split "*tls_dynamic_gnu2_combine_64" [(set (match_operand:DI 0 "register_operand" "=&a") (plus:DI @@ -1887,7 +1892,7 @@ index b0e278e..8da9770 100644 (match_operand:DI 3 "" "") (reg:DI SP_REG)] UNSPEC_TLSDESC) -@@ -15728,17 +15743,17 @@ +@@ -15719,17 +15734,17 @@ "ix86_current_function_needs_cld = 1;") (define_insn "*strmovdi_rex_1" @@ -1914,7 +1919,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "memory" "both") (set_attr "mode" "DI")]) -@@ -15753,7 +15768,7 @@ +@@ -15744,7 +15759,7 @@ (plus:P (match_dup 3) (const_int 4)))] "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" @@ -1923,7 +1928,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "memory" "both") (set_attr "mode" "SI")]) -@@ -15768,7 +15783,7 @@ +@@ -15759,7 +15774,7 @@ (plus:P (match_dup 3) (const_int 2)))] "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" @@ -1932,7 +1937,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "memory" "both") (set_attr "mode" "HI")]) -@@ -15783,7 +15798,7 @@ +@@ -15774,7 +15789,7 @@ (plus:P (match_dup 3) (const_int 1)))] "!(fixed_regs[SI_REG] || fixed_regs[DI_REG])" @@ -1941,7 +1946,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "memory" "both") (set (attr "prefix_rex") -@@ -15806,20 +15821,20 @@ +@@ -15797,20 +15812,20 @@ "ix86_current_function_needs_cld = 1;") (define_insn "*rep_movdi_rex64" @@ -1971,7 +1976,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "both") -@@ -15838,7 +15853,7 @@ +@@ -15829,7 +15844,7 @@ (mem:BLK (match_dup 4))) (use (match_dup 5))] "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" @@ -1980,7 +1985,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "both") -@@ -15855,7 +15870,7 @@ +@@ -15846,7 +15861,7 @@ (mem:BLK (match_dup 4))) (use (match_dup 5))] "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" @@ -1989,7 +1994,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "both") -@@ -15917,15 +15932,15 @@ +@@ -15908,15 +15923,15 @@ "ix86_current_function_needs_cld = 1;") (define_insn "*strsetdi_rex_1" @@ -2010,7 +2015,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "memory" "store") (set_attr "mode" "DI")]) -@@ -15938,7 +15953,7 @@ +@@ -15929,7 +15944,7 @@ (const_int 4))) (unspec [(const_int 0)] UNSPEC_STOS)] "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" @@ -2019,7 +2024,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "memory" "store") (set_attr "mode" "SI")]) -@@ -15951,7 +15966,7 @@ +@@ -15942,7 +15957,7 @@ (const_int 2))) (unspec [(const_int 0)] UNSPEC_STOS)] "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" @@ -2028,7 +2033,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "memory" "store") (set_attr "mode" "HI")]) -@@ -15964,7 +15979,7 @@ +@@ -15955,7 +15970,7 @@ (const_int 1))) (unspec [(const_int 0)] UNSPEC_STOS)] "!(fixed_regs[AX_REG] || fixed_regs[DI_REG])" @@ -2037,7 +2042,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "memory" "store") (set (attr "prefix_rex") -@@ -15985,18 +16000,18 @@ +@@ -15976,18 +15991,18 @@ "ix86_current_function_needs_cld = 1;") (define_insn "*rep_stosdi_rex64" @@ -2062,7 +2067,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "store") -@@ -16013,7 +16028,7 @@ +@@ -16004,7 +16019,7 @@ (use (match_operand:SI 2 "register_operand" "a")) (use (match_dup 4))] "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" @@ -2071,7 +2076,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "store") -@@ -16029,7 +16044,7 @@ +@@ -16020,7 +16035,7 @@ (use (match_operand:QI 2 "register_operand" "a")) (use (match_dup 4))] "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" @@ -2080,7 +2085,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "prefix_rep" "1") (set_attr "memory" "store") -@@ -16150,7 +16165,7 @@ +@@ -16141,7 +16156,7 @@ (clobber (match_operand:P 1 "register_operand" "=D")) (clobber (match_operand:P 2 "register_operand" "=c"))] "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" @@ -2089,7 +2094,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "mode" "QI") (set (attr "prefix_rex") -@@ -16190,7 +16205,7 @@ +@@ -16181,7 +16196,7 @@ (clobber (match_operand:P 1 "register_operand" "=D")) (clobber (match_operand:P 2 "register_operand" "=c"))] "!(fixed_regs[CX_REG] || fixed_regs[SI_REG] || fixed_regs[DI_REG])" @@ -2098,7 +2103,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "mode" "QI") (set (attr "prefix_rex") -@@ -16231,7 +16246,7 @@ +@@ -16222,7 +16237,7 @@ (clobber (match_operand:P 1 "register_operand" "=D")) (clobber (reg:CC FLAGS_REG))] "!(fixed_regs[AX_REG] || fixed_regs[CX_REG] || fixed_regs[DI_REG])" @@ -2107,7 +2112,7 @@ index b0e278e..8da9770 100644 [(set_attr "type" "str") (set_attr "mode" "QI") (set (attr "prefix_rex") -@@ -17376,131 +17391,131 @@ +@@ -17399,131 +17414,131 @@ ;; alternative when no register is available later. (define_peephole2 @@ -2277,7 +2282,7 @@ index b0e278e..8da9770 100644 ;; Convert compares with 1 to shorter inc/dec operations when CF is not ;; required and register dies. Similarly for 128 to -128. -@@ -17611,7 +17626,7 @@ +@@ -17634,7 +17649,7 @@ ;; leal (%edx,%eax,4), %eax (define_peephole2 @@ -2286,7 +2291,7 @@ index b0e278e..8da9770 100644 (parallel [(set (match_operand 0 "register_operand" "") (ashift (match_operand 1 "register_operand" "") (match_operand 2 "const_int_operand" ""))) -@@ -17637,16 +17652,16 @@ +@@ -17660,16 +17675,16 @@ enum machine_mode op1mode = GET_MODE (operands[1]); enum machine_mode mode = op1mode == DImode ? DImode : SImode; int scale = 1 << INTVAL (operands[2]); @@ -2309,7 +2314,7 @@ index b0e278e..8da9770 100644 operands[5] = gen_rtx_SUBREG (op1mode, operands[5], 0); operands[0] = dest; }) -@@ -18037,7 +18052,7 @@ +@@ -18060,7 +18075,7 @@ { rtx (*insn)(rtx); @@ -2318,10 +2323,10 @@ index b0e278e..8da9770 100644 ? gen_lwp_slwpcbdi : gen_lwp_slwpcbsi); -diff --git a/src/gcc/config/i386/i386.opt b/src/gcc/config/i386/i386.opt +diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index 6c516e7..97130e1 100644 ---- a/src/gcc/config/i386/i386.opt -+++ b/src/gcc/config/i386/i386.opt +--- a/gcc/config/i386/i386.opt ++++ b/gcc/config/i386/i386.opt @@ -159,6 +159,20 @@ Enum(cmodel) String(32) Value(CM_32) EnumValue Enum(cmodel) String(kernel) Value(CM_KERNEL) @@ -2380,10 +2385,10 @@ index 6c516e7..97130e1 100644 Do not support SSE4.1 and SSE4.2 built-in functions and code generation msse5 -diff --git a/src/gcc/config/i386/predicates.md b/src/gcc/config/i386/predicates.md +diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 9e31291..3cafdb9 100644 ---- a/src/gcc/config/i386/predicates.md -+++ b/src/gcc/config/i386/predicates.md +--- a/gcc/config/i386/predicates.md ++++ b/gcc/config/i386/predicates.md @@ -1,5 +1,5 @@ ;; Predicate definitions for IA-32 and x86-64. -;; Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 @@ -2453,10 +2458,10 @@ index 9e31291..3cafdb9 100644 (match_operand 0 "register_no_elim_operand"))) ;; Match exactly zero. -diff --git a/src/gcc/config/i386/sse.md b/src/gcc/config/i386/sse.md -index 8bffa52..c32ddf0 100644 ---- a/src/gcc/config/i386/sse.md -+++ b/src/gcc/config/i386/sse.md +diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md +index 6e3ec00..81a0bd54 100644 +--- a/gcc/config/i386/sse.md ++++ b/gcc/config/i386/sse.md @@ -8083,8 +8083,8 @@ "monitor\t%0, %1, %2" [(set_attr "length" "3")]) @@ -2468,10 +2473,10 @@ index 8bffa52..c32ddf0 100644 (match_operand:SI 1 "register_operand" "c") (match_operand:SI 2 "register_operand" "d")] UNSPECV_MONITOR)] -diff --git a/src/gcc/config/m68k/m68k.opt b/src/gcc/config/m68k/m68k.opt +diff --git a/gcc/config/m68k/m68k.opt b/gcc/config/m68k/m68k.opt index 14428fc..00bc2d5 100644 ---- a/src/gcc/config/m68k/m68k.opt -+++ b/src/gcc/config/m68k/m68k.opt +--- a/gcc/config/m68k/m68k.opt ++++ b/gcc/config/m68k/m68k.opt @@ -136,7 +136,7 @@ Target RejectNegative Generate code for a Fido A @@ -2481,10 +2486,10 @@ index 14428fc..00bc2d5 100644 Generate code which uses hardware floating point instructions mid-shared-library -diff --git a/src/gcc/config/mep/mep.opt b/src/gcc/config/mep/mep.opt +diff --git a/gcc/config/mep/mep.opt b/gcc/config/mep/mep.opt index 38b8f80..0ea19e6 100644 ---- a/src/gcc/config/mep/mep.opt -+++ b/src/gcc/config/mep/mep.opt +--- a/gcc/config/mep/mep.opt ++++ b/gcc/config/mep/mep.opt @@ -55,7 +55,7 @@ Target Mask(COP) Enable MeP Coprocessor @@ -2494,10 +2499,10 @@ index 38b8f80..0ea19e6 100644 Enable MeP Coprocessor with 32-bit registers mcop64 -diff --git a/src/gcc/config/pa/pa-hpux.opt b/src/gcc/config/pa/pa-hpux.opt +diff --git a/gcc/config/pa/pa-hpux.opt b/gcc/config/pa/pa-hpux.opt index ed5d6a4..b709b83 100644 ---- a/src/gcc/config/pa/pa-hpux.opt -+++ b/src/gcc/config/pa/pa-hpux.opt +--- a/gcc/config/pa/pa-hpux.opt ++++ b/gcc/config/pa/pa-hpux.opt @@ -23,7 +23,7 @@ Variable int flag_pa_unix = TARGET_HPUX_11_31 ? 2003 : TARGET_HPUX_11_11 ? 1998 : TARGET_HPUX_10_10 ? 1995 : 1993 @@ -2507,10 +2512,10 @@ index ed5d6a4..b709b83 100644 Generate cpp defines for server IO munix=93 -diff --git a/src/gcc/config/pa/pa64-hpux.opt b/src/gcc/config/pa/pa64-hpux.opt +diff --git a/gcc/config/pa/pa64-hpux.opt b/gcc/config/pa/pa64-hpux.opt index 36b1c61..56ca35e 100644 ---- a/src/gcc/config/pa/pa64-hpux.opt -+++ b/src/gcc/config/pa/pa64-hpux.opt +--- a/gcc/config/pa/pa64-hpux.opt ++++ b/gcc/config/pa/pa64-hpux.opt @@ -19,7 +19,7 @@ ; <http://www.gnu.org/licenses/>. @@ -2520,20 +2525,20 @@ index 36b1c61..56ca35e 100644 Assume code will be linked by GNU ld mhp-ld -diff --git a/src/gcc/config/picochip/picochip.opt b/src/gcc/config/picochip/picochip.opt +diff --git a/gcc/config/picochip/picochip.opt b/gcc/config/picochip/picochip.opt index 4726f49..a4b25e5 100644 ---- a/src/gcc/config/picochip/picochip.opt -+++ b/src/gcc/config/picochip/picochip.opt +--- a/gcc/config/picochip/picochip.opt ++++ b/gcc/config/picochip/picochip.opt @@ -43,4 +43,4 @@ Target Mask(INEFFICIENT_WARNINGS) Generate warnings when inefficient code is known to be generated. minefficient -Target Mask(INEFFICIENT_WARNINGS) MaskExists Undocumented +Target Mask(INEFFICIENT_WARNINGS) Undocumented -diff --git a/src/gcc/config/rs6000/sysv4.opt b/src/gcc/config/rs6000/sysv4.opt +diff --git a/gcc/config/rs6000/sysv4.opt b/gcc/config/rs6000/sysv4.opt index 0d8d955..474203d 100644 ---- a/src/gcc/config/rs6000/sysv4.opt -+++ b/src/gcc/config/rs6000/sysv4.opt +--- a/gcc/config/rs6000/sysv4.opt ++++ b/gcc/config/rs6000/sysv4.opt @@ -66,7 +66,7 @@ Target Report RejectNegative Mask(LITTLE_ENDIAN) Produce little endian code @@ -2543,10 +2548,10 @@ index 0d8d955..474203d 100644 Produce little endian code mbig-endian -diff --git a/src/gcc/config/sh/sh.opt b/src/gcc/config/sh/sh.opt +diff --git a/gcc/config/sh/sh.opt b/gcc/config/sh/sh.opt index 0389fce..969bff0 100644 ---- a/src/gcc/config/sh/sh.opt -+++ b/src/gcc/config/sh/sh.opt +--- a/gcc/config/sh/sh.opt ++++ b/gcc/config/sh/sh.opt @@ -320,7 +320,7 @@ Target Report RejectNegative Mask(RELAX) Shorten address references during linking @@ -2556,10 +2561,10 @@ index 0389fce..969bff0 100644 Follow Renesas (formerly Hitachi) / SuperH calling conventions msoft-atomic -diff --git a/src/gcc/config/sparc/long-double-switch.opt b/src/gcc/config/sparc/long-double-switch.opt +diff --git a/gcc/config/sparc/long-double-switch.opt b/gcc/config/sparc/long-double-switch.opt index eb3c1a0..8ad32bd 100644 ---- a/src/gcc/config/sparc/long-double-switch.opt -+++ b/src/gcc/config/sparc/long-double-switch.opt +--- a/gcc/config/sparc/long-double-switch.opt ++++ b/gcc/config/sparc/long-double-switch.opt @@ -19,7 +19,7 @@ ; <http://www.gnu.org/licenses/>. @@ -2569,10 +2574,10 @@ index eb3c1a0..8ad32bd 100644 Use 128-bit long double mlong-double-64 -diff --git a/src/gcc/config/sparc/sparc.opt b/src/gcc/config/sparc/sparc.opt +diff --git a/gcc/config/sparc/sparc.opt b/gcc/config/sparc/sparc.opt index 01f3d43..58ba6b7 100644 ---- a/src/gcc/config/sparc/sparc.opt -+++ b/src/gcc/config/sparc/sparc.opt +--- a/gcc/config/sparc/sparc.opt ++++ b/gcc/config/sparc/sparc.opt @@ -30,7 +30,7 @@ Target Report Mask(FPU) Use hardware FP @@ -2582,10 +2587,10 @@ index 01f3d43..58ba6b7 100644 Use hardware FP msoft-float -diff --git a/src/gcc/config/v850/v850.opt b/src/gcc/config/v850/v850.opt +diff --git a/gcc/config/v850/v850.opt b/gcc/config/v850/v850.opt index 12b0937..8fe244b 100644 ---- a/src/gcc/config/v850/v850.opt -+++ b/src/gcc/config/v850/v850.opt +--- a/gcc/config/v850/v850.opt ++++ b/gcc/config/v850/v850.opt @@ -102,7 +102,7 @@ Target RejectNegative Mask(V850E1) Compile for the v850e1 processor @@ -2595,10 +2600,10 @@ index 12b0937..8fe244b 100644 Compile for the v850es variant of the v850e1 mv850e2 -diff --git a/src/gcc/config/vax/vax.opt b/src/gcc/config/vax/vax.opt +diff --git a/gcc/config/vax/vax.opt b/gcc/config/vax/vax.opt index 82d6dee..83527ad 100644 ---- a/src/gcc/config/vax/vax.opt -+++ b/src/gcc/config/vax/vax.opt +--- a/gcc/config/vax/vax.opt ++++ b/gcc/config/vax/vax.opt @@ -31,7 +31,7 @@ Target RejectNegative Mask(G_FLOAT) Generate GFLOAT double precision code @@ -2608,10 +2613,48 @@ index 82d6dee..83527ad 100644 Generate GFLOAT double precision code mgnu -diff --git a/src/gcc/dwarf2out.c b/src/gcc/dwarf2out.c +diff --git a/gcc/configure b/gcc/configure +index 896e677..fe7b692 100755 +--- a/gcc/configure ++++ b/gcc/configure +@@ -13832,7 +13832,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) + LD="${LD-ld} -m elf_i386_fbsd" + ;; + x86_64-*linux*) +- LD="${LD-ld} -m elf_i386" ++ case `/usr/bin/file conftest.o` in ++ *x86-64*) ++ LD="${LD-ld} -m elf32_x86_64" ++ ;; ++ *) ++ LD="${LD-ld} -m elf_i386" ++ ;; ++ esac + ;; + ppc64-*linux*|powerpc64-*linux*) + LD="${LD-ld} -m elf32ppclinux" +@@ -18046,7 +18053,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 18049 "configure" ++#line 18056 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +@@ -18152,7 +18159,7 @@ else + lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 + lt_status=$lt_dlunknown + cat > conftest.$ac_ext <<_LT_EOF +-#line 18155 "configure" ++#line 18162 "configure" + #include "confdefs.h" + + #if HAVE_DLFCN_H +diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c index b99e45b..7c4f796 100644 ---- a/src/gcc/dwarf2out.c -+++ b/src/gcc/dwarf2out.c +--- a/gcc/dwarf2out.c ++++ b/gcc/dwarf2out.c @@ -10183,7 +10183,9 @@ dbx_reg_number (const_rtx rtl) } #endif @@ -2643,10 +2686,10 @@ index b99e45b..7c4f796 100644 && GET_MODE_CLASS (mode) == MODE_INT) mem_loc_result = based_loc_descr (XEXP (rtl, 0), INTVAL (XEXP (rtl, 1)), -diff --git a/src/gcc/emit-rtl.c b/src/gcc/emit-rtl.c +diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c index 9d877a7..90a2491 100644 ---- a/src/gcc/emit-rtl.c -+++ b/src/gcc/emit-rtl.c +--- a/gcc/emit-rtl.c ++++ b/gcc/emit-rtl.c @@ -964,6 +964,22 @@ void set_reg_attrs_from_value (rtx reg, rtx x) { @@ -2687,10 +2730,10 @@ index 9d877a7..90a2491 100644 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x))); } } -diff --git a/src/gcc/opth-gen.awk b/src/gcc/opth-gen.awk +diff --git a/gcc/opth-gen.awk b/gcc/opth-gen.awk index 541bc3e..9a7b6c3 100644 ---- a/src/gcc/opth-gen.awk -+++ b/src/gcc/opth-gen.awk +--- a/gcc/opth-gen.awk ++++ b/gcc/opth-gen.awk @@ -298,16 +298,25 @@ print ""; for (i = 0; i < n_opts; i++) { @@ -2760,10 +2803,10 @@ index 541bc3e..9a7b6c3 100644 } for (i = 0; i < n_extra_masks; i++) { print "#define TARGET_" extra_masks[i] \ -diff --git a/src/gcc/reginfo.c b/src/gcc/reginfo.c +diff --git a/gcc/reginfo.c b/gcc/reginfo.c index 6353126..f3a08f5 100644 ---- a/src/gcc/reginfo.c -+++ b/src/gcc/reginfo.c +--- a/gcc/reginfo.c ++++ b/gcc/reginfo.c @@ -1222,17 +1222,7 @@ reg_scan_mark_refs (rtx x, rtx insn) /* If this is setting a register from a register or from a simple conversion of a register, propagate REG_EXPR. */ @@ -2783,11 +2826,11 @@ index 6353126..f3a08f5 100644 /* ... fall through ... */ -diff --git a/src/gcc/testsuite/ChangeLog.x32 b/src/gcc/testsuite/ChangeLog.x32 +diff --git a/gcc/testsuite/ChangeLog.x32 b/gcc/testsuite/ChangeLog.x32 new file mode 100644 index 0000000..a80ca37 --- /dev/null -+++ b/src/gcc/testsuite/ChangeLog.x32 ++++ b/gcc/testsuite/ChangeLog.x32 @@ -0,0 +1,50 @@ +2012-12-09 H.J. Lu <hjl.tools@gmail.com> + @@ -2839,11 +2882,11 @@ index 0000000..a80ca37 + + PR target/52146 + * gcc.target/i386/pr52146.c: Update final-scan to allow $-18874240. -diff --git a/src/gcc/testsuite/gcc.dg/torture/pr52530.c b/src/gcc/testsuite/gcc.dg/torture/pr52530.c +diff --git a/gcc/testsuite/gcc.dg/torture/pr52530.c b/gcc/testsuite/gcc.dg/torture/pr52530.c new file mode 100644 index 0000000..d32ea82 --- /dev/null -+++ b/src/gcc/testsuite/gcc.dg/torture/pr52530.c ++++ b/gcc/testsuite/gcc.dg/torture/pr52530.c @@ -0,0 +1,30 @@ +/* { dg-do run } */ + @@ -2875,21 +2918,21 @@ index 0000000..d32ea82 + + return 0; +} -diff --git a/src/gcc/testsuite/gcc.target/i386/pr52146.c b/src/gcc/testsuite/gcc.target/i386/pr52146.c +diff --git a/gcc/testsuite/gcc.target/i386/pr52146.c b/gcc/testsuite/gcc.target/i386/pr52146.c index a4804e6..4eb91c0 100644 ---- a/src/gcc/testsuite/gcc.target/i386/pr52146.c -+++ b/src/gcc/testsuite/gcc.target/i386/pr52146.c +--- a/gcc/testsuite/gcc.target/i386/pr52146.c ++++ b/gcc/testsuite/gcc.target/i386/pr52146.c @@ -15,4 +15,4 @@ test2 (void) *apic_tpr_addr = 0; } -/* { dg-final { scan-assembler-not "-18874240" } } */ +/* { dg-final { scan-assembler-not "\[,\\t \]+-18874240" } } */ -diff --git a/src/gcc/testsuite/gcc.target/i386/pr52857-1.c b/src/gcc/testsuite/gcc.target/i386/pr52857-1.c +diff --git a/gcc/testsuite/gcc.target/i386/pr52857-1.c b/gcc/testsuite/gcc.target/i386/pr52857-1.c new file mode 100644 index 0000000..16fd78f --- /dev/null -+++ b/src/gcc/testsuite/gcc.target/i386/pr52857-1.c ++++ b/gcc/testsuite/gcc.target/i386/pr52857-1.c @@ -0,0 +1,10 @@ +/* { dg-do compile { target { ! { ia32 } } } } */ +/* { dg-options "-g -O -mx32 -maddress-mode=long" } */ @@ -2901,11 +2944,11 @@ index 0000000..16fd78f + int res; + get_BID128 (&res); +} -diff --git a/src/gcc/testsuite/gcc.target/i386/pr52857-2.c b/src/gcc/testsuite/gcc.target/i386/pr52857-2.c +diff --git a/gcc/testsuite/gcc.target/i386/pr52857-2.c b/gcc/testsuite/gcc.target/i386/pr52857-2.c new file mode 100644 index 0000000..879240a --- /dev/null -+++ b/src/gcc/testsuite/gcc.target/i386/pr52857-2.c ++++ b/gcc/testsuite/gcc.target/i386/pr52857-2.c @@ -0,0 +1,8 @@ +/* { dg-do compile { target { ! { ia32 } } } } */ +/* { dg-options "-g -O -mx32 -maddress-mode=long" } */ @@ -2915,11 +2958,11 @@ index 0000000..879240a +{ + uw_init_context_1 (__builtin_dwarf_cfa ()); +} -diff --git a/src/gcc/testsuite/gcc.target/i386/pr52876.c b/src/gcc/testsuite/gcc.target/i386/pr52876.c +diff --git a/gcc/testsuite/gcc.target/i386/pr52876.c b/gcc/testsuite/gcc.target/i386/pr52876.c new file mode 100644 index 0000000..6d5e47a --- /dev/null -+++ b/src/gcc/testsuite/gcc.target/i386/pr52876.c ++++ b/gcc/testsuite/gcc.target/i386/pr52876.c @@ -0,0 +1,25 @@ +/* { dg-do run { target { x32 } } } */ +/* { dg-options "-O2 -mx32 -maddress-mode=long" } */ @@ -2946,11 +2989,11 @@ index 0000000..6d5e47a + + return 0; +} -diff --git a/src/gcc/testsuite/gcc.target/i386/pr52882.c b/src/gcc/testsuite/gcc.target/i386/pr52882.c +diff --git a/gcc/testsuite/gcc.target/i386/pr52882.c b/gcc/testsuite/gcc.target/i386/pr52882.c new file mode 100644 index 0000000..5f0f12a --- /dev/null -+++ b/src/gcc/testsuite/gcc.target/i386/pr52882.c ++++ b/gcc/testsuite/gcc.target/i386/pr52882.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-options "-O" } */ @@ -2971,11 +3014,11 @@ index 0000000..5f0f12a + for (; a.f1;) { + } +} -diff --git a/src/gcc/testsuite/gcc.target/i386/pr52883.c b/src/gcc/testsuite/gcc.target/i386/pr52883.c +diff --git a/gcc/testsuite/gcc.target/i386/pr52883.c b/gcc/testsuite/gcc.target/i386/pr52883.c new file mode 100644 index 0000000..766e87e --- /dev/null -+++ b/src/gcc/testsuite/gcc.target/i386/pr52883.c ++++ b/gcc/testsuite/gcc.target/i386/pr52883.c @@ -0,0 +1,25 @@ +/* { dg-do compile } */ +/* { dg-options "-O" } */ @@ -3002,10 +3045,10 @@ index 0000000..766e87e + } else + i = g[c]; +} -diff --git a/src/gcc/testsuite/gcc.target/i386/pr54157.c b/src/gcc/testsuite/gcc.target/i386/pr54157.c +diff --git a/gcc/testsuite/gcc.target/i386/pr54157.c b/gcc/testsuite/gcc.target/i386/pr54157.c index 59fcd79..b5c4528 100644 ---- a/src/gcc/testsuite/gcc.target/i386/pr54157.c -+++ b/src/gcc/testsuite/gcc.target/i386/pr54157.c +--- a/gcc/testsuite/gcc.target/i386/pr54157.c ++++ b/gcc/testsuite/gcc.target/i386/pr54157.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { ! { ia32 } } } } */ -/* { dg-options "-O2 -mx32 -ftree-vectorize" } */ @@ -3013,10 +3056,10 @@ index 59fcd79..b5c4528 100644 struct s2{ int n[24 -1][24 -1][24 -1]; -diff --git a/src/gcc/testsuite/gcc.target/i386/pr55142-1.c b/src/gcc/testsuite/gcc.target/i386/pr55142-1.c +diff --git a/gcc/testsuite/gcc.target/i386/pr55142-1.c b/gcc/testsuite/gcc.target/i386/pr55142-1.c index 28375b5..e6b5f12 100644 ---- a/src/gcc/testsuite/gcc.target/i386/pr55142-1.c -+++ b/src/gcc/testsuite/gcc.target/i386/pr55142-1.c +--- a/gcc/testsuite/gcc.target/i386/pr55142-1.c ++++ b/gcc/testsuite/gcc.target/i386/pr55142-1.c @@ -1,6 +1,7 @@ /* { dg-do compile { target { ! { ia32 } } } } */ +/* { dg-require-effective-target maybe_x32 } */ @@ -3026,10 +3069,10 @@ index 28375b5..e6b5f12 100644 typedef int int32_t; typedef unsigned int uint32_t; -diff --git a/src/gcc/testsuite/gcc.target/i386/pr55142-2.c b/src/gcc/testsuite/gcc.target/i386/pr55142-2.c +diff --git a/gcc/testsuite/gcc.target/i386/pr55142-2.c b/gcc/testsuite/gcc.target/i386/pr55142-2.c index 9daae9d..34f4687 100644 ---- a/src/gcc/testsuite/gcc.target/i386/pr55142-2.c -+++ b/src/gcc/testsuite/gcc.target/i386/pr55142-2.c +--- a/gcc/testsuite/gcc.target/i386/pr55142-2.c ++++ b/gcc/testsuite/gcc.target/i386/pr55142-2.c @@ -1,6 +1,7 @@ /* { dg-do compile { target { ! { ia32 } } } } */ +/* { dg-require-effective-target maybe_x32 } */ @@ -3039,10 +3082,10 @@ index 9daae9d..34f4687 100644 /* { dg-final { scan-assembler-not "movl\[\\t \]*%.*,\[\\t \]*-1073742592\\(%r(.x|.i|.p|\[1-9\]*)\\)" } } */ typedef int int32_t; -diff --git a/src/gcc/testsuite/gcc.target/i386/pr55597.c b/src/gcc/testsuite/gcc.target/i386/pr55597.c +diff --git a/gcc/testsuite/gcc.target/i386/pr55597.c b/gcc/testsuite/gcc.target/i386/pr55597.c index cafe194..0ed7a3a 100644 ---- a/src/gcc/testsuite/gcc.target/i386/pr55597.c -+++ b/src/gcc/testsuite/gcc.target/i386/pr55597.c +--- a/gcc/testsuite/gcc.target/i386/pr55597.c ++++ b/gcc/testsuite/gcc.target/i386/pr55597.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { ! { ia32 } } } } */ /* { dg-require-effective-target fpic } */ @@ -3051,10 +3094,10 @@ index cafe194..0ed7a3a 100644 struct initial_sp { -diff --git a/src/gcc/testsuite/lib/target-supports.exp b/src/gcc/testsuite/lib/target-supports.exp +diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index d3898d6..16b2d59 100644 ---- a/src/gcc/testsuite/lib/target-supports.exp -+++ b/src/gcc/testsuite/lib/target-supports.exp +--- a/gcc/testsuite/lib/target-supports.exp ++++ b/gcc/testsuite/lib/target-supports.exp @@ -4458,6 +4458,14 @@ proc check_effective_target_lto { } { return [info exists ENABLE_LTO] } @@ -3070,11 +3113,11 @@ index d3898d6..16b2d59 100644 # Return 1 if this target supports the -fsplit-stack option, 0 # otherwise. -diff --git a/src/libffi/ChangeLog.x32 b/src/libffi/ChangeLog.x32 +diff --git a/libffi/ChangeLog.x32 b/libffi/ChangeLog.x32 new file mode 100644 index 0000000..2cbed64 --- /dev/null -+++ b/src/libffi/ChangeLog.x32 ++++ b/libffi/ChangeLog.x32 @@ -0,0 +1,27 @@ +2012-07-18 H.J. Lu <hongjiu.lu@intel.com> + @@ -3103,10 +3146,10 @@ index 0000000..2cbed64 +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -diff --git a/src/libffi/configure b/src/libffi/configure +diff --git a/libffi/configure b/libffi/configure index 1591495..28ed513 100755 ---- a/src/libffi/configure -+++ b/src/libffi/configure +--- a/libffi/configure ++++ b/libffi/configure @@ -6282,7 +6282,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; @@ -3141,10 +3184,10 @@ index 1591495..28ed513 100755 #include "confdefs.h" #if HAVE_DLFCN_H -diff --git a/src/libffi/src/x86/ffi64.c b/src/libffi/src/x86/ffi64.c +diff --git a/libffi/src/x86/ffi64.c b/libffi/src/x86/ffi64.c index bd907d7..41c4e77 100644 ---- a/src/libffi/src/x86/ffi64.c -+++ b/src/libffi/src/x86/ffi64.c +--- a/libffi/src/x86/ffi64.c ++++ b/libffi/src/x86/ffi64.c @@ -426,7 +426,7 @@ ffi_call (ffi_cif *cif, void (*fn)(void), void *rvalue, void **avalue) /* If the return value is passed in memory, add the pointer as the first integer argument. */ @@ -3177,10 +3220,10 @@ index bd907d7..41c4e77 100644 /* We don't have to do anything in asm for the return. */ ret = FFI_TYPE_VOID; } -diff --git a/src/libffi/src/x86/ffitarget.h b/src/libffi/src/x86/ffitarget.h +diff --git a/libffi/src/x86/ffitarget.h b/libffi/src/x86/ffitarget.h index dfecd1b..f9548c6 100644 ---- a/src/libffi/src/x86/ffitarget.h -+++ b/src/libffi/src/x86/ffitarget.h +--- a/libffi/src/x86/ffitarget.h ++++ b/libffi/src/x86/ffitarget.h @@ -53,9 +53,16 @@ typedef unsigned long long ffi_arg; typedef long long ffi_sarg; #endif @@ -3198,11 +3241,11 @@ index dfecd1b..f9548c6 100644 typedef enum ffi_abi { FFI_FIRST_ABI = 0, -diff --git a/src/libgcc/ChangeLog.x32 b/src/libgcc/ChangeLog.x32 +diff --git a/libgcc/ChangeLog.x32 b/libgcc/ChangeLog.x32 new file mode 100644 index 0000000..8b6d4a2 --- /dev/null -+++ b/src/libgcc/ChangeLog.x32 ++++ b/libgcc/ChangeLog.x32 @@ -0,0 +1,9 @@ +2012-03-29 H.J. Lu <hongjiu.lu@intel.com> + @@ -3213,10 +3256,10 @@ index 0000000..8b6d4a2 + + * unwind-dw2.c (_Unwind_SetGRValue): Assert DWARF register size + <= saved reg size. -diff --git a/src/libgcc/config/i386/linux-unwind.h b/src/libgcc/config/i386/linux-unwind.h +diff --git a/libgcc/config/i386/linux-unwind.h b/libgcc/config/i386/linux-unwind.h index cd9a9a1..02b1897 100644 ---- a/src/libgcc/config/i386/linux-unwind.h -+++ b/src/libgcc/config/i386/linux-unwind.h +--- a/libgcc/config/i386/linux-unwind.h ++++ b/libgcc/config/i386/linux-unwind.h @@ -29,11 +29,17 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #ifndef inhibit_libc @@ -3260,10 +3303,10 @@ index cd9a9a1..02b1897 100644 #endif /* ifdef __x86_64__ */ +#endif /* not glibc 2.0 */ #endif /* ifdef inhibit_libc */ -diff --git a/src/libgcc/unwind-dw2.c b/src/libgcc/unwind-dw2.c +diff --git a/libgcc/unwind-dw2.c b/libgcc/unwind-dw2.c index 475ad00..d1c62ee 100644 ---- a/src/libgcc/unwind-dw2.c -+++ b/src/libgcc/unwind-dw2.c +--- a/libgcc/unwind-dw2.c ++++ b/libgcc/unwind-dw2.c @@ -294,7 +294,8 @@ _Unwind_SetGRValue (struct _Unwind_Context *context, int index, { index = DWARF_REG_TO_UNWIND_COLUMN (index); @@ -3274,19 +3317,19 @@ index 475ad00..d1c62ee 100644 context->by_value[index] = 1; context->reg[index] = _Unwind_Get_Unwind_Context_Reg_Val (val); -diff --git a/src/libgfortran/ChangeLog.x32 b/src/libgfortran/ChangeLog.x32 +diff --git a/libgfortran/ChangeLog.x32 b/libgfortran/ChangeLog.x32 new file mode 100644 index 0000000..9a0c1eb --- /dev/null -+++ b/src/libgfortran/ChangeLog.x32 ++++ b/libgfortran/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -diff --git a/src/libgfortran/configure b/src/libgfortran/configure +diff --git a/libgfortran/configure b/libgfortran/configure index 227f556..bd8e10b 100755 ---- a/src/libgfortran/configure -+++ b/src/libgfortran/configure +--- a/libgfortran/configure ++++ b/libgfortran/configure @@ -8071,7 +8071,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; @@ -3321,11 +3364,11 @@ index 227f556..bd8e10b 100755 #include "confdefs.h" #if HAVE_DLFCN_H -diff --git a/src/libgomp/ChangeLog.x32 b/src/libgomp/ChangeLog.x32 +diff --git a/libgomp/ChangeLog.x32 b/libgomp/ChangeLog.x32 new file mode 100644 index 0000000..36444bb --- /dev/null -+++ b/src/libgomp/ChangeLog.x32 ++++ b/libgomp/ChangeLog.x32 @@ -0,0 +1,8 @@ +2012-03-31 H.J. Lu <hongjiu.lu@intel.com> + @@ -3335,10 +3378,10 @@ index 0000000..36444bb +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -diff --git a/src/libgomp/configure b/src/libgomp/configure +diff --git a/libgomp/configure b/libgomp/configure index 8ed841a..418c471 100755 ---- a/src/libgomp/configure -+++ b/src/libgomp/configure +--- a/libgomp/configure ++++ b/libgomp/configure @@ -6596,7 +6596,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; @@ -3373,10 +3416,10 @@ index 8ed841a..418c471 100755 #include "confdefs.h" #if HAVE_DLFCN_H -diff --git a/src/libgomp/configure.tgt b/src/libgomp/configure.tgt +diff --git a/libgomp/configure.tgt b/libgomp/configure.tgt index 210dd5d..853e3fa 100644 ---- a/src/libgomp/configure.tgt -+++ b/src/libgomp/configure.tgt +--- a/libgomp/configure.tgt ++++ b/libgomp/configure.tgt @@ -59,7 +59,7 @@ if test $enable_linux_futex = yes; then i[456]86-*-linux*) config_path="linux/x86 linux posix" @@ -3386,11 +3429,11 @@ index 210dd5d..853e3fa 100644 ;; *) if test -z "$with_arch"; then -diff --git a/src/libitm/ChangeLog.x32 b/src/libitm/ChangeLog.x32 +diff --git a/libitm/ChangeLog.x32 b/libitm/ChangeLog.x32 new file mode 100644 index 0000000..36444bb --- /dev/null -+++ b/src/libitm/ChangeLog.x32 ++++ b/libitm/ChangeLog.x32 @@ -0,0 +1,8 @@ +2012-03-31 H.J. Lu <hongjiu.lu@intel.com> + @@ -3400,10 +3443,10 @@ index 0000000..36444bb +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -diff --git a/src/libitm/configure b/src/libitm/configure +diff --git a/libitm/configure b/libitm/configure index 30d2f73..9f89ebc 100644 ---- a/src/libitm/configure -+++ b/src/libitm/configure +--- a/libitm/configure ++++ b/libitm/configure @@ -7286,7 +7286,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; @@ -3438,10 +3481,10 @@ index 30d2f73..9f89ebc 100644 #include "confdefs.h" #if HAVE_DLFCN_H -diff --git a/src/libitm/configure.tgt b/src/libitm/configure.tgt +diff --git a/libitm/configure.tgt b/libitm/configure.tgt index b68c86b..333bdff 100644 ---- a/src/libitm/configure.tgt -+++ b/src/libitm/configure.tgt +--- a/libitm/configure.tgt ++++ b/libitm/configure.tgt @@ -53,7 +53,7 @@ case "${target_cpu}" in i[3456]86) @@ -3451,11 +3494,11 @@ index b68c86b..333bdff 100644 ;; *) if test -z "$with_arch"; then -diff --git a/src/libjava/ChangeLog.x32 b/src/libjava/ChangeLog.x32 +diff --git a/libjava/ChangeLog.x32 b/libjava/ChangeLog.x32 new file mode 100644 index 0000000..43e8f70 --- /dev/null -+++ b/src/libjava/ChangeLog.x32 ++++ b/libjava/ChangeLog.x32 @@ -0,0 +1,12 @@ +2012-07-18 H.J. Lu <hongjiu.lu@intel.com> + @@ -3469,19 +3512,19 @@ index 0000000..43e8f70 +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -diff --git a/src/libjava/classpath/ChangeLog.x32 b/src/libjava/classpath/ChangeLog.x32 +diff --git a/libjava/classpath/ChangeLog.x32 b/libjava/classpath/ChangeLog.x32 new file mode 100644 index 0000000..9a0c1eb --- /dev/null -+++ b/src/libjava/classpath/ChangeLog.x32 ++++ b/libjava/classpath/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -diff --git a/src/libjava/classpath/configure b/src/libjava/classpath/configure +diff --git a/libjava/classpath/configure b/libjava/classpath/configure index a25f5f7..b6692b6 100755 ---- a/src/libjava/classpath/configure -+++ b/src/libjava/classpath/configure +--- a/libjava/classpath/configure ++++ b/libjava/classpath/configure @@ -7592,7 +7592,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; @@ -3552,10 +3595,10 @@ index a25f5f7..b6692b6 100755 public class Test { public static void main(String args) -diff --git a/src/libjava/configure b/src/libjava/configure +diff --git a/libjava/configure b/libjava/configure index d8a408d..be98354 100755 ---- a/src/libjava/configure -+++ b/src/libjava/configure +--- a/libjava/configure ++++ b/libjava/configure @@ -8843,7 +8843,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; @@ -3599,10 +3642,10 @@ index d8a408d..be98354 100755 struct S { ~S(); }; void bar(); void foo() -diff --git a/src/libjava/include/x86_64-signal.h b/src/libjava/include/x86_64-signal.h +diff --git a/libjava/include/x86_64-signal.h b/libjava/include/x86_64-signal.h index 4bd8a36..d03b914 100644 ---- a/src/libjava/include/x86_64-signal.h -+++ b/src/libjava/include/x86_64-signal.h +--- a/libjava/include/x86_64-signal.h ++++ b/libjava/include/x86_64-signal.h @@ -47,6 +47,10 @@ do \ \ bool _is_64_bit = false; \ @@ -3627,19 +3670,19 @@ index 4bd8a36..d03b914 100644 } \ \ if (_min_value_dividend) \ -diff --git a/src/libmudflap/ChangeLog.x32 b/src/libmudflap/ChangeLog.x32 +diff --git a/libmudflap/ChangeLog.x32 b/libmudflap/ChangeLog.x32 new file mode 100644 index 0000000..9a0c1eb --- /dev/null -+++ b/src/libmudflap/ChangeLog.x32 ++++ b/libmudflap/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -diff --git a/src/libmudflap/configure b/src/libmudflap/configure +diff --git a/libmudflap/configure b/libmudflap/configure index f1c74a1..1a76202 100755 ---- a/src/libmudflap/configure -+++ b/src/libmudflap/configure +--- a/libmudflap/configure ++++ b/libmudflap/configure @@ -6393,7 +6393,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; @@ -3674,19 +3717,19 @@ index f1c74a1..1a76202 100755 #include "confdefs.h" #if HAVE_DLFCN_H -diff --git a/src/libobjc/ChangeLog.x32 b/src/libobjc/ChangeLog.x32 +diff --git a/libobjc/ChangeLog.x32 b/libobjc/ChangeLog.x32 new file mode 100644 index 0000000..9a0c1eb --- /dev/null -+++ b/src/libobjc/ChangeLog.x32 ++++ b/libobjc/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -diff --git a/src/libobjc/configure b/src/libobjc/configure +diff --git a/libobjc/configure b/libobjc/configure index 8c07356..376f25e 100755 ---- a/src/libobjc/configure -+++ b/src/libobjc/configure +--- a/libobjc/configure ++++ b/libobjc/configure @@ -6079,7 +6079,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; @@ -3703,19 +3746,19 @@ index 8c07356..376f25e 100755 ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -diff --git a/src/libquadmath/ChangeLog.x32 b/src/libquadmath/ChangeLog.x32 +diff --git a/libquadmath/ChangeLog.x32 b/libquadmath/ChangeLog.x32 new file mode 100644 index 0000000..9a0c1eb --- /dev/null -+++ b/src/libquadmath/ChangeLog.x32 ++++ b/libquadmath/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -diff --git a/src/libquadmath/configure b/src/libquadmath/configure +diff --git a/libquadmath/configure b/libquadmath/configure index 82065c7..8beb1a6 100755 ---- a/src/libquadmath/configure -+++ b/src/libquadmath/configure +--- a/libquadmath/configure ++++ b/libquadmath/configure @@ -6264,7 +6264,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; @@ -3750,19 +3793,19 @@ index 82065c7..8beb1a6 100755 #include "confdefs.h" #if HAVE_DLFCN_H -diff --git a/src/libssp/ChangeLog.x32 b/src/libssp/ChangeLog.x32 +diff --git a/libssp/ChangeLog.x32 b/libssp/ChangeLog.x32 new file mode 100644 index 0000000..9a0c1eb --- /dev/null -+++ b/src/libssp/ChangeLog.x32 ++++ b/libssp/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -diff --git a/src/libssp/configure b/src/libssp/configure +diff --git a/libssp/configure b/libssp/configure index 78abc70..84b3712 100755 ---- a/src/libssp/configure -+++ b/src/libssp/configure +--- a/libssp/configure ++++ b/libssp/configure @@ -6401,7 +6401,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; @@ -3797,19 +3840,19 @@ index 78abc70..84b3712 100755 #include "confdefs.h" #if HAVE_DLFCN_H -diff --git a/src/libstdc++-v3/ChangeLog.x32 b/src/libstdc++-v3/ChangeLog.x32 +diff --git a/libstdc++-v3/ChangeLog.x32 b/libstdc++-v3/ChangeLog.x32 new file mode 100644 index 0000000..9a0c1eb --- /dev/null -+++ b/src/libstdc++-v3/ChangeLog.x32 ++++ b/libstdc++-v3/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -diff --git a/src/libstdc++-v3/configure b/src/libstdc++-v3/configure +diff --git a/libstdc++-v3/configure b/libstdc++-v3/configure index b642495..3e3e9ca 100755 ---- a/src/libstdc++-v3/configure -+++ b/src/libstdc++-v3/configure +--- a/libstdc++-v3/configure ++++ b/libstdc++-v3/configure @@ -7122,7 +7122,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; @@ -3916,10 +3959,10 @@ index b642495..3e3e9ca 100755 template<typename T1, typename T2> struct same { typedef T2 type; }; -diff --git a/src/libtool.m4 b/src/libtool.m4 +diff --git a/libtool.m4 b/libtool.m4 index 67321a7..a7f99ac 100644 ---- a/src/libtool.m4 -+++ b/src/libtool.m4 +--- a/libtool.m4 ++++ b/libtool.m4 @@ -1232,7 +1232,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; @@ -3936,19 +3979,19 @@ index 67321a7..a7f99ac 100644 ;; ppc64-*linux*|powerpc64-*linux*) LD="${LD-ld} -m elf32ppclinux" -diff --git a/src/lto-plugin/ChangeLog.x32 b/src/lto-plugin/ChangeLog.x32 +diff --git a/lto-plugin/ChangeLog.x32 b/lto-plugin/ChangeLog.x32 new file mode 100644 index 0000000..9a0c1eb --- /dev/null -+++ b/src/lto-plugin/ChangeLog.x32 ++++ b/lto-plugin/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -diff --git a/src/lto-plugin/configure b/src/lto-plugin/configure +diff --git a/lto-plugin/configure b/lto-plugin/configure index 7f1ade1..bd7e75e 100755 ---- a/src/lto-plugin/configure -+++ b/src/lto-plugin/configure +--- a/lto-plugin/configure ++++ b/lto-plugin/configure @@ -6060,7 +6060,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; @@ -3983,19 +4026,19 @@ index 7f1ade1..bd7e75e 100755 #include "confdefs.h" #if HAVE_DLFCN_H -diff --git a/src/zlib/ChangeLog.x32 b/src/zlib/ChangeLog.x32 +diff --git a/zlib/ChangeLog.x32 b/zlib/ChangeLog.x32 new file mode 100644 index 0000000..9a0c1eb --- /dev/null -+++ b/src/zlib/ChangeLog.x32 ++++ b/zlib/ChangeLog.x32 @@ -0,0 +1,3 @@ +2012-05-16 H.J. Lu <hongjiu.lu@intel.com> + + * configure: Regenerated. -diff --git a/src/zlib/configure b/src/zlib/configure +diff --git a/zlib/configure b/zlib/configure index f7fe2b7..478bef3 100755 ---- a/src/zlib/configure -+++ b/src/zlib/configure +--- a/zlib/configure ++++ b/zlib/configure @@ -5869,7 +5869,14 @@ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) LD="${LD-ld} -m elf_i386_fbsd" ;; diff --git a/debian/patches/svn-updates.diff b/debian/patches/svn-updates.diff index 58ca31b..3038ef2 100644 --- a/debian/patches/svn-updates.diff +++ b/debian/patches/svn-updates.diff @@ -1,10 +1,10 @@ -# DP: updates from the 4.7 branch upto 20131020 (r203880). +# DP: updates from the 4.7 branch upto 20140112 (r206563). last_updated() { cat > ${dir}LAST_UPDATED <<EOF -Sat Nov 9 12:32:35 CET 2013 -Sat Nov 9 11:32:35 UTC 2013 (revision 204613) +Sun Jan 12 10:47:48 CET 2014 +Sun Jan 12 09:47:48 UTC 2014 (revision 206563) EOF } @@ -9092,6 +9092,72 @@ Index: libstdc++-v3/acinclude.m4 AC_DEFUN([GLIBCXX_ENABLE_LIBSTDCXX_TIME], [ AC_MSG_CHECKING([for clock_gettime, nanosleep and sched_yield]) +Index: libiberty/ChangeLog +=================================================================== +--- a/src/libiberty/ChangeLog (.../tags/gcc_4_7_3_release) ++++ b/src/libiberty/ChangeLog (.../branches/gcc-4_7-branch) +@@ -1,3 +1,11 @@ ++2013-11-15 Joseph Myers <joseph@codesourcery.com> ++ ++ Backport from mainline: ++ 2012-06-29 Andreas Schwab <schwab@linux-m68k.org> ++ ++ * copying-lib.texi (Library Copying): Don't use @heading inside ++ @enumerate. ++ + 2013-04-11 Release Manager + + * GCC 4.7.3 released. +Index: libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c +=================================================================== +--- a/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c (.../tags/gcc_4_7_3_release) ++++ b/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c (.../branches/gcc-4_7-branch) +@@ -39,10 +39,11 @@ + #include <pango/pango.h> + #include <pango/pangoft2.h> + #include <pango/pangofc-font.h> +-#include <freetype/ftglyph.h> +-#include <freetype/ftoutln.h> +-#include <freetype/fttypes.h> +-#include <freetype/tttables.h> ++#include <ft2build.h> ++#include FT_GLYPH_H ++#include FT_OUTLINE_H ++#include FT_TYPES_H ++#include FT_TRUETYPE_TABLES_H + #include "gdkfont.h" + #include "gtkpeer.h" + #include "gnu_java_awt_peer_gtk_GdkFontPeer.h" +Index: libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c +=================================================================== +--- a/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c (.../tags/gcc_4_7_3_release) ++++ b/src/libjava/classpath/native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c (.../branches/gcc-4_7-branch) +@@ -42,8 +42,9 @@ + #include <pango/pango.h> + #include <pango/pangoft2.h> + #include <pango/pangofc-font.h> +-#include <freetype/ftglyph.h> +-#include <freetype/ftoutln.h> ++#include <ft2build.h> ++#include FT_GLYPH_H ++#include FT_OUTLINE_H + #include "jcl.h" + #include "gdkfont.h" + #include "gnu_java_awt_peer_gtk_FreetypeGlyphVector.h" +Index: libjava/classpath/ChangeLog.gcj +=================================================================== +--- a/src/libjava/classpath/ChangeLog.gcj (.../tags/gcc_4_7_3_release) ++++ b/src/libjava/classpath/ChangeLog.gcj (.../branches/gcc-4_7-branch) +@@ -1,3 +1,9 @@ ++2013-11-29 Matthias Klose <doko@ubuntu.com> ++ ++ * native/jni/gtk-peer/gnu_java_awt_peer_gtk_FreetypeGlyphVector.c, ++ native/jni/gtk-peer/gnu_java_awt_peer_gtk_GdkFontPeer.c: ++ Fix freetype includes. ++ + 2013-02-21 Jakub Jelinek <jakub@redhat.com> + + PR bootstrap/56258 Index: libgcc/config.host =================================================================== --- a/src/libgcc/config.host (.../tags/gcc_4_7_3_release) @@ -9123,7 +9189,22 @@ Index: libgcc/ChangeLog =================================================================== --- a/src/libgcc/ChangeLog (.../tags/gcc_4_7_3_release) +++ b/src/libgcc/ChangeLog (.../branches/gcc-4_7-branch) -@@ -1,3 +1,45 @@ +@@ -1,3 +1,60 @@ ++2014-01-03 Joseph Myers <joseph@codesourcery.com> ++ ++ * config/rs6000/ibm-ldouble.c (__gcc_qdiv): Scale up arguments in ++ case of small numerator and finite nonzero result. ++ ++2013-11-10 Kai Tietz <ktietz@redhat.com> ++ ++ Back-merged from trunk ++ * config/i386/cygming-crtbegin.c (__gcc_register_frame): ++ Increment load-count on use of LIBGCC_SONAME DLL. ++ (hmod_libgcc): New static variable to hold handle of ++ LIBGCC_SONAME DLL. ++ (__gcc_deregister_frame): Decrement load-count of ++ LIBGCC_SONAME DLL. ++ +2013-11-07 Uros Bizjak <ubizjak@gmail.com> + + * config/i386/32/sfp-machine.c (FP_HANDLE_EXCEPTIONS): Handle @@ -9169,7 +9250,7 @@ Index: libgcc/ChangeLog 2013-04-11 Release Manager * GCC 4.7.3 released. -@@ -14,7 +56,8 @@ +@@ -14,7 +71,8 @@ PR target/49880 * config/sh/lib1funcs.S (sdivsi3_i4, udivsi3_i4): Enable for SH2A. @@ -9242,6 +9323,52 @@ Index: libgcc/config/i386/32/sfp-machine.h if (_fex & FP_EX_DIVZERO) \ { \ float f = 1.0, g = 0.0; \ +Index: libgcc/config/i386/cygming-crtbegin.c +=================================================================== +--- a/src/libgcc/config/i386/cygming-crtbegin.c (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config/i386/cygming-crtbegin.c (.../branches/gcc-4_7-branch) +@@ -1,5 +1,5 @@ + /* crtbegin object for windows32 targets. +- Copyright (C) 2007, 2009, 2010, 2011 Free Software Foundation, Inc. ++ Copyright (C) 2007, 2009-2011, 2013 Free Software Foundation, Inc. + + Contributed by Danny Smith <dannysmith@users.sourceforge.net> + +@@ -69,6 +69,9 @@ + = { }; + + static struct object obj; ++ ++/* Handle of libgcc's DLL reference. */ ++HANDLE hmod_libgcc; + #endif + + #if TARGET_USE_JCR_SECTION +@@ -93,9 +96,14 @@ + + void (*register_frame_fn) (const void *, struct object *); + HANDLE h = GetModuleHandle (LIBGCC_SONAME); ++ + if (h) +- register_frame_fn = (void (*) (const void *, struct object *)) +- GetProcAddress (h, "__register_frame_info"); ++ { ++ /* Increasing the load-count of LIBGCC_SONAME DLL. */ ++ hmod_libgcc = LoadLibrary (LIBGCC_SONAME); ++ register_frame_fn = (void (*) (const void *, struct object *)) ++ GetProcAddress (h, "__register_frame_info"); ++ } + else + register_frame_fn = __register_frame_info; + if (register_frame_fn) +@@ -132,5 +140,7 @@ + deregister_frame_fn = __deregister_frame_info; + if (deregister_frame_fn) + deregister_frame_fn (__EH_FRAME_BEGIN__); ++ if (hmod_libgcc) ++ FreeLibrary (hmod_libgcc); + #endif + } Index: libgcc/config/i386/64/sfp-machine.h =================================================================== --- a/src/libgcc/config/i386/64/sfp-machine.h (.../tags/gcc_4_7_3_release) @@ -9261,6 +9388,28 @@ Index: libgcc/config/i386/64/sfp-machine.h if (_fex & FP_EX_DIVZERO) \ { \ float f = 1.0, g = 0.0; \ +Index: libgcc/config/rs6000/ibm-ldouble.c +=================================================================== +--- a/src/libgcc/config/rs6000/ibm-ldouble.c (.../tags/gcc_4_7_3_release) ++++ b/src/libgcc/config/rs6000/ibm-ldouble.c (.../branches/gcc-4_7-branch) +@@ -189,7 +189,16 @@ + || nonfinite (t)) + return t; + +- /* Finite nonzero result requires corrections to the highest order term. */ ++ /* Finite nonzero result requires corrections to the highest order ++ term. These corrections require the low part of c * t to be ++ exactly represented in double. */ ++ if (fabs (a) <= 0x1p-969) ++ { ++ a *= 0x1p106; ++ b *= 0x1p106; ++ c *= 0x1p106; ++ d *= 0x1p106; ++ } + + s = c * t; /* (s,sigma) = c*t exactly. */ + w = -(-b + d * t); /* Written to get fnmsub for speed, but not Index: libgcc/config/tilepro/atomic.h =================================================================== --- a/src/libgcc/config/tilepro/atomic.h (.../tags/gcc_4_7_3_release) @@ -9650,7 +9799,7 @@ Index: gcc/DATESTAMP +++ b/src/gcc/DATESTAMP (.../branches/gcc-4_7-branch) @@ -1 +1 @@ -20130411 -+20131109 ++20140112 Index: gcc/tree-tailcall.c =================================================================== --- a/src/gcc/tree-tailcall.c (.../tags/gcc_4_7_3_release) @@ -9679,6 +9828,32 @@ Index: gcc/tree-tailcall.c *a = fold_build1 (NEGATE_EXPR, TREE_TYPE (non_ass_var), non_ass_var); } +Index: gcc/configure +=================================================================== +--- a/src/gcc/configure (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/configure (.../branches/gcc-4_7-branch) +@@ -27309,8 +27309,8 @@ + $as_echo_n "checking for exported symbols... " >&6; } + if test "x$export_sym_check" != x; then + echo "int main() {return 0;} int foobar() {return 0;}" > conftest.c +- ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest > /dev/null 2>&1 +- if $export_sym_check conftest | grep foobar > /dev/null; then ++ ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest$ac_exeext > /dev/null 2>&1 ++ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then + : # No need to use a flag + { $as_echo "$as_me:${as_lineno-$LINENO}: result: yes" >&5 + $as_echo "yes" >&6; } +@@ -27319,8 +27319,8 @@ + $as_echo "yes" >&6; } + { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -rdynamic" >&5 + $as_echo_n "checking for -rdynamic... " >&6; } +- ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest > /dev/null 2>&1 +- if $export_sym_check conftest | grep foobar > /dev/null; then ++ ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest$ac_exeext > /dev/null 2>&1 ++ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then + plugin_rdynamic=yes + pluginlibs="-rdynamic" + else Index: gcc/builtins.c =================================================================== --- a/src/gcc/builtins.c (.../tags/gcc_4_7_3_release) @@ -9851,7 +10026,113 @@ Index: gcc/ChangeLog =================================================================== --- a/src/gcc/ChangeLog (.../tags/gcc_4_7_3_release) +++ b/src/gcc/ChangeLog (.../branches/gcc-4_7-branch) -@@ -1,3 +1,512 @@ +@@ -1,3 +1,618 @@ ++2014-01-10 Richard Earnshaw <rearnsha@arm.com> ++ ++ PR rtl-optimization/54300 ++ * regcprop.c (copyprop_hardreg_forward_1): Ensure any unused ++ outputs in a single-set are killed from the value chains. ++ ++2014-01-10 Huacai Chen <chenhc@lemote.com> ++ ++ * config/mips/driver-native.c (host_detect_local_cpu): Handle new ++ kernel strings for Loongson-2E/2F/3A. ++ ++2014-01-08 Uros Bizjak <ubizjak@gmail.com> ++ ++ Backport from mainline ++ 2014-01-05 Uros Bizjak <ubizjak@gmail.com> ++ ++ * config/i386/i386.c (ix86_data_alignment): Calculate max_align ++ from prefetch_block tune setting. ++ (nocona_cost): Correct size of prefetch block to 64. ++ ++2013-12-28 Eric Botcazou <ebotcazou@adacore.com> ++ ++ * doc/invoke.texi (output file options): Add missing markers. ++ ++2013-12-11 Kai Tietz <ktietz@redhat.com> ++ ++ PR target/56807 ++ * config/i386/i386.c (ix86_expand_prologue): plus_constant ++ takes no mode-argument. ++ ++2013-12-10 Kai Tietz <ktietz@redhat.com> ++ ++ PR target/56807 ++ * config/i386/i386.c (ix86_expand_prologue): Address saved ++ registers stack-relative, not via frame-pointer. ++ ++2013-12-03 Marek Polacek <polacek@redhat.com> ++ ++ Backport from mainline ++ 2013-12-03 Marek Polacek <polacek@redhat.com> ++ ++ PR c/59351 ++ * c-decl.c (build_compound_literal): Allow compound literals with ++ empty initial value. ++ ++2013-12-01 Eric Botcazou <ebotcazou@adacore.com> ++ ++ * config/i386/winnt.c (i386_pe_asm_named_section): Be prepared for an ++ identifier node. ++ ++2013-11-28 Uros Bizjak <ubizjak@gmail.com> ++ ++ Backport from mainline ++ 2013-11-23 Uros Bizjak <ubizjak@gmail.com> ++ ++ PR target/56788 ++ * config/i386/i386.c (bdesc_multi_arg) <IX86_BUILTIN_VFRCZSS>: ++ Declare as MULTI_ARG_1_SF instruction. ++ <IX86_BUILTIN_VFRCZSD>: Decleare as MULTI_ARG_1_DF instruction. ++ * config/i386/sse.md (*xop_vmfrcz<mode>2): Rename ++ from *xop_vmfrcz_<mode>. ++ * config/i386/xopintrin.h (_mm_frcz_ss): Use __builtin_ia32_movss ++ to merge scalar result with __A. ++ (_mm_frcz_sd): Use __builtin_ia32_movsd to merge scalar ++ result with __A. ++ ++2013-11-19 Uros Bizjak <ubizjak@gmail.com> ++ ++ Backport from mainline ++ 2013-11-18 Uros Bizjak <ubizjak@gmail.com> ++ ++ * config/i386/i386.c (ix86_decompose_address): Use REG_P instead of ++ ix86_address_subreg_operand. Move subreg checks to ++ ix86_validate_address_register. Move address override check to ++ ix86_legitimate_address_p. ++ (ix86_validate_address_register): New function. ++ (ix86_legitimate_address_p): Call ix86_validate_address_register ++ to validate base and index registers. Add address override check ++ from ix86_decompose_address. ++ (ix86_decompose_address): Remove. ++ ++ Backport from mainline ++ 2013-11-17 Uros Bizjak <ubizjak@gmail.com> ++ ++ PR target/59153 ++ * config/i386/i386.c (ix86_address_subreg_operand): Do not ++ reject non-integer subregs. ++ (ix86_decompose_address): Do not reject invalid CONST_INT RTXes. ++ Move check for invalid x32 constant addresses ... ++ (ix86_legitimate_address_p): ... here. ++ ++ Bacport from mainline ++ 2012-03-13 Uros Bizjak <ubizjak@gmail.com> ++ ++ * config/i386/i386.c (ix86_decompose_address): Prevent %fs:(%reg) ++ addresses only when %reg is not in word mode. ++ ++2013-11-10 Karlson2k <k2k@narod.ru> ++ Kai Tietz <ktietz@redhat.com> ++ ++ Merged from trunk ++ PR plugins/52872 ++ * configure.ac: Adding for exported symbols check ++ and for rdynamic-check executable-extension. ++ * configure: Regenerated. ++ +2013-11-07 H.J. Lu <hongjiu.lu@intel.com> + + PR target/59034 @@ -10364,6 +10645,72 @@ Index: gcc/ChangeLog 2013-04-11 Release Manager * GCC 4.7.3 released. +Index: gcc/testsuite/gcc.target/arm/pr54300.C +=================================================================== +--- a/src/gcc/testsuite/gcc.target/arm/pr54300.C (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/arm/pr54300.C (.../branches/gcc-4_7-branch) +@@ -0,0 +1,61 @@ ++/* { dg-do run } */ ++/* { dg-require-effective-target arm_neon } */ ++/* { dg-options "-O2" } */ ++/* { dg-add-options arm_neon } */ ++ ++#include <arm_neon.h> ++#include <stdlib.h> ++ ++struct __attribute__ ((aligned(8))) _v16u8_ { ++ uint8x16_t val; ++ _v16u8_( const int16x8_t &src) { val = vreinterpretq_u8_s16(src); } ++ operator int16x8_t () const { return vreinterpretq_s16_u8(val); } ++}; ++typedef struct _v16u8_ v16u8; ++ ++struct __attribute__ ((aligned(4))) _v8u8_ { ++ uint8x8_t val; ++ _v8u8_( const uint8x8_t &src) { val = src; } ++ operator int16x4_t () const { return vreinterpret_s16_u8(val); } ++}; ++typedef struct _v8u8_ v8u8; ++ ++typedef v16u8 v8i16; ++typedef int32x4_t v4i32; ++typedef const short cv1i16; ++typedef const unsigned char cv1u8; ++typedef const v8i16 cv8i16; ++ ++static inline __attribute__((always_inline)) v8u8 zero_64(){ return vdup_n_u8( 0 ); } ++ ++static inline __attribute__((always_inline)) v8i16 loadlo_8i16( cv8i16* p ){ ++ return vcombine_s16( vld1_s16( (cv1i16 *)p ), zero_64() ); ++} ++static inline __attribute__((always_inline)) v8i16 _loadlo_8i16( cv8i16* p, int offset ){ ++ return loadlo_8i16( (cv8i16*)(&((cv1u8*)p)[offset]) ); ++} ++ ++void __attribute__((noinline)) ++test(unsigned short *_Inp, int32_t *_Out, ++ unsigned int s1v, unsigned int dv0, ++ unsigned int smask_v) ++{ ++ int32x4_t c = vdupq_n_s32(0); ++ ++ for(unsigned int sv=0 ; sv!=dv0 ; sv=(sv+s1v)&smask_v ) ++ { ++ int32x4_t s; ++ s = vmovl_s16( vget_low_s16( _loadlo_8i16( (cv8i16*) _Inp, sv ) ) ); ++ c = vaddq_s32( c, s ); ++ } ++ vst1q_s32( _Out, c ); ++} ++ ++main() ++{ ++ unsigned short a[4] = {1, 2, 3, 4}; ++ int32_t b[4] = {0, 0, 0, 0}; ++ test(a, b, 1, 1, ~0); ++ if (b[0] != 1 || b[1] != 2 || b[2] != 3 || b[3] != 4) ++ abort(); ++} Index: gcc/testsuite/gcc.target/powerpc/pr57150.c =================================================================== --- a/src/gcc/testsuite/gcc.target/powerpc/pr57150.c (.../tags/gcc_4_7_3_release) @@ -10392,6 +10739,45 @@ Index: gcc/testsuite/gcc.target/powerpc/pr57150.c + for (i = 0; i < n; i++) + ptr[i] += modify (value); +} +Index: gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/powerpc/rs6000-ldouble-3.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,21 @@ ++/* Test accuracy of long double division (glibc bug 15396). */ ++/* { dg-do run { target powerpc*-*-linux* powerpc*-*-darwin* powerpc*-*-aix* rs6000-*-* } } */ ++/* { dg-options "-mlong-double-128" } */ ++ ++extern void exit (int); ++extern void abort (void); ++ ++volatile long double a = 0x1p-1024L; ++volatile long double b = 0x3p-53L; ++volatile long double r; ++volatile long double expected = 0x1.55555555555555555555555555p-973L; ++ ++int ++main (void) ++{ ++ r = a / b; ++ /* Allow error up to 2ulp. */ ++ if (__builtin_fabsl (r - expected) > 0x1p-1073L) ++ abort (); ++ exit (0); ++} +Index: gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-2.c (.../branches/gcc-4_7-branch) +@@ -15,7 +15,7 @@ + avx_test (void) + { + union256d u; +- double e [4] __attribute__ ((aligned (8))) = {0.0}; ++ double e [4] __attribute__ ((aligned (32))) = {0.0}; + + u.x = _mm256_set_pd (39578.467285, 7856.342941, 85632.783567, 47563.234215); + Index: gcc/testsuite/gcc.target/i386/pr57264.c =================================================================== --- a/src/gcc/testsuite/gcc.target/i386/pr57264.c (.../tags/gcc_4_7_3_release) @@ -10451,6 +10837,19 @@ Index: gcc/testsuite/gcc.target/i386/pr44578.c + + return 0; +} +Index: gcc/testsuite/gcc.target/i386/sse2-movapd-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/sse2-movapd-1.c (.../branches/gcc-4_7-branch) +@@ -25,7 +25,7 @@ + TEST (void) + { + union128d u; +- double e[2] __attribute__ ((aligned (8))) = {2134.3343,1234.635654}; ++ double e[2] __attribute__ ((aligned (16))) = {2134.3343,1234.635654}; + + u.x = test (e); + Index: gcc/testsuite/gcc.target/i386/pr56866.c =================================================================== --- a/src/gcc/testsuite/gcc.target/i386/pr56866.c (.../tags/gcc_4_7_3_release) @@ -10472,6 +10871,71 @@ Index: gcc/testsuite/gcc.target/i386/pr56866.c +{ + xop_test_main (); +} +Index: gcc/testsuite/gcc.target/i386/xop-frczX.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/xop-frczX.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/xop-frczX.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,60 @@ ++/* { dg-do run } */ ++/* { dg-require-effective-target xop } */ ++/* { dg-options "-O2 -mxop" } */ ++ ++#include "xop-check.h" ++ ++#include <x86intrin.h> ++ ++void ++check_mm_vmfrcz_sd (__m128d __A, __m128d __B) ++{ ++ union128d a, b, c; ++ double d[2]; ++ ++ a.x = __A; ++ b.x = __B; ++ c.x = _mm_frcz_sd (__A, __B); ++ d[0] = b.a[0] - (int)b.a[0] ; ++ d[1] = a.a[1]; ++ if (check_union128d (c, d)) ++ abort (); ++} ++ ++void ++check_mm_vmfrcz_ss (__m128 __A, __m128 __B) ++{ ++ union128 a, b, c; ++ float f[4]; ++ ++ a.x = __A; ++ b.x = __B; ++ c.x = _mm_frcz_ss (__A, __B); ++ f[0] = b.a[0] - (int)b.a[0] ; ++ f[1] = a.a[1]; ++ f[2] = a.a[2]; ++ f[3] = a.a[3]; ++ if (check_union128 (c, f)) ++ abort (); ++} ++ ++static void ++xop_test (void) ++{ ++ union128 a, b; ++ union128d c,d; ++ int i; ++ ++ for (i = 0; i < 4; i++) ++ { ++ a.a[i] = i + 3.5; ++ b.a[i] = i + 7.9; ++ } ++ for (i = 0; i < 2; i++) ++ { ++ c.a[i] = i + 3.5; ++ d.a[i] = i + 7.987654321; ++ } ++ check_mm_vmfrcz_ss (a.x, b.x); ++ check_mm_vmfrcz_sd (c.x, d.x); ++} Index: gcc/testsuite/gcc.target/i386/pr57098.c =================================================================== --- a/src/gcc/testsuite/gcc.target/i386/pr57098.c (.../tags/gcc_4_7_3_release) @@ -10487,6 +10951,19 @@ Index: gcc/testsuite/gcc.target/i386/pr57098.c +{ + *p = __builtin_shuffle (*p, *mask); +} +Index: gcc/testsuite/gcc.target/i386/sse2-movapd-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/sse2-movapd-2.c (.../branches/gcc-4_7-branch) +@@ -25,7 +25,7 @@ + TEST (void) + { + union128d u; +- double e[2] __attribute__ ((aligned (8))) = {0.0}; ++ double e[2] __attribute__ ((aligned (16))) = {0.0}; + + u.x = _mm_set_pd (2134.3343,1234.635654); + Index: gcc/testsuite/gcc.target/i386/pr30315.c =================================================================== --- a/src/gcc/testsuite/gcc.target/i386/pr30315.c (.../tags/gcc_4_7_3_release) @@ -10570,6 +11047,19 @@ Index: gcc/testsuite/gcc.target/i386/pr57655.c +{ + return __builtin_ilogbl (x); +} +Index: gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.target/i386/avx-vmovapd-256-1.c (.../branches/gcc-4_7-branch) +@@ -15,7 +15,7 @@ + avx_test (void) + { + union256d u; +- double e [4] __attribute__ ((aligned (8))) = {41124.234,2344.2354,8653.65635,856.43576}; ++ double e [4] __attribute__ ((aligned (32))) = {41124.234,2344.2354,8653.65635,856.43576}; + + u.x = test (e); + Index: gcc/testsuite/gcc.target/sh/pr57108.c =================================================================== --- a/src/gcc/testsuite/gcc.target/sh/pr57108.c (.../tags/gcc_4_7_3_release) @@ -10659,6 +11149,38 @@ Index: gcc/testsuite/gfortran.dg/transfer_check_4.f90 + real(r8_),intent(out) :: val + val = transfer(byte_array(1:8),val) +end subroutine +Index: gcc/testsuite/gfortran.dg/derived_external_function_1.f90 +=================================================================== +--- a/src/gcc/testsuite/gfortran.dg/derived_external_function_1.f90 (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gfortran.dg/derived_external_function_1.f90 (.../branches/gcc-4_7-branch) +@@ -0,0 +1,27 @@ ++! { dg-do run } ++! ++! PR fortran/58771 ++! ++! Contributed by Vittorio Secca <zeccav@gmail.com> ++! ++! ICEd on the write statement with f() because the derived type backend ++! declaration not built. ++! ++module m ++ type t ++ integer(4) g ++ end type ++end ++ ++type(t) function f() result(ff) ++ use m ++ ff%g = 42 ++end ++ ++ use m ++ character (20) :: line1, line2 ++ type(t) f ++ write (line1, *) f() ++ write (line2, *) 42_4 ++ if (line1 .ne. line2) call abort ++end Index: gcc/testsuite/gfortran.dg/namelist_77.f90 =================================================================== --- a/src/gcc/testsuite/gfortran.dg/namelist_77.f90 (.../tags/gcc_4_7_3_release) @@ -11424,6 +11946,19 @@ Index: gcc/testsuite/gcc.dg/pr56890-2.c + } + return number; +} +Index: gcc/testsuite/gcc.dg/20050922-1.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/20050922-1.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/20050922-1.c (.../branches/gcc-4_7-branch) +@@ -4,7 +4,7 @@ + /* { dg-do run } */ + /* { dg-options "-O1 -std=c99" } */ + +-#include <stdlib.h> ++extern void abort (void); + + #if __INT_MAX__ == 2147483647 + typedef unsigned int uint32_t; Index: gcc/testsuite/gcc.dg/atomic-store-6.c =================================================================== --- a/src/gcc/testsuite/gcc.dg/atomic-store-6.c (.../tags/gcc_4_7_3_release) @@ -11442,6 +11977,19 @@ Index: gcc/testsuite/gcc.dg/atomic-store-6.c + __builtin_abort(); + return 0; +} +Index: gcc/testsuite/gcc.dg/pr59351.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/pr59351.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/pr59351.c (.../branches/gcc-4_7-branch) +@@ -0,0 +1,8 @@ ++/* { dg-do compile } */ ++/* { dg-options "-std=c99 -pedantic" } */ ++ ++unsigned int ++foo (void) ++{ ++ return sizeof ((int[]) {}); /* { dg-warning "ISO C forbids empty initializer braces" } */ ++} Index: gcc/testsuite/gcc.dg/pr48189.c =================================================================== --- a/src/gcc/testsuite/gcc.dg/pr48189.c (.../tags/gcc_4_7_3_release) @@ -11460,6 +12008,20 @@ Index: gcc/testsuite/gcc.dg/pr48189.c + for (i = 0; y[i].s[i]; i++) + *x++ = y[i].s[i]; +} +Index: gcc/testsuite/gcc.dg/20050922-2.c +=================================================================== +--- a/src/gcc/testsuite/gcc.dg/20050922-2.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/testsuite/gcc.dg/20050922-2.c (.../branches/gcc-4_7-branch) +@@ -4,7 +4,8 @@ + /* { dg-do run } */ + /* { dg-options "-O1 -std=c99" } */ + +-#include <stdlib.h> ++extern void abort (void); ++extern void exit (int); + + #if __INT_MAX__ == 2147483647 + typedef unsigned int uint32_t; Index: gcc/testsuite/gcc.dg/pr57980.c =================================================================== --- a/src/gcc/testsuite/gcc.dg/pr57980.c (.../tags/gcc_4_7_3_release) @@ -11599,7 +12161,62 @@ Index: gcc/testsuite/ChangeLog =================================================================== --- a/src/gcc/testsuite/ChangeLog (.../tags/gcc_4_7_3_release) +++ b/src/gcc/testsuite/ChangeLog (.../branches/gcc-4_7-branch) -@@ -1,3 +1,265 @@ +@@ -1,3 +1,320 @@ ++2014-01-10 Richard Earnshaw <rearnsha@arm.com> ++ ++ PR rtl-optimization/54300 ++ * gcc.target/arm/pr54300.C: New test. ++ ++2014-01-03 Joseph Myers <joseph@codesourcery.com> ++ ++ * gcc.target/powerpc/rs6000-ldouble-3.c: New test. ++ ++2013-12-12 Uros Bizjak <ubizjak@gmail.com> ++ ++ Backport from mainline ++ 2013-12-12 Ryan Mansfield <rmansfield@qnx.com> ++ ++ PR testsuite/59442 ++ * gcc.target/i386/sse2-movapd-1.c: Fix alignment attributes. ++ * gcc.target/i386/sse2-movapd-2.c: Likewise. ++ * gcc.target/i386/avx-vmovapd-256-1.c: Likewise. ++ * gcc.target/i386/avx-vmovapd-256-2.c: Likewise. ++ ++2013-12-04 Marek Polacek <polacek@redhat.com> ++ ++ PR c/59351 ++ * gcc.dg/pr59351.c: Use -pedantic instead of -Wpedantic. ++ ++2013-12-03 Marek Polacek <polacek@redhat.com> ++ ++ Backport from mainline ++ 2013-12-03 Marek Polacek <polacek@redhat.com> ++ ++ PR c/59351 ++ * gcc.dg/pr59351.c: New test. ++ ++2013-11-28 Uros Bizjak <ubizjak@gmail.com> ++ ++ Backport from mainline ++ 2013-11-27 Uros Bizjak <ubizjak@gmail.com> ++ Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com> ++ ++ PR target/56788 ++ * gcc.target/i386/xop-frczX.c: New test. ++ ++2013-11-25 Vidya Praveen <vidyapraveen@arm.com> ++ ++ Backport from mainline ++ 2013-10-21 Vidya Praveen <vidyapraveen@arm.com> ++ ++ * gcc.dg/20050922-1.c: Remove stdlib.h and declare abort(). ++ * gcc.dg/20050922-1.c: Remove stdlib.h and declare abort() and exit(). ++ ++2013-11-17 Paul Thomas <pault@gcc.gnu.org> ++ ++ PR fortran/58771 ++ * gfortran.dg/derived_external_function_1.f90 : New test ++ +2013-11-02 Janus Weil <janus@gcc.gnu.org> + + Backport from mainline @@ -11865,7 +12482,7 @@ Index: gcc/testsuite/ChangeLog 2013-04-11 Release Manager * GCC 4.7.3 released. -@@ -54,7 +316,7 @@ +@@ -54,7 +371,7 @@ Backport from mainline 2013-02-27 Andrey Belevantsev <abel@ispras.ru> @@ -13519,7 +14136,11 @@ Index: gcc/ada/ChangeLog =================================================================== --- a/src/gcc/ada/ChangeLog (.../tags/gcc_4_7_3_release) +++ b/src/gcc/ada/ChangeLog (.../branches/gcc-4_7-branch) -@@ -1,3 +1,23 @@ +@@ -1,3 +1,27 @@ ++2013-12-12 Eric Botcazou <ebotcazou@adacore.com> ++ ++ * gcc-interface/Make-lang.in (ada/doctools/xgnatugn): Use gnatmake. ++ +2013-10-19 Eric Botcazou <ebotcazou@adacore.com> + + * gcc-interface/utils.c (gnat_set_type_context): New function. @@ -13597,6 +14218,19 @@ Index: gcc/ada/gcc-interface/utils.c } } } +Index: gcc/ada/gcc-interface/Make-lang.in +=================================================================== +--- a/src/gcc/ada/gcc-interface/Make-lang.in (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/ada/gcc-interface/Make-lang.in (.../branches/gcc-4_7-branch) +@@ -660,7 +660,7 @@ + ada/doctools/xgnatugn$(build_exeext): ada/xgnatugn.adb + -$(MKDIR) ada/doctools + $(CP) $^ ada/doctools +- cd ada/doctools && $(GNATMAKE) -q xgnatugn ++ cd ada/doctools && gnatmake -q xgnatugn + + # Note that doc/gnat_ugn.texi and doc/projects.texi do not depend on + # xgnatugn being built so we can distribute a pregenerated doc/gnat_ugn.info Index: gcc/ada/gcc-interface/trans.c =================================================================== --- a/src/gcc/ada/gcc-interface/trans.c (.../tags/gcc_4_7_3_release) @@ -13645,6 +14279,21 @@ Index: gcc/ada/gcc-interface/trans.c add_stmt (gnu_result); add_stmt (build1 (LABEL_EXPR, void_type_node, VEC_last (tree, gnu_return_label_stack))); +Index: gcc/c-decl.c +=================================================================== +--- a/src/gcc/c-decl.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/c-decl.c (.../branches/gcc-4_7-branch) +@@ -4618,7 +4618,9 @@ + { + int failure = complete_array_type (&TREE_TYPE (decl), + DECL_INITIAL (decl), true); +- gcc_assert (!failure); ++ /* If complete_array_type returns 3, it means that the ++ initial value of the compound literal is empty. Allow it. */ ++ gcc_assert (failure == 0 || failure == 3); + + type = TREE_TYPE (decl); + TREE_TYPE (DECL_INITIAL (decl)) = type; Index: gcc/fortran/interface.c =================================================================== --- a/src/gcc/fortran/interface.c (.../tags/gcc_4_7_3_release) @@ -13690,11 +14339,42 @@ Index: gcc/fortran/decl.c if (extended->attr.flavor != FL_DERIVED) { gfc_error ("'%s' in EXTENDS expression at %C is not a " +Index: gcc/fortran/dump-parse-tree.c +=================================================================== +--- a/src/gcc/fortran/dump-parse-tree.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/dump-parse-tree.c (.../branches/gcc-4_7-branch) +@@ -104,7 +104,8 @@ + break; + + case BT_CHARACTER: +- show_expr (ts->u.cl->length); ++ if (ts->u.cl) ++ show_expr (ts->u.cl->length); + fprintf(dumpfile, " %d", ts->kind); + break; + Index: gcc/fortran/ChangeLog =================================================================== --- a/src/gcc/fortran/ChangeLog (.../tags/gcc_4_7_3_release) +++ b/src/gcc/fortran/ChangeLog (.../branches/gcc-4_7-branch) -@@ -1,3 +1,83 @@ +@@ -1,3 +1,100 @@ ++2014-01-11 Janus Weil <janus@gcc.gnu.org> ++ ++ Backport from mainline ++ 2013-12-29 Janus Weil <janus@gcc.gnu.org> ++ ++ PR fortran/59612 ++ PR fortran/57042 ++ * dump-parse-tree.c (show_typespec): Check for charlen. ++ * invoke.texi: Fix documentation of -fdump-fortran-optimized and ++ -fdump-parse-tree. ++ ++2013-11-17 Paul Thomas <pault@gcc.gnu.org> ++ ++ PR fortran/58771 ++ * trans-io.c (transfer_expr): If the backend_decl for a derived ++ type is missing, build it with gfc_typenode_for_spec. ++ +2013-11-02 Janus Weil <janus@gcc.gnu.org> + + Backport from mainline @@ -13822,6 +14502,125 @@ Index: gcc/fortran/resolve.c && arg->next != NULL && arg->next->expr) { if (arg->next->expr->expr_type != EXPR_CONSTANT) +Index: gcc/fortran/trans-io.c +=================================================================== +--- a/src/gcc/fortran/trans-io.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/fortran/trans-io.c (.../branches/gcc-4_7-branch) +@@ -244,16 +244,16 @@ + + /* The code to generate the error. */ + gfc_start_block (&block); +- ++ + arg1 = gfc_build_addr_expr (NULL_TREE, var); +- ++ + arg2 = build_int_cst (integer_type_node, error_code), +- ++ + asprintf (&message, "%s", _(msgid)); + arg3 = gfc_build_addr_expr (pchar_type_node, + gfc_build_localized_cstring_const (message)); + free (message); +- ++ + tmp = build_call_expr_loc (input_location, + gfor_fndecl_generate_error, 3, arg1, arg2, arg3); + +@@ -522,7 +522,7 @@ + gfc_trans_io_runtime_check (cond, var, LIBERROR_BAD_UNIT, + "Unit number in I/O statement too small", + &se.pre); +- ++ + /* UNIT numbers should be less than the max. */ + val = gfc_conv_mpz_to_tree (gfc_integer_kinds[i].huge, 4); + cond = fold_build2_loc (input_location, GT_EXPR, boolean_type_node, +@@ -1002,7 +1002,7 @@ + if (p->convert) + mask |= set_string (&block, &post_block, var, IOPARM_open_convert, + p->convert); +- ++ + if (p->newunit) + mask |= set_parameter_ref (&block, &post_block, var, IOPARM_open_newunit, + p->newunit); +@@ -1236,7 +1236,7 @@ + { + mask |= set_parameter_ref (&block, &post_block, var, IOPARM_inquire_exist, + p->exist); +- ++ + if (p->unit && !p->iostat) + { + p->iostat = create_dummy_iostat (); +@@ -1324,7 +1324,7 @@ + if (p->pad) + mask |= set_string (&block, &post_block, var, IOPARM_inquire_pad, + p->pad); +- ++ + if (p->convert) + mask |= set_string (&block, &post_block, var, IOPARM_inquire_convert, + p->convert); +@@ -1546,7 +1546,7 @@ + tree dtype; + tree dt_parm_addr; + tree decl = NULL_TREE; +- int n_dim; ++ int n_dim; + int itype; + int rank = 0; + +@@ -2029,7 +2029,7 @@ + if (gfc_notification_std (GFC_STD_GNU) != SILENT) + { + gfc_error_now ("Derived type '%s' at %L has PRIVATE components", +- ts->u.derived->name, code != NULL ? &(code->loc) : ++ ts->u.derived->name, code != NULL ? &(code->loc) : + &gfc_current_locus); + return; + } +@@ -2038,7 +2038,7 @@ + ts->kind = ts->u.derived->ts.kind; + ts->f90_type = ts->u.derived->ts.f90_type; + } +- ++ + kind = ts->kind; + function = NULL; + arg2 = NULL; +@@ -2120,7 +2120,7 @@ + function = iocall[IOCALL_X_CHARACTER_WIDE]; + else + function = iocall[IOCALL_X_CHARACTER_WIDE_WRITE]; +- ++ + tmp = gfc_build_addr_expr (NULL_TREE, dt_parm); + tmp = build_call_expr_loc (input_location, + function, 4, tmp, addr_expr, arg2, arg3); +@@ -2152,6 +2152,12 @@ + expr = build_fold_indirect_ref_loc (input_location, + expr); + ++ /* Make sure that the derived type has been built. An external ++ function, if only referenced in an io statement requires this ++ check (see PR58771). */ ++ if (ts->u.derived->backend_decl == NULL_TREE) ++ tmp = gfc_typenode_for_spec (ts); ++ + for (c = ts->u.derived->components; c; c = c->next) + { + field = c->backend_decl; +@@ -2287,7 +2293,7 @@ + transfer_array_desc (&se, &expr->ts, tmp); + goto finish_block_label; + } +- ++ + /* Initialize the scalarizer. */ + gfc_init_loopinfo (&loop); + gfc_add_ss_to_loop (&loop, ss); Index: gcc/fortran/target-memory.c =================================================================== --- a/src/gcc/fortran/target-memory.c (.../tags/gcc_4_7_3_release) @@ -14182,6 +14981,30 @@ Index: gcc/fortran/simplify.c gfc_simplify_sign (gfc_expr *x, gfc_expr *y) { gfc_expr *result; +Index: gcc/configure.ac +=================================================================== +--- a/src/gcc/configure.ac (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/configure.ac (.../branches/gcc-4_7-branch) +@@ -5153,15 +5153,15 @@ + AC_MSG_CHECKING([for exported symbols]) + if test "x$export_sym_check" != x; then + echo "int main() {return 0;} int foobar() {return 0;}" > conftest.c +- ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest > /dev/null 2>&1 +- if $export_sym_check conftest | grep foobar > /dev/null; then ++ ${CC} ${CFLAGS} ${LDFLAGS} conftest.c -o conftest$ac_exeext > /dev/null 2>&1 ++ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then + : # No need to use a flag + AC_MSG_RESULT([yes]) + else + AC_MSG_RESULT([yes]) + AC_MSG_CHECKING([for -rdynamic]) +- ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest > /dev/null 2>&1 +- if $export_sym_check conftest | grep foobar > /dev/null; then ++ ${CC} ${CFLAGS} ${LDFLAGS} -rdynamic conftest.c -o conftest$ac_exeext > /dev/null 2>&1 ++ if $export_sym_check conftest$ac_exeext | grep -q foobar > /dev/null; then + plugin_rdynamic=yes + pluginlibs="-rdynamic" + else Index: gcc/alias.c =================================================================== --- a/src/gcc/alias.c (.../tags/gcc_4_7_3_release) @@ -15019,6 +15842,22 @@ Index: gcc/config/i386/t-rtems MULTILIB_EXCEPTIONS = \ mtune=pentium/*msoft-float* \ mtune=pentiumpro/*msoft-float* +Index: gcc/config/i386/winnt.c +=================================================================== +--- a/src/gcc/config/i386/winnt.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/i386/winnt.c (.../branches/gcc-4_7-branch) +@@ -531,8 +531,9 @@ + sets 'discard' characteristic, rather than telling linker + to warn of size or content mismatch, so do the same. */ + bool discard = (flags & SECTION_CODE) +- || lookup_attribute ("selectany", +- DECL_ATTRIBUTES (decl)); ++ || (TREE_CODE (decl) != IDENTIFIER_NODE ++ && lookup_attribute ("selectany", ++ DECL_ATTRIBUTES (decl))); + fprintf (asm_out_file, "\t.linkonce %s\n", + (discard ? "discard" : "same_size")); + } Index: gcc/config/i386/sse.md =================================================================== --- a/src/gcc/config/i386/sse.md (.../tags/gcc_4_7_3_release) @@ -15042,6 +15881,52 @@ Index: gcc/config/i386/sse.md return \"vprot<ssemodesuffix>\t{%3, %1, %0|%0, %1, %3}\"; } [(set_attr "type" "sseishft") +@@ -11455,7 +11456,6 @@ + [(set_attr "type" "ssecvt1") + (set_attr "mode" "<MODE>")]) + +-;; scalar insns + (define_expand "xop_vmfrcz<mode>2" + [(set (match_operand:VF_128 0 "register_operand") + (vec_merge:VF_128 +@@ -11465,11 +11465,9 @@ + (match_dup 3) + (const_int 1)))] + "TARGET_XOP" +-{ +- operands[3] = CONST0_RTX (<MODE>mode); +-}) ++ "operands[3] = CONST0_RTX (<MODE>mode);") + +-(define_insn "*xop_vmfrcz_<mode>" ++(define_insn "*xop_vmfrcz<mode>2" + [(set (match_operand:VF_128 0 "register_operand" "=x") + (vec_merge:VF_128 + (unspec:VF_128 +Index: gcc/config/i386/xopintrin.h +=================================================================== +--- a/src/gcc/config/i386/xopintrin.h (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/i386/xopintrin.h (.../branches/gcc-4_7-branch) +@@ -745,13 +745,17 @@ + extern __inline __m128 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_frcz_ss (__m128 __A, __m128 __B) + { +- return (__m128) __builtin_ia32_vfrczss ((__v4sf)__A, (__v4sf)__B); ++ return (__m128) __builtin_ia32_movss ((__v4sf)__A, ++ (__v4sf) ++ __builtin_ia32_vfrczss ((__v4sf)__B)); + } + + extern __inline __m128d __attribute__((__gnu_inline__, __always_inline__, __artificial__)) + _mm_frcz_sd (__m128d __A, __m128d __B) + { +- return (__m128d) __builtin_ia32_vfrczsd ((__v2df)__A, (__v2df)__B); ++ return (__m128d) __builtin_ia32_movsd ((__v2df)__A, ++ (__v2df) ++ __builtin_ia32_vfrczsd ((__v2df)__B)); + } + + extern __inline __m256 __attribute__((__gnu_inline__, __always_inline__, __artificial__)) Index: gcc/config/i386/driver-i386.c =================================================================== --- a/src/gcc/config/i386/driver-i386.c (.../tags/gcc_4_7_3_release) @@ -15153,6 +16038,15 @@ Index: gcc/config/i386/i386.c =================================================================== --- a/src/gcc/config/i386/i386.c (.../tags/gcc_4_7_3_release) +++ b/src/gcc/config/i386/i386.c (.../branches/gcc-4_7-branch) +@@ -1623,7 +1623,7 @@ + 8, /* MMX or SSE register to integer */ + 8, /* size of l1 cache. */ + 1024, /* size of l2 cache. */ +- 128, /* size of prefetch block */ ++ 64, /* size of prefetch block */ + 8, /* number of parallel prefetches */ + 1, /* Branch cost */ + COSTS_N_INSNS (6), /* cost of FADD and FSUB insns. */ @@ -2979,7 +2979,7 @@ | PTA_SSSE3 | PTA_CX16}, {"corei7", PROCESSOR_COREI7_64, CPU_COREI7, @@ -15258,7 +16152,233 @@ Index: gcc/config/i386/i386.c return ix86_select_alt_pic_regnum () == INVALID_REGNUM; if (crtl->calls_eh_return && maybe_eh_return) -@@ -13652,8 +13662,6 @@ +@@ -10421,14 +10431,15 @@ + + if (r10_live && eax_live) + { +- t = choose_baseaddr (m->fs.sp_offset - allocate); ++ t = plus_constant (stack_pointer_rtx, allocate); + emit_move_insn (r10, gen_frame_mem (Pmode, t)); +- t = choose_baseaddr (m->fs.sp_offset - allocate - UNITS_PER_WORD); ++ t = plus_constant (stack_pointer_rtx, ++ allocate - UNITS_PER_WORD); + emit_move_insn (eax, gen_frame_mem (Pmode, t)); + } + else if (eax_live || r10_live) + { +- t = choose_baseaddr (m->fs.sp_offset - allocate); ++ t = plus_constant (stack_pointer_rtx, allocate); + emit_move_insn ((eax_live ? eax : r10), gen_frame_mem (Pmode, t)); + } + } +@@ -11424,30 +11435,6 @@ + } + } + +-/* Determine if op is suitable SUBREG RTX for address. */ +- +-static bool +-ix86_address_subreg_operand (rtx op) +-{ +- enum machine_mode mode; +- +- if (!REG_P (op)) +- return false; +- +- mode = GET_MODE (op); +- +- if (GET_MODE_CLASS (mode) != MODE_INT) +- return false; +- +- /* Don't allow SUBREGs that span more than a word. It can lead to spill +- failures when the register is one word out of a two word structure. */ +- if (GET_MODE_SIZE (mode) > UNITS_PER_WORD) +- return false; +- +- /* Allow only SUBREGs of non-eliminable hard registers. */ +- return register_no_elim_operand (op, mode); +-} +- + /* Extract the parts of an RTL expression that is a valid memory address + for an instruction. Return 0 if the structure of the address is + grossly off. Return -1 if the address contains ASHIFT, so it is not +@@ -11512,7 +11499,7 @@ + base = addr; + else if (GET_CODE (addr) == SUBREG) + { +- if (ix86_address_subreg_operand (SUBREG_REG (addr))) ++ if (REG_P (SUBREG_REG (addr))) + base = addr; + else + return 0; +@@ -11570,7 +11557,7 @@ + break; + + case SUBREG: +- if (!ix86_address_subreg_operand (SUBREG_REG (op))) ++ if (!REG_P (SUBREG_REG (op))) + return 0; + /* FALLTHRU */ + +@@ -11615,19 +11602,6 @@ + scale = 1 << scale; + retval = -1; + } +- else if (CONST_INT_P (addr)) +- { +- if (!x86_64_immediate_operand (addr, VOIDmode)) +- return 0; +- +- /* Constant addresses are sign extended to 64bit, we have to +- prevent addresses from 0x80000000 to 0xffffffff in x32 mode. */ +- if (TARGET_X32 +- && val_signbit_known_set_p (SImode, INTVAL (addr))) +- return 0; +- +- disp = addr; +- } + else + disp = addr; /* displacement */ + +@@ -11636,7 +11610,7 @@ + if (REG_P (index)) + ; + else if (GET_CODE (index) == SUBREG +- && ix86_address_subreg_operand (SUBREG_REG (index))) ++ && REG_P (SUBREG_REG (index))) + ; + else + return 0; +@@ -12115,6 +12089,45 @@ + return false; + } + ++/* Determine if op is suitable RTX for an address register. ++ Return naked register if a register or a register subreg is ++ found, otherwise return NULL_RTX. */ ++ ++static rtx ++ix86_validate_address_register (rtx op) ++{ ++ enum machine_mode mode = GET_MODE (op); ++ ++ /* Only SImode or DImode registers can form the address. */ ++ if (mode != SImode && mode != DImode) ++ return NULL_RTX; ++ ++ if (REG_P (op)) ++ return op; ++ else if (GET_CODE (op) == SUBREG) ++ { ++ rtx reg = SUBREG_REG (op); ++ ++ if (!REG_P (reg)) ++ return NULL_RTX; ++ ++ mode = GET_MODE (reg); ++ ++ /* Don't allow SUBREGs that span more than a word. It can ++ lead to spill failures when the register is one word out ++ of a two word structure. */ ++ if (GET_MODE_SIZE (mode) > UNITS_PER_WORD) ++ return NULL_RTX; ++ ++ /* Allow only SUBREGs of non-eliminable hard registers. */ ++ if (register_no_elim_operand (reg, mode)) ++ return reg; ++ } ++ ++ /* Op is not a register. */ ++ return NULL_RTX; ++} ++ + /* Recognizes RTL expressions that are valid memory addresses for an + instruction. The MODE argument is the machine mode for the MEM + expression that wants to use this address. +@@ -12130,6 +12143,7 @@ + struct ix86_address parts; + rtx base, index, disp; + HOST_WIDE_INT scale; ++ enum ix86_address_seg seg; + + if (ix86_decompose_address (addr, &parts) <= 0) + /* Decomposition failed. */ +@@ -12139,23 +12153,16 @@ + index = parts.index; + disp = parts.disp; + scale = parts.scale; ++ seg = parts.seg; + + /* Validate base register. */ + if (base) + { +- rtx reg; ++ rtx reg = ix86_validate_address_register (base); + +- if (REG_P (base)) +- reg = base; +- else if (GET_CODE (base) == SUBREG && REG_P (SUBREG_REG (base))) +- reg = SUBREG_REG (base); +- else +- /* Base is not a register. */ ++ if (reg == NULL_RTX) + return false; + +- if (GET_MODE (base) != SImode && GET_MODE (base) != DImode) +- return false; +- + if ((strict && ! REG_OK_FOR_BASE_STRICT_P (reg)) + || (! strict && ! REG_OK_FOR_BASE_NONSTRICT_P (reg))) + /* Base is not valid. */ +@@ -12165,19 +12172,11 @@ + /* Validate index register. */ + if (index) + { +- rtx reg; ++ rtx reg = ix86_validate_address_register (index); + +- if (REG_P (index)) +- reg = index; +- else if (GET_CODE (index) == SUBREG && REG_P (SUBREG_REG (index))) +- reg = SUBREG_REG (index); +- else +- /* Index is not a register. */ ++ if (reg == NULL_RTX) + return false; + +- if (GET_MODE (index) != SImode && GET_MODE (index) != DImode) +- return false; +- + if ((strict && ! REG_OK_FOR_INDEX_STRICT_P (reg)) + || (! strict && ! REG_OK_FOR_INDEX_NONSTRICT_P (reg))) + /* Index is not valid. */ +@@ -12189,6 +12188,12 @@ + && GET_MODE (base) != GET_MODE (index)) + return false; + ++ /* Address override works only on the (%reg) part of %fs:(%reg). */ ++ if (seg != SEG_DEFAULT ++ && ((base && GET_MODE (base) != word_mode) ++ || (index && GET_MODE (index) != word_mode))) ++ return false; ++ + /* Validate scale factor. */ + if (scale != 1) + { +@@ -12310,6 +12315,12 @@ + && !x86_64_immediate_operand (disp, VOIDmode)) + /* Displacement is out of range. */ + return false; ++ /* In x32 mode, constant addresses are sign extended to 64bit, so ++ we have to prevent addresses from 0x80000000 to 0xffffffff. */ ++ else if (TARGET_X32 && !(index || base) ++ && CONST_INT_P (disp) ++ && val_signbit_known_set_p (SImode, INTVAL (disp))) ++ return false; + } + + /* Everything looks valid. */ +@@ -13652,8 +13663,6 @@ Those same assemblers have the same but opposite lossage on cmov. */ if (mode == CCmode) suffix = fp ? "nbe" : "a"; @@ -15267,7 +16387,7 @@ Index: gcc/config/i386/i386.c else gcc_unreachable (); break; -@@ -13675,8 +13683,12 @@ +@@ -13675,8 +13684,12 @@ } break; case LTU: @@ -15282,7 +16402,7 @@ Index: gcc/config/i386/i386.c break; case GE: switch (mode) -@@ -13696,20 +13708,20 @@ +@@ -13696,20 +13709,20 @@ } break; case GEU: @@ -15309,7 +16429,7 @@ Index: gcc/config/i386/i386.c else gcc_unreachable (); break; -@@ -18057,12 +18069,7 @@ +@@ -18057,12 +18070,7 @@ return CCmode; case GTU: /* CF=0 & ZF=0 */ case LEU: /* CF=1 | ZF=1 */ @@ -15323,7 +16443,7 @@ Index: gcc/config/i386/i386.c /* Codes possibly doable only with sign flag when comparing against zero. */ case GE: /* SF=OF or SF=0 */ -@@ -20026,7 +20033,7 @@ +@@ -20026,7 +20034,7 @@ vec[i * 2 + 1] = const1_rtx; } vt = gen_rtx_CONST_VECTOR (maskmode, gen_rtvec_v (w, vec)); @@ -15332,7 +16452,7 @@ Index: gcc/config/i386/i386.c t1 = expand_simple_binop (maskmode, PLUS, t1, vt, t1, 1, OPTAB_DIRECT); -@@ -20223,7 +20230,7 @@ +@@ -20223,7 +20231,7 @@ for (i = 0; i < 16; ++i) vec[i] = GEN_INT (i/e * e); vt = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, vec)); @@ -15341,7 +16461,7 @@ Index: gcc/config/i386/i386.c if (TARGET_XOP) emit_insn (gen_xop_pperm (mask, mask, mask, vt)); else -@@ -20234,7 +20241,7 @@ +@@ -20234,7 +20242,7 @@ for (i = 0; i < 16; ++i) vec[i] = GEN_INT (i % e); vt = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, vec)); @@ -15350,6 +16470,36 @@ Index: gcc/config/i386/i386.c emit_insn (gen_addv16qi3 (mask, mask, vt)); } +@@ -24258,8 +24266,17 @@ + int + ix86_data_alignment (tree type, int align) + { +- int max_align = optimize_size ? BITS_PER_WORD : MIN (256, MAX_OFILE_ALIGNMENT); ++ /* A data structure, equal or greater than the size of a cache line ++ (64 bytes in the Pentium 4 and other recent Intel processors, including ++ processors based on Intel Core microarchitecture) should be aligned ++ so that its base address is a multiple of a cache line size. */ + ++ int max_align ++ = MIN ((unsigned) ix86_cost->prefetch_block * 8, MAX_OFILE_ALIGNMENT); ++ ++ if (max_align < BITS_PER_WORD) ++ max_align = BITS_PER_WORD; ++ + if (AGGREGATE_TYPE_P (type) + && TYPE_SIZE (type) + && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST +@@ -27199,8 +27216,8 @@ + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_shlv8hi3, "__builtin_ia32_vpshlw", IX86_BUILTIN_VPSHLW, UNKNOWN, (int)MULTI_ARG_2_HI }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_shlv16qi3, "__builtin_ia32_vpshlb", IX86_BUILTIN_VPSHLB, UNKNOWN, (int)MULTI_ARG_2_QI }, + +- { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv4sf2, "__builtin_ia32_vfrczss", IX86_BUILTIN_VFRCZSS, UNKNOWN, (int)MULTI_ARG_2_SF }, +- { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv2df2, "__builtin_ia32_vfrczsd", IX86_BUILTIN_VFRCZSD, UNKNOWN, (int)MULTI_ARG_2_DF }, ++ { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv4sf2, "__builtin_ia32_vfrczss", IX86_BUILTIN_VFRCZSS, UNKNOWN, (int)MULTI_ARG_1_SF }, ++ { OPTION_MASK_ISA_XOP, CODE_FOR_xop_vmfrczv2df2, "__builtin_ia32_vfrczsd", IX86_BUILTIN_VFRCZSD, UNKNOWN, (int)MULTI_ARG_1_DF }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv4sf2, "__builtin_ia32_vfrczps", IX86_BUILTIN_VFRCZPS, UNKNOWN, (int)MULTI_ARG_1_SF }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv2df2, "__builtin_ia32_vfrczpd", IX86_BUILTIN_VFRCZPD, UNKNOWN, (int)MULTI_ARG_1_DF }, + { OPTION_MASK_ISA_XOP, CODE_FOR_xop_frczv8sf2, "__builtin_ia32_vfrczps256", IX86_BUILTIN_VFRCZPS256, UNKNOWN, (int)MULTI_ARG_1_SF2 }, Index: gcc/config/darwin-protos.h =================================================================== --- a/src/gcc/config/darwin-protos.h (.../tags/gcc_4_7_3_release) @@ -16095,6 +17245,30 @@ Index: gcc/config/pa/pa.c rtx dest = gen_rtx_REG (DFmode, i); emit_move_insn (dest, src); } +Index: gcc/config/mips/driver-native.c +=================================================================== +--- a/src/gcc/config/mips/driver-native.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/config/mips/driver-native.c (.../branches/gcc-4_7-branch) +@@ -116,11 +116,17 @@ + if (strncmp (buf, "cpu model", sizeof ("cpu model") - 1) == 0) + { + if (strstr (buf, "Godson2 V0.2") != NULL +- || strstr (buf, "Loongson-2 V0.2") != NULL) ++ || strstr (buf, "Loongson-2 V0.2") != NULL ++ || strstr (buf, "Loongson-2E") != NULL) + cpu = "loongson2e"; + else if (strstr (buf, "Godson2 V0.3") != NULL +- || strstr (buf, "Loongson-2 V0.3") != NULL) ++ || strstr (buf, "Loongson-2 V0.3") != NULL ++ || strstr (buf, "Loongson-2F") != NULL) + cpu = "loongson2f"; ++ else if (strstr (buf, "Godson3 V0.5") != NULL ++ || strstr (buf, "Loongson-3 V0.5") != NULL ++ || strstr (buf, "Loongson-3A") != NULL) ++ cpu = "loongson3a"; + else if (strstr (buf, "SiByte SB1") != NULL) + cpu = "sb1"; + else if (strstr (buf, "R5000") != NULL) Index: gcc/config/v850/t-rtems =================================================================== --- a/src/gcc/config/v850/t-rtems (.../tags/gcc_4_7_3_release) @@ -16193,6 +17367,42 @@ Index: gcc/collect2.h extern int collect_wait (const char *, struct pex_obj *); extern void dump_file (const char *, FILE *); +Index: gcc/regcprop.c +=================================================================== +--- a/src/gcc/regcprop.c (.../tags/gcc_4_7_3_release) ++++ b/src/gcc/regcprop.c (.../branches/gcc-4_7-branch) +@@ -741,6 +741,7 @@ + int n_ops, i, alt, predicated; + bool is_asm, any_replacements; + rtx set; ++ rtx link; + bool replaced[MAX_RECOG_OPERANDS]; + bool changed = false; + +@@ -808,6 +809,23 @@ + if (recog_op_alt[i][alt].earlyclobber) + kill_value (recog_data.operand[i], vd); + ++ /* If we have dead sets in the insn, then we need to note these as we ++ would clobbers. */ ++ for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) ++ { ++ if (REG_NOTE_KIND (link) == REG_UNUSED) ++ { ++ kill_value (XEXP (link, 0), vd); ++ /* Furthermore, if the insn looked like a single-set, ++ but the dead store kills the source value of that ++ set, then we can no-longer use the plain move ++ special case below. */ ++ if (set ++ && reg_overlap_mentioned_p (XEXP (link, 0), SET_SRC (set))) ++ set = NULL; ++ } ++ } ++ + /* Special-case plain move instructions, since we may well + be able to do the move from a different register class. */ + if (set && REG_P (SET_SRC (set))) Index: libgfortran/ChangeLog =================================================================== --- a/src/libgfortran/ChangeLog (.../tags/gcc_4_7_3_release) |