From 6ad269518a6c87643fe77d32a2c962f24906487c Mon Sep 17 00:00:00 2001 From: doko Date: Thu, 22 May 2014 13:21:10 +0000 Subject: - update the gcc-linaro-doc patch for 4.8.3 git-svn-id: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.8@7406 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca --- debian/patches/gcc-linaro-doc.diff | 54 +++++++++++++++++++------------------- 1 file changed, 27 insertions(+), 27 deletions(-) diff --git a/debian/patches/gcc-linaro-doc.diff b/debian/patches/gcc-linaro-doc.diff index 08cb9b3..798e762 100644 --- a/debian/patches/gcc-linaro-doc.diff +++ b/debian/patches/gcc-linaro-doc.diff @@ -4,7 +4,7 @@ Index: b/src/gcc/doc/extend.texi =================================================================== --- a/src/gcc/doc/extend.texi +++ b/src/gcc/doc/extend.texi -@@ -8781,6 +8781,7 @@ +@@ -8792,6 +8792,7 @@ instructions, but allow the compiler to * Alpha Built-in Functions:: * ARM iWMMXt Built-in Functions:: * ARM NEON Intrinsics:: @@ -12,7 +12,7 @@ Index: b/src/gcc/doc/extend.texi * AVR Built-in Functions:: * Blackfin Built-in Functions:: * FR-V Built-in Functions:: -@@ -9046,6 +9047,14 @@ +@@ -9058,6 +9059,14 @@ when the @option{-mfpu=neon} switch is u @include arm-neon-intrinsics.texi @@ -91,7 +91,7 @@ Index: b/src/gcc/doc/tm.texi =================================================================== --- a/src/gcc/doc/tm.texi +++ b/src/gcc/doc/tm.texi -@@ -10926,8 +10926,16 @@ +@@ -10926,8 +10926,16 @@ Fold a call to a machine specific built- @samp{TARGET_INIT_BUILTINS}. @var{fndecl} is the declaration of the built-in function. @var{n_args} is the number of arguments passed to the function; the arguments themselves are pointed to by @var{argp}. @@ -114,7 +114,7 @@ Index: b/src/gcc/doc/tm.texi.in =================================================================== --- a/src/gcc/doc/tm.texi.in +++ b/src/gcc/doc/tm.texi.in -@@ -10772,10 +10772,13 @@ +@@ -10772,10 +10772,13 @@ Fold a call to a machine specific built- @samp{TARGET_INIT_BUILTINS}. @var{fndecl} is the declaration of the built-in function. @var{n_args} is the number of arguments passed to the function; the arguments themselves are pointed to by @var{argp}. @@ -134,7 +134,7 @@ Index: b/src/gcc/doc/invoke.texi =================================================================== --- a/src/gcc/doc/invoke.texi +++ b/src/gcc/doc/invoke.texi -@@ -418,7 +418,7 @@ +@@ -418,7 +418,7 @@ Objective-C and Objective-C++ Dialects}. -ftree-parallelize-loops=@var{n} -ftree-pre -ftree-partial-pre -ftree-pta @gol -ftree-reassoc -ftree-sink -ftree-slsr -ftree-sra @gol -ftree-switch-conversion -ftree-tail-merge @gol @@ -143,7 +143,7 @@ Index: b/src/gcc/doc/invoke.texi -funit-at-a-time -funroll-all-loops -funroll-loops @gol -funsafe-loop-optimizations -funsafe-math-optimizations -funswitch-loops @gol -fvariable-expansion-in-unroller -fvect-cost-model -fvpt -fweb @gol -@@ -510,7 +510,9 @@ +@@ -510,7 +510,9 @@ Objective-C and Objective-C++ Dialects}. -mtp=@var{name} -mtls-dialect=@var{dialect} @gol -mword-relocations @gol -mfix-cortex-m3-ldrd @gol @@ -154,7 +154,7 @@ Index: b/src/gcc/doc/invoke.texi @emph{AVR Options} @gccoptlist{-mmcu=@var{mcu} -maccumulate-args -mbranch-cost=@var{cost} @gol -@@ -6590,7 +6592,7 @@ +@@ -6604,7 +6606,7 @@ optimizations designed to reduce code si @option{-Os} disables the following optimization flags: @gccoptlist{-falign-functions -falign-jumps -falign-loops @gol -falign-labels -freorder-blocks -freorder-blocks-and-partition @gol @@ -163,7 +163,7 @@ Index: b/src/gcc/doc/invoke.texi @item -Ofast @opindex Ofast -@@ -7831,19 +7833,20 @@ +@@ -7845,19 +7847,20 @@ Perform loop vectorization on trees. Thi Perform basic block vectorization on trees. This flag is enabled by default at @option{-O3} and when @option{-ftree-vectorize} is enabled. @@ -196,7 +196,7 @@ Index: b/src/gcc/doc/invoke.texi @item -ftree-vrp @opindex ftree-vrp -@@ -9239,13 +9242,15 @@ +@@ -9253,13 +9256,15 @@ constraints. The default value is 0. @item vect-max-version-for-alignment-checks The maximum number of run-time checks that can be performed when @@ -216,7 +216,7 @@ Index: b/src/gcc/doc/invoke.texi @item max-iterations-to-track The maximum number of iterations of a loop the brute-force algorithm -@@ -10966,6 +10971,8 @@ +@@ -10980,6 +10985,8 @@ Feature modifiers used with @option{-mar the following: @table @samp @@ -225,21 +225,10 @@ Index: b/src/gcc/doc/invoke.texi @item crypto Enable Crypto extension. This implies Advanced SIMD is enabled. @item fp -@@ -11263,8 +11270,8 @@ - @samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp}, - @samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s}, - @samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8}, @samp{cortex-a9}, --@samp{cortex-a15}, @samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5}, --@samp{cortex-m4}, @samp{cortex-m3}, -+@samp{cortex-a15}, @samp{cortex-a53}, @samp{cortex-r4}, @samp{cortex-r4f}, -+@samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-m4}, @samp{cortex-m3}, - @samp{cortex-m1}, - @samp{cortex-m0}, - @samp{cortex-m0plus}, -@@ -11317,9 +11324,12 @@ +@@ -11266,9 +11273,12 @@ of the @option{-mcpu=} option. Permissi @samp{armv6}, @samp{armv6j}, @samp{armv6t2}, @samp{armv6z}, @samp{armv6zk}, @samp{armv6-m}, - @samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m}, + @samp{armv7}, @samp{armv7-a}, @samp{armv7-r}, @samp{armv7-m}, @samp{armv7e-m} -@samp{armv8-a}, +@samp{armv8-a}, @samp{armv8-a+crc}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}. @@ -250,7 +239,18 @@ Index: b/src/gcc/doc/invoke.texi @option{-march=native} causes the compiler to auto-detect the architecture of the build computer. At present, this feature is only supported on Linux, and not all architectures are recognized. If the auto-detect is -@@ -11527,6 +11537,17 @@ +@@ -11298,8 +11308,8 @@ Permissible names are: @samp{arm2}, @sam + @samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp}, + @samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s}, + @samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8}, @samp{cortex-a9}, +-@samp{cortex-a15}, @samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5}, +-@samp{cortex-m4}, @samp{cortex-m3}, ++@samp{cortex-a15}, @samp{cortex-a53}, @samp{cortex-r4}, @samp{cortex-r4f}, ++@samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-m4}, @samp{cortex-m3}, + @samp{cortex-m1}, + @samp{cortex-m0}, + @samp{cortex-m0plus}, +@@ -11546,6 +11556,17 @@ setting of this option. If unaligned ac preprocessor symbol @code{__ARM_FEATURE_UNALIGNED} will also be defined. @@ -2475,7 +2475,7 @@ Index: b/src/gcc/doc/md.texi =================================================================== --- a/src/gcc/doc/md.texi +++ b/src/gcc/doc/md.texi -@@ -1711,9 +1711,6 @@ +@@ -1711,9 +1711,6 @@ Floating point constant zero @item Z Integer constant zero @@ -2485,7 +2485,7 @@ Index: b/src/gcc/doc/md.texi @item Ush The high part (bits 12 and upwards) of the pc-relative address of a symbol within 4GB of the instruction -@@ -8828,7 +8825,8 @@ +@@ -8868,7 +8865,8 @@ can be quite tedious to describe these f (define_cond_exec [@var{predicate-pattern}] "@var{condition}" @@ -2495,7 +2495,7 @@ Index: b/src/gcc/doc/md.texi @end smallexample @var{predicate-pattern} is the condition that must be true for the -@@ -8849,6 +8847,13 @@ +@@ -8889,6 +8887,13 @@ In order to handle the general case, the @code{current_insn_predicate} that will contain the entire predicate if the current insn is predicated, and will otherwise be @code{NULL}. -- cgit v1.2.3