* Update to SVN 20140618 (r211773) from the gcc-4_9-branch.

git-svn-id: svn://svn.debian.org/svn/gcccvs/branches/sid/gcc-4.9@7463 6ca36cf4-e1d1-0310-8c6f-e303bb2178ca

2 files changed, 602 insertions, 58 deletions

diff --git a/debian/changelog b/debian/changelog
index 9f5b3dc..a4b4a6c 100644
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,5 +1,7 @@
 gcc-4.9 (4.9.0-8) UNRELEASED; urgency=medium
 
+  * Update to SVN 20140618 (r211773) from the gcc-4_9-branch.
+
   * Don't ignore dpkg-shlibdeps errors for libstdc++6, left over from initial
     4.9 uploads.
   * Update libgcc1 symbols for sh4. Closes: #751919.
@@ -12,7 +14,6 @@ gcc-4.9 (4.9.0-7) unstable; urgency=medium
   * Update to SVN 20140616 (r211699) from the gcc-4_9-branch.
 
   [ Matthias Klose ]
-  * Update to SVN 20140610 (r211403) from the gcc-4_9-branch.
   * Fix patch application for powerpcspe (Helmit Grohne). Closes: #751001.
     + Update context for powerpc_remove_many.
     + Drop gcc-powerpcspe-ldbl-fix applied upstream.
diff --git a/debian/patches/svn-updates.diff b/debian/patches/svn-updates.diff
index 1d5f19c..b5c61b8 100644
--- a/debian/patches/svn-updates.diff
+++ b/debian/patches/svn-updates.diff
@@ -1,10 +1,10 @@
-# DP: updates from the 4.9 branch upto 20140616 (r211699).
+# DP: updates from the 4.9 branch upto 20140618 (r211773).
 
-last_updated()
+last_update()
 {
-	cat > ${dir}LAST_UPDATED <<EOF
-Mon Jun 16 10:55:09 CEST 2014
-Mon Jun 16 08:55:09 UTC 2014 (revision 211699)
+	cat > ${dir}LAST_UPDATED <EOF
+Wed Jun 18 11:17:45 CEST 2014
+Wed Jun 18 09:17:45 UTC 2014 (revision 211773)
 EOF
 }
 
@@ -3370,7 +3370,7 @@ Index: libjava/classpath
 Property changes on: libjava/classpath
 ___________________________________________________________________
 Modified: svn:mergeinfo
-   Merged /trunk/libjava/classpath:r210668
+   Merged /trunk/libjava/classpath:r210668,211733
 Index: libgcc/ChangeLog
 ===================================================================
 --- a/src/libgcc/ChangeLog	(.../tags/gcc_4_9_0_release)
@@ -3948,7 +3948,7 @@ Index: gcc/DATESTAMP
 +++ b/src/gcc/DATESTAMP	(.../branches/gcc-4_9-branch)
 @@ -1 +1 @@
 -20140422
-+20140616
++20140618
 Index: gcc/tree-tailcall.c
 ===================================================================
 --- a/src/gcc/tree-tailcall.c	(.../tags/gcc_4_9_0_release)
@@ -4841,7 +4841,40 @@ Index: gcc/ChangeLog
 ===================================================================
 --- a/src/gcc/ChangeLog	(.../tags/gcc_4_9_0_release)
 +++ b/src/gcc/ChangeLog	(.../branches/gcc-4_9-branch)
-@@ -1,3 +1,1153 @@
+@@ -1,3 +1,1185 @@
++2014-06-17  Yufeng Zhang  <yufeng.zhang@arm.com>
++
++	PR target/61483
++	* config/aarch64/aarch64.c (aarch64_layout_arg): Add new local
++	variable 'size'; calculate 'size' right in the front; use
++	'size' to compute 'nregs' (when 'allocate_ncrn != 0') and
++	pcum->aapcs_stack_words.
++
++2014-06-17  Nick Clifton  <nickc@redhat.com>
++
++	* config/msp430/msp430.md (mulhisi3): Add a NOP after the DINT.
++	(umulhi3, mulsidi3, umulsidi3): Likewise.
++
++2014-06-17  Uros Bizjak  <ubizjak@gmail.com>
++
++	Backport from mainline
++	2014-06-06  Uros Bizjak  <ubizjak@gmail.com>
++
++	PR target/61423
++	* config/i386/i386.md (*floatunssi<mode>2_i387_with_xmm): New
++	define_insn_and_split pattern, merged from *floatunssi<mode>2_1
++	and corresponding splitters.  Zero extend general register
++	or memory input operand to XMM temporary.  Enable for
++	TARGET_SSE2 and TARGET_INTER_UNIT_MOVES_TO_VEC only.
++	(floatunssi<mode>2): Update expander predicate.
++
++2014-06-16  Vladimir Makarov  <vmakarov@redhat.com>
++
++	PR rtl-optimization/61325
++	* lra-constraints.c (valid_address_p): Add forward declaration.
++	(simplify_operand_subreg): Check address validity before and after
++	alter_reg of memory subreg.
++
 +2014-06-18  Jakub Jelinek  <jakub@redhat.com>
 +
 +	PR plugins/45078
@@ -4913,7 +4946,6 @@ Index: gcc/ChangeLog
 +	* tree-ssa-threadedge.c (thread_through_normal_block): Correct return
 +	value when we stop processing a block due to problematic PHIs.
 +
-+
 +	2014-06-05  Jeff Law  <law@redhat.com>
 +
 +	PR tree-optimization/61289
@@ -5995,7 +6027,7 @@ Index: gcc/ChangeLog
  2014-04-22  Release Manager
  
  	* GCC 4.9.0 released.
-@@ -59,8 +1214,7 @@
+@@ -59,8 +1246,7 @@
  2014-04-11  Tobias Burnus  <burnus@net-b.de>
  
  	PR other/59055
@@ -6005,7 +6037,7 @@ Index: gcc/ChangeLog
  	* doc/gcc.texi (Service): Update description in the @menu
  	* doc/invoke.texi (Option Summary): Remove misplaced and
  	duplicated @menu.
-@@ -86,15 +1240,14 @@
+@@ -86,15 +1272,14 @@
  2014-04-11  Jakub Jelinek  <jakub@redhat.com>
  
  	PR rtl-optimization/60663
@@ -6024,7 +6056,7 @@ Index: gcc/ChangeLog
  
  2014-04-10  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
  
-@@ -212,9 +1365,10 @@
+@@ -212,9 +1397,10 @@
  
  2014-04-05  Pitchumani Sivanupandi  <Pitchumani.S@atmel.com>
  
@@ -6038,7 +6070,7 @@ Index: gcc/ChangeLog
  	* config/avr/avr-c.c (avr_cpu_cpp_builtins): use dev_attribute to check
  	errata_skip. Add __AVR_ISA_RMW__ builtin macro if RMW ISA available.
  	* config/avr/avr-devices.c (avr_mcu_types): Update AVR_MCU macro for
-@@ -282,21 +1436,21 @@
+@@ -282,21 +1468,21 @@
  2014-04-04  Martin Jambor  <mjambor@suse.cz>
  
  	PR ipa/60640
@@ -6071,7 +6103,7 @@ Index: gcc/ChangeLog
  	moved setting of a lot of flags to set_new_clone_decl_and_node_flags.
  
  2014-04-04  Jeff Law  <law@redhat.com>
-@@ -334,8 +1488,8 @@
+@@ -334,8 +1520,8 @@
  
  	PR tree-optimization/60505
  	* tree-vectorizer.h (struct _stmt_vec_info): Add th field as the
@@ -6082,7 +6114,7 @@ Index: gcc/ChangeLog
  	* tree-vect-loop.c (new_loop_vec_info):
  	Initialize LOOP_VINFO_COST_MODEL_THRESHOLD.
  	* tree-vect-loop.c (vect_analyze_loop_operations):
-@@ -347,8 +1501,7 @@
+@@ -347,8 +1533,7 @@
  
  2014-04-03  Richard Biener  <rguenther@suse.de>
  
@@ -6092,7 +6124,7 @@ Index: gcc/ChangeLog
  	(streamer_tree_cache_create): Adjust.
  	* tree-streamer.c (streamer_tree_cache_add_to_node_array): Adjust
  	to allow optional nodes array.
-@@ -359,8 +1512,7 @@
+@@ -359,8 +1544,7 @@
  	* lto-streamer-out.c (create_output_block): Avoid maintaining
  	the node array in the writer cache.
  	(DFS_write_tree): Remove assertion.
@@ -6102,7 +6134,7 @@ Index: gcc/ChangeLog
  	* lto-streamer-in.c (lto_data_in_create): Adjust for
  	streamer_tree_cache_create prototype change.
  
-@@ -381,24 +1533,6 @@
+@@ -381,24 +1565,6 @@
  	(Weffc++): Remove Scott's numbering, merge lists and reference
  	Wnon-virtual-dtor.
  
@@ -6127,7 +6159,7 @@ Index: gcc/ChangeLog
  2014-04-03  Nick Clifton  <nickc@redhat.com>
  
  	* config/rl78/rl78-expand.md (movqi): Handle (SUBREG (SYMBOL_REF))
-@@ -414,8 +1548,8 @@
+@@ -414,8 +1580,8 @@
  2014-04-02  Jan Hubicka  <hubicka@ucw.cz>
  
  	PR ipa/60659
@@ -6138,7 +6170,7 @@ Index: gcc/ChangeLog
  	(possible_polymorphic_call_targets): For inconsistent contexts
  	return empty complete list.
  
-@@ -519,8 +1653,7 @@
+@@ -519,8 +1685,7 @@
  
  2014-04-01  Richard Biener  <rguenther@suse.de>
  
@@ -6148,7 +6180,7 @@ Index: gcc/ChangeLog
  
  2014-04-01  Sebastian Huber  <sebastian.huber@embedded-brains.de>
  
-@@ -1031,10 +2164,10 @@
+@@ -1031,10 +2196,10 @@
  
  	PR tree-optimization/60577
  	* tree-core.h (struct tree_base): Document nothrow_flag use
@@ -7055,6 +7087,172 @@ Index: gcc/testsuite/gcc.target/powerpc/ti_math2.c
 +  return 0;
 +}
 +
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-14.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-14.c	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-14.c	(.../branches/gcc-4_9-branch)
+@@ -0,0 +1,35 @@
++/* Test AAPCS64 layout and __builtin_va_start.
++
++   Pass named HFA/HVA argument on stack.  */
++
++/* { dg-do run { target aarch64*-*-* } } */
++
++#ifndef IN_FRAMEWORK
++#define AAPCS64_TEST_STDARG
++#define TESTFILE "va_arg-14.c"
++#include "type-def.h"
++
++struct hfa_fx2_t hfa_fx2 = {1.2f, 2.2f};
++struct hfa_fx3_t hfa_fx3 = {3.2f, 4.2f, 5.2f};
++vf4_t float32x4 = {6.2f, 7.2f, 8.2f, 9.2f};
++vf4_t float32x4_2 = {10.2f, 11.2f, 12.2f, 13.2f};
++
++#include "abitest.h"
++#else
++  ARG (float, 1.0f, S0, 0)
++  ARG (float, 2.0f, S1, 1)
++  ARG (float, 3.0f, S2, 2)
++  ARG (float, 4.0f, S3, 3)
++  ARG (float, 5.0f, S4, 4)
++  ARG (float, 6.0f, S5, 5)
++  ARG (float, 7.0f, S6, 6)
++  ARG (struct hfa_fx3_t, hfa_fx3, STACK, 7)
++  /* Previous argument size has been rounded up to the nearest multiple of
++     8 bytes.  */
++  ARG (struct hfa_fx2_t, hfa_fx2, STACK + 16, 8)
++  /* NSAA is rounded up to the nearest natural alignment of float32x4.  */
++  ARG (vf4_t, float32x4, STACK + 32, 9)
++  ARG (vf4_t, float32x4_2, STACK + 48, LAST_NAMED_ARG_ID)
++  DOTS
++  LAST_ANON (double, 123456789.987, STACK + 64, 11)
++#endif
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/type-def.h	(.../branches/gcc-4_9-branch)
+@@ -34,6 +34,13 @@
+   float b;
+ };
+ 
++struct hfa_fx3_t
++{
++  float a;
++  float b;
++  float c;
++};
++
+ struct hfa_dx2_t
+ {
+   double a;
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-13.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-13.c	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-13.c	(.../branches/gcc-4_9-branch)
+@@ -0,0 +1,59 @@
++/* Test AAPCS64 layout and __builtin_va_start.
++
++   Pass named HFA/HVA argument on stack.  */
++
++/* { dg-do run { target aarch64*-*-* } } */
++
++#ifndef IN_FRAMEWORK
++#define AAPCS64_TEST_STDARG
++#define TESTFILE "va_arg-13.c"
++
++struct float_float_t
++{
++  float a;
++  float b;
++} float_float;
++
++union float_int_t
++{
++  float b8;
++  int b5;
++} float_int;
++
++#define HAS_DATA_INIT_FUNC
++void
++init_data ()
++{
++  float_float.a = 1.2f;
++  float_float.b = 2.2f;
++
++  float_int.b8 = 4983.80f;
++}
++
++#include "abitest.h"
++#else
++  ARG (float, 1.0f, S0, 0)
++  ARG (float, 2.0f, S1, 1)
++  ARG (float, 3.0f, S2, 2)
++  ARG (float, 4.0f, S3, 3)
++  ARG (float, 5.0f, S4, 4)
++  ARG (float, 6.0f, S5, 5)
++  ARG (float, 7.0f, S6, 6)
++  ARG (struct float_float_t, float_float, STACK, 7)
++  ARG (int,  9, W0, 8)
++  ARG (int, 10, W1, 9)
++  ARG (int, 11, W2, 10)
++  ARG (int, 12, W3, 11)
++  ARG (int, 13, W4, 12)
++  ARG (int, 14, W5, 13)
++  ARG (int, 15, W6, LAST_NAMED_ARG_ID)
++  DOTS
++  /* Note on the reason of using 'X7' instead of 'W7' here:
++     Using 'X7' makes sure the test works in the big-endian mode.
++     According to PCS rules B.4 and C.10, the size of float_int is rounded
++     to 8 bytes and prepared in the register X7 as if loaded via LDR from
++     the memory, with the content of the other 4 bytes unspecified.  The
++     test framework will only compare the 4 relavent bytes.  */
++  ANON (union float_int_t, float_int, X7, 15)
++  LAST_ANON (long long, 12683143434LL, STACK + 8, 16)
++#endif
+Index: gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-15.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-15.c	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/testsuite/gcc.target/aarch64/aapcs64/va_arg-15.c	(.../branches/gcc-4_9-branch)
+@@ -0,0 +1,39 @@
++/* Test AAPCS64 layout and __builtin_va_start.
++
++   Pass named __128int argument on stack.  */
++
++/* { dg-do run { target aarch64*-*-* } } */
++
++#ifndef IN_FRAMEWORK
++#define AAPCS64_TEST_STDARG
++#define TESTFILE "va_arg-15.c"
++#include "type-def.h"
++
++union int128_t qword;
++
++#define HAS_DATA_INIT_FUNC
++void
++init_data ()
++{
++  /* Init signed quad-word integer.  */
++  qword.l64 = 0xfdb9753102468aceLL;
++  qword.h64 = 0xeca8642013579bdfLL;
++}
++
++#include "abitest.h"
++#else
++  ARG (int, 1, W0, 0)
++  ARG (int, 2, W1, 1)
++  ARG (int, 3, W2, 2)
++  ARG (int, 4, W3, 3)
++  ARG (int, 5, W4, 4)
++  ARG (int, 6, W5, 5)
++  ARG (int, 7, W6, 6)
++  ARG (__int128, qword.i, STACK, LAST_NAMED_ARG_ID)
++  DOTS
++#ifndef __AAPCS64_BIG_ENDIAN__
++  LAST_ANON (int, 8, STACK + 16, 8)
++#else
++  LAST_ANON (int, 8, STACK + 20, 8)
++#endif
++#endif
 Index: gcc/testsuite/gcc.target/aarch64/pr61325.c
 ===================================================================
 --- a/src/gcc/testsuite/gcc.target/aarch64/pr61325.c	(.../tags/gcc_4_9_0_release)
@@ -7453,6 +7651,49 @@ Index: gcc/testsuite/gcc.target/i386/vec-may_alias.c
 +  return 0;
 +}
 +
+Index: gcc/testsuite/gcc.target/i386/pr61423.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.target/i386/pr61423.c	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/testsuite/gcc.target/i386/pr61423.c	(.../branches/gcc-4_9-branch)
+@@ -0,0 +1,38 @@
++/* PR target/61423 */
++/* { dg-do run { target ia32 } } */
++/* { dg-options "-O1 -ftree-vectorize -msse2 -mfpmath=387 -mtune=core2" } */
++
++#define N 1024
++static unsigned int A[N];
++
++double
++__attribute__((noinline))
++func (void)
++{
++  unsigned int sum = 0;
++  unsigned i;
++  double t;
++
++  for (i = 0; i < N; i++)
++    sum += A[i];
++
++  t = sum;
++  return t;
++}
++
++int
++main ()
++{
++  unsigned i;
++  double d;
++
++  for(i = 0; i < N; i++)
++    A[i] = 1;
++
++  d = func();
++
++  if (d != 1024.0)
++    __builtin_abort ();
++
++  return 0;
++}
 Index: gcc/testsuite/gcc.target/i386/pr60868.c
 ===================================================================
 --- a/src/gcc/testsuite/gcc.target/i386/pr60868.c	(.../tags/gcc_4_9_0_release)
@@ -8527,6 +8768,24 @@ Index: gcc/testsuite/gcc.dg/lto/pr60911_0.c
 +    __builtin_abort ();
 +  return 0;
 +}
+Index: gcc/testsuite/gcc.dg/lto/pr61526_0.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/lto/pr61526_0.c	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/testsuite/gcc.dg/lto/pr61526_0.c	(.../branches/gcc-4_9-branch)
+@@ -0,0 +1,6 @@
++/* { dg-lto-do link } */
++/* { dg-lto-options { { -fPIC -flto -flto-partition=1to1 } } } */
++/* { dg-extra-ld-options { -shared } } */
++
++static void *master;
++void *foo () { return master; }
+Index: gcc/testsuite/gcc.dg/lto/pr61526_1.c
+===================================================================
+--- a/src/gcc/testsuite/gcc.dg/lto/pr61526_1.c	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/testsuite/gcc.dg/lto/pr61526_1.c	(.../branches/gcc-4_9-branch)
+@@ -0,0 +1,2 @@
++extern void *master;
++void *bar () { return master; }
 Index: gcc/testsuite/gcc.dg/pr61060.c
 ===================================================================
 --- a/src/gcc/testsuite/gcc.dg/pr61060.c	(.../tags/gcc_4_9_0_release)
@@ -9137,7 +9396,29 @@ Index: gcc/testsuite/ChangeLog
 ===================================================================
 --- a/src/gcc/testsuite/ChangeLog	(.../tags/gcc_4_9_0_release)
 +++ b/src/gcc/testsuite/ChangeLog	(.../branches/gcc-4_9-branch)
-@@ -1,3 +1,528 @@
+@@ -1,3 +1,550 @@
++2014-06-17  Yufeng Zhang  <yufeng.zhang@arm.com>
++
++	PR target/61483
++	* gcc.target/aarch64/aapcs64/type-def.h (struct hfa_fx2_t): New type.
++	* gcc.target/aarch64/aapcs64/va_arg-13.c: New test.
++	* gcc.target/aarch64/aapcs64/va_arg-14.c: Ditto.
++	* gcc.target/aarch64/aapcs64/va_arg-15.c: Ditto.
++
++2014-06-17  Richard Biener  <rguenther@suse.de>
++
++	PR lto/61012
++	* gcc.dg/lto/pr61526_0.c: New testcase.
++	* gcc.dg/lto/pr61526_1.c: Likewise.
++
++2014-06-17  Uros Bizjak  <ubizjak@gmail.com>
++
++	Backport from mainline
++	2014-06-06  Uros Bizjak  <ubizjak@gmail.com>
++
++	PR target/61423
++	* gcc.target/i386/pr61423.c: New test.
++
 +2014-06-15  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
 +
 +	Backport from trunk.
@@ -9666,7 +9947,7 @@ Index: gcc/testsuite/ChangeLog
  2014-04-22  Release Manager
  
  	* GCC 4.9.0 released.
-@@ -51,7 +576,7 @@
+@@ -51,7 +598,7 @@
  2014-04-12  Jerry DeLisle  <jvdelisle@gcc.gnu>
  
  	PR libfortran/60810
@@ -9675,7 +9956,7 @@ Index: gcc/testsuite/ChangeLog
  
  2014-04-11  Steve Ellcey  <sellcey@mips.com>
  	    Jakub Jelinek  <jakub@redhat.com>
-@@ -135,8 +660,7 @@
+@@ -135,8 +682,7 @@
  
  2014-04-08  Jason Merrill  <jason@redhat.com>
  
@@ -9685,7 +9966,7 @@ Index: gcc/testsuite/ChangeLog
  
  2014-04-08  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  
-@@ -256,10 +780,10 @@
+@@ -256,10 +802,10 @@
  2014-04-04  Martin Jambor  <mjambor@suse.cz>
  
  	PR ipa/60640
@@ -9700,7 +9981,7 @@ Index: gcc/testsuite/ChangeLog
  
  2014-04-04  Jeff Law  <law@redhat.com>
  
-@@ -371,7 +895,7 @@
+@@ -371,7 +917,7 @@
  
  2014-04-01  Fabien Chêne  <fabien@gcc.gnu.org>
  
@@ -9709,7 +9990,7 @@ Index: gcc/testsuite/ChangeLog
  	* g++.dg/init/ctor4-1.C: New.
  	* g++.dg/cpp0x/defaulted2.C: Adjust.
  
-@@ -459,8 +983,8 @@
+@@ -459,8 +1005,8 @@
  
  2014-03-27  Jeff Law  <law@redhat.com>
  
@@ -9720,7 +10001,7 @@ Index: gcc/testsuite/ChangeLog
  
  2014-03-28  Adam Butcher  <adam@jessamine.co.uk>
  
-@@ -493,14 +1017,13 @@
+@@ -493,14 +1039,13 @@
  
  2014-03-28  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  
@@ -9738,7 +10019,7 @@ Index: gcc/testsuite/ChangeLog
  	of second source operand.
  	* gcc.target/i386/avx512f-vshuff64x2-2.c: Ditto.
  	* gcc.target/i386/avx512f-vshufi32x4-2.c: Ditto.
-@@ -635,8 +1158,8 @@
+@@ -635,8 +1180,8 @@
  
  2014-03-24  Marek Polacek  <polacek@redhat.com>
  
@@ -9749,7 +10030,7 @@ Index: gcc/testsuite/ChangeLog
  	* c-c++-common/ubsan/overflow-1.c: Check for unwanted output.
  	* c-c++-common/ubsan/overflow-add-1.c: Likewise.
  	* c-c++-common/ubsan/overflow-mul-1.c: Likewise.
-@@ -721,8 +1244,7 @@
+@@ -721,8 +1266,7 @@
  2014-03-21  Tobias Burnus  <burnus@net-b.de>
  
  	PR fortran/60599
@@ -9759,7 +10040,7 @@ Index: gcc/testsuite/ChangeLog
  
  2014-03-20  Jakub Jelinek  <jakub@redhat.com>
  
-@@ -1540,8 +2062,7 @@
+@@ -1540,8 +2084,7 @@
  
  2014-02-19  Paul Pluzhnikov  <ppluzhnikov@google.com>
  
@@ -9769,7 +10050,7 @@ Index: gcc/testsuite/ChangeLog
  
  2014-02-19  Jakub Jelinek  <jakub@redhat.com>
  
-@@ -1850,8 +2371,7 @@
+@@ -1850,8 +2393,7 @@
  
  2014-02-10  Jakub Jelinek  <jakub@redhat.com>
  
@@ -9779,7 +10060,7 @@ Index: gcc/testsuite/ChangeLog
  
  2014-02-09  Paul Thomas  <pault@gcc.gnu.org>
  
-@@ -3098,8 +3618,8 @@
+@@ -3098,8 +3640,8 @@
  	* gfortran.dg/vect/fast-math-mgrid-resid.f: Change
  	-fdump-tree-optimized to -fdump-tree-pcom-details in dg-options and
  	cleanup-tree-dump from optimized to pcom.  Remove scan-tree-dump-times
@@ -9790,6 +10071,43 @@ Index: gcc/testsuite/ChangeLog
  
  2014-01-14  Kirill Yukhin  <kirill.yukhin@intel.com>
  
+Index: gcc/testsuite/g++.dg/debug/dwarf2/imported-decl-2.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/debug/dwarf2/imported-decl-2.C	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/testsuite/g++.dg/debug/dwarf2/imported-decl-2.C	(.../branches/gcc-4_9-branch)
+@@ -0,0 +1,32 @@
++// { dg-do compile }
++// { dg-options "-gdwarf-2 -dA -O0 -fno-merge-debug-strings" }
++
++class AAAA
++{
++ public:
++  int method (void);
++  int a;
++};
++
++int
++AAAA::method (void)
++{
++  return a;
++}
++
++class BBBB : public AAAA
++{
++ public:
++  using AAAA::method;
++
++  int method (int b);
++};
++
++int
++BBBB::method (int b)
++{
++  return a + b;
++}
++
++// { dg-final { scan-assembler-not "ascii \"BBBB\\\\0\".*ascii \"AAAA\\\\0\".*DW_TAG_imported_declaration" } }
++// { dg-final { scan-assembler-times "ascii \"AAAA\\\\0\".*ascii \"BBBB\\\\0\".*DIE .0x\[0-9a-f\]*. DW_TAG_imported_declaration" 1 } }
 Index: gcc/testsuite/g++.dg/vect/pr60836.cc
 ===================================================================
 --- a/src/gcc/testsuite/g++.dg/vect/pr60836.cc	(.../tags/gcc_4_9_0_release)
@@ -10660,6 +10978,19 @@ Index: gcc/testsuite/g++.dg/ipa/devirt-11.C
 -/* { dg-final { scan-ipa-dump-times "Discovered a virtual call to a known target" 3 "inline"  } } */
 +/* { dg-final { scan-ipa-dump "Discovered a virtual call to a known target" "inline"  } } */
  /* { dg-final { cleanup-ipa-dump "inline" } } */
+Index: gcc/testsuite/g++.dg/template/local-fn1.C
+===================================================================
+--- a/src/gcc/testsuite/g++.dg/template/local-fn1.C	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/testsuite/g++.dg/template/local-fn1.C	(.../branches/gcc-4_9-branch)
+@@ -0,0 +1,8 @@
++// PR c++/60605
++
++template <typename T = int>
++struct Foo {
++    void bar() {
++        void bug();
++    }
++};
 Index: gcc/testsuite/c-c++-common/cilk-plus/CK/invalid_sync.cc
 ===================================================================
 --- a/src/gcc/testsuite/c-c++-common/cilk-plus/CK/invalid_sync.cc	(.../tags/gcc_4_9_0_release)
@@ -11416,6 +11747,19 @@ Index: gcc/cp/init.c
      {
        tree ctor = build_aggr_init_expr
  	(type,
+Index: gcc/cp/class.c
+===================================================================
+--- a/src/gcc/cp/class.c	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/cp/class.c	(.../branches/gcc-4_9-branch)
+@@ -1300,7 +1300,7 @@
+ 	old_value = NULL_TREE;
+     }
+ 
+-  cp_emit_debug_info_for_using (decl, USING_DECL_SCOPE (using_decl));
++  cp_emit_debug_info_for_using (decl, t);
+ 
+   if (is_overloaded_fn (decl))
+     flist = decl;
 Index: gcc/cp/decl.c
 ===================================================================
 --- a/src/gcc/cp/decl.c	(.../tags/gcc_4_9_0_release)
@@ -11438,7 +11782,18 @@ Index: gcc/cp/ChangeLog
 ===================================================================
 --- a/src/gcc/cp/ChangeLog	(.../tags/gcc_4_9_0_release)
 +++ b/src/gcc/cp/ChangeLog	(.../branches/gcc-4_9-branch)
-@@ -1,3 +1,79 @@
+@@ -1,3 +1,90 @@
++2014-06-18  Jason Merrill  <jason@redhat.com>
++
++	PR c++/60605
++	* pt.c (check_default_tmpl_args): Check DECL_LOCAL_FUNCTION_P.
++
++2014-06-18  Siva Chandra Reddy  <sivachandra@google.com>
++
++        PR debug/57519
++        * class.c (handle_using_decl): Pass the correct scope to
++        cp_emit_debug_info_for_using.
++
 +2014-06-09  Jason Merrill  <jason@redhat.com>
 +
 +	PR c++/61343
@@ -11565,7 +11920,17 @@ Index: gcc/cp/pt.c
  
    if (inline_needs_template_parms (decl, nsdmi))
      {
-@@ -5817,17 +5821,18 @@
+@@ -4419,7 +4423,8 @@
+      in the template-parameter-list of the definition of a member of a
+      class template.  */
+ 
+-  if (TREE_CODE (CP_DECL_CONTEXT (decl)) == FUNCTION_DECL)
++  if (TREE_CODE (CP_DECL_CONTEXT (decl)) == FUNCTION_DECL
++      || (TREE_CODE (decl) == FUNCTION_DECL && DECL_LOCAL_FUNCTION_P (decl)))
+     /* You can't have a function template declaration in a local
+        scope, nor you can you define a member of a class template in a
+        local scope.  */
+@@ -5817,17 +5822,18 @@
  	{
  	  if (VAR_P (expr))
  	    {
@@ -11591,7 +11956,7 @@ Index: gcc/cp/pt.c
  	      return NULL_TREE;
  	    }
  	  /* Other values, like integer constants, might be valid
-@@ -5842,23 +5847,24 @@
+@@ -5842,23 +5848,24 @@
  		  ? TREE_OPERAND (expr, 0) : expr);
  	  if (!VAR_P (decl))
  	    {
@@ -11625,7 +11990,7 @@ Index: gcc/cp/pt.c
  	      return NULL_TREE;
  	    }
  	}
-@@ -5886,15 +5892,17 @@
+@@ -5886,15 +5893,17 @@
  
        if (!at_least_as_qualified_p (TREE_TYPE (type), expr_type))
  	{
@@ -11647,7 +12012,7 @@ Index: gcc/cp/pt.c
  	  return NULL_TREE;
  	}
  
-@@ -5910,9 +5918,10 @@
+@@ -5910,9 +5919,10 @@
  	  expr = TREE_OPERAND (expr, 0);
  	  if (DECL_P (expr))
  	    {
@@ -11661,7 +12026,7 @@ Index: gcc/cp/pt.c
  	      return NULL_TREE;
  	    }
  	}
-@@ -5919,17 +5928,19 @@
+@@ -5919,17 +5929,19 @@
  
        if (!DECL_P (expr))
  	{
@@ -11687,7 +12052,7 @@ Index: gcc/cp/pt.c
  	  return NULL_TREE;
  	}
  
-@@ -5971,9 +5982,13 @@
+@@ -5971,9 +5983,13 @@
      {
        if (TREE_CODE (expr) == ADDR_EXPR)
  	{
@@ -11704,7 +12069,7 @@ Index: gcc/cp/pt.c
  	  return NULL_TREE;
  	}
  
-@@ -6011,13 +6026,16 @@
+@@ -6011,13 +6027,16 @@
  	 provide a superior diagnostic.  */
        if (!same_type_p (TREE_TYPE (expr), type))
  	{
@@ -11728,7 +12093,7 @@ Index: gcc/cp/pt.c
  	  return NULL_TREE;
  	}
      }
-@@ -6040,8 +6058,9 @@
+@@ -6040,8 +6059,9 @@
      {
        if (expr != nullptr_node)
  	{
@@ -11740,7 +12105,7 @@ Index: gcc/cp/pt.c
  	  return NULL_TREE;
  	}
        return expr;
-@@ -12638,13 +12657,17 @@
+@@ -12638,13 +12658,17 @@
  		}
  	      else
  		{
@@ -11765,7 +12130,7 @@ Index: gcc/cp/pt.c
  		}
  	    }
  	}
-@@ -15613,7 +15636,7 @@
+@@ -15613,7 +15637,7 @@
  	continue;
        for (packs = PACK_EXPANSION_PARAMETER_PACKS (type);
  	   packs; packs = TREE_CHAIN (packs))
@@ -14364,7 +14729,49 @@ Index: gcc/lra-constraints.c
 ===================================================================
 --- a/src/gcc/lra-constraints.c	(.../tags/gcc_4_9_0_release)
 +++ b/src/gcc/lra-constraints.c	(.../branches/gcc-4_9-branch)
-@@ -2787,9 +2787,14 @@
+@@ -1231,6 +1231,8 @@
+     }
+ }
+ 
++static int valid_address_p (enum machine_mode mode, rtx addr, addr_space_t as);
++
+ /* Make reloads for subreg in operand NOP with internal subreg mode
+    REG_MODE, add new reloads for further processing.  Return true if
+    any reload was generated.  */
+@@ -1261,12 +1263,28 @@
+      equivalences in function lra_constraints) and because for spilled
+      pseudos we allocate stack memory enough for the biggest
+      corresponding paradoxical subreg.  */
+-  if ((MEM_P (reg)
+-       && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (reg))
+-	   || MEM_ALIGN (reg) >= GET_MODE_ALIGNMENT (mode)))
+-      || (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER))
++  if (MEM_P (reg)
++      && (! SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (reg))
++	  || MEM_ALIGN (reg) >= GET_MODE_ALIGNMENT (mode)))
+     {
++      rtx subst, old = *curr_id->operand_loc[nop];
++
+       alter_subreg (curr_id->operand_loc[nop], false);
++      subst = *curr_id->operand_loc[nop];
++      lra_assert (MEM_P (subst));
++      if (! valid_address_p (GET_MODE (reg), XEXP (reg, 0),
++			     MEM_ADDR_SPACE (reg))
++	  || valid_address_p (GET_MODE (subst), XEXP (subst, 0),
++			      MEM_ADDR_SPACE (subst)))
++	return true;
++      /* If the address was valid and became invalid, prefer to reload
++	 the memory.  Typical case is when the index scale should
++	 correspond the memory.  */
++      *curr_id->operand_loc[nop] = old;
++    }
++  else if (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER)
++    {
++      alter_subreg (curr_id->operand_loc[nop], false);
+       return true;
+     }
+   /* Put constant into memory when we have mixed modes.  It generates
+@@ -2787,9 +2805,14 @@
  
     Add reloads to the lists *BEFORE and *AFTER.  We might need to add
     reloads to *AFTER because of inc/dec, {pre, post} modify in the
@@ -14381,7 +14788,7 @@ Index: gcc/lra-constraints.c
  {
    struct address_info ad;
    rtx new_reg;
-@@ -2972,6 +2977,13 @@
+@@ -2972,6 +2995,13 @@
        *ad.inner = simplify_gen_binary (PLUS, GET_MODE (new_reg),
  				       new_reg, *ad.index);
      }
@@ -14395,7 +14802,7 @@ Index: gcc/lra-constraints.c
    else
      {
        /* base + scale * index => base + new_reg,
-@@ -2989,6 +3001,18 @@
+@@ -2989,6 +3019,18 @@
    return true;
  }
  
@@ -14414,7 +14821,7 @@ Index: gcc/lra-constraints.c
  /* Emit insns to reload VALUE into a new register.  VALUE is an
     auto-increment or auto-decrement RTX whose operand is a register or
     memory location; so reloading involves incrementing that location.
-@@ -3273,7 +3297,7 @@
+@@ -3273,7 +3315,7 @@
  	change_p = true;
  	lra_update_dup (curr_id, i);
        }
@@ -27046,7 +27453,90 @@ Index: gcc/config/i386/i386.md
  		 (const_string "SI")
  	       (eq_attr "alternative" "11")
  		 (const_string "DI")
-@@ -14427,15 +14427,16 @@
+@@ -4933,66 +4933,37 @@
+ 
+ ;; Avoid store forwarding (partial memory) stall penalty by extending
+ ;; SImode value to DImode through XMM register instead of pushing two
+-;; SImode values to stack. Note that even !TARGET_INTER_UNIT_MOVES_TO_VEC
+-;; targets benefit from this optimization. Also note that fild
+-;; loads from memory only.
++;; SImode values to stack. Also note that fild loads from memory only.
+ 
+-(define_insn "*floatunssi<mode>2_1"
+-  [(set (match_operand:X87MODEF 0 "register_operand" "=f,f")
++(define_insn_and_split "*floatunssi<mode>2_i387_with_xmm"
++  [(set (match_operand:X87MODEF 0 "register_operand" "=f")
+ 	(unsigned_float:X87MODEF
+-	  (match_operand:SI 1 "nonimmediate_operand" "x,m")))
+-   (clobber (match_operand:DI 2 "memory_operand" "=m,m"))
+-   (clobber (match_scratch:SI 3 "=X,x"))]
++	  (match_operand:SI 1 "nonimmediate_operand" "rm")))
++   (clobber (match_scratch:DI 3 "=x"))
++   (clobber (match_operand:DI 2 "memory_operand" "=m"))]
+   "!TARGET_64BIT
+    && TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
+-   && TARGET_SSE"
++   && TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC"
+   "#"
++  "&& reload_completed"
++  [(set (match_dup 3) (zero_extend:DI (match_dup 1)))
++   (set (match_dup 2) (match_dup 3))
++   (set (match_dup 0)
++	(float:X87MODEF (match_dup 2)))]
++  ""
+   [(set_attr "type" "multi")
+    (set_attr "mode" "<MODE>")])
+ 
+-(define_split
+-  [(set (match_operand:X87MODEF 0 "register_operand")
+-	(unsigned_float:X87MODEF
+-	  (match_operand:SI 1 "register_operand")))
+-   (clobber (match_operand:DI 2 "memory_operand"))
+-   (clobber (match_scratch:SI 3))]
+-  "!TARGET_64BIT
+-   && TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
+-   && TARGET_SSE
+-   && reload_completed"
+-  [(set (match_dup 2) (match_dup 1))
+-   (set (match_dup 0)
+-	(float:X87MODEF (match_dup 2)))]
+-  "operands[1] = simplify_gen_subreg (DImode, operands[1], SImode, 0);")
+-
+-(define_split
+-  [(set (match_operand:X87MODEF 0 "register_operand")
+-	(unsigned_float:X87MODEF
+-	  (match_operand:SI 1 "memory_operand")))
+-   (clobber (match_operand:DI 2 "memory_operand"))
+-   (clobber (match_scratch:SI 3))]
+-  "!TARGET_64BIT
+-   && TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
+-   && TARGET_SSE
+-   && reload_completed"
+-  [(set (match_dup 2) (match_dup 3))
+-   (set (match_dup 0)
+-	(float:X87MODEF (match_dup 2)))]
+-{
+-  emit_move_insn (operands[3], operands[1]);
+-  operands[3] = simplify_gen_subreg (DImode, operands[3], SImode, 0);
+-})
+-
+ (define_expand "floatunssi<mode>2"
+   [(parallel
+      [(set (match_operand:X87MODEF 0 "register_operand")
+ 	   (unsigned_float:X87MODEF
+ 	     (match_operand:SI 1 "nonimmediate_operand")))
+-      (clobber (match_dup 2))
+-      (clobber (match_scratch:SI 3))])]
++      (clobber (match_scratch:DI 3))
++      (clobber (match_dup 2))])]
+   "!TARGET_64BIT
+    && ((TARGET_80387 && X87_ENABLE_FLOAT (<X87MODEF:MODE>mode, DImode)
+-	&& TARGET_SSE)
++	&& TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC)
+        || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH))"
+ {
+   if (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH)
+@@ -14427,15 +14398,16 @@
    "TARGET_USE_FANCY_MATH_387
     && flag_unsafe_math_optimizations"
  {
@@ -27564,6 +28054,59 @@ Index: gcc/config/aarch64/arm_neon.h
             : /* No clobbers */);
    return result;
  }
+Index: gcc/config/aarch64/aarch64.c
+===================================================================
+--- a/src/gcc/config/aarch64/aarch64.c	(.../tags/gcc_4_9_0_release)
++++ b/src/gcc/config/aarch64/aarch64.c	(.../branches/gcc-4_9-branch)
+@@ -1405,6 +1405,7 @@
+   CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v);
+   int ncrn, nvrn, nregs;
+   bool allocate_ncrn, allocate_nvrn;
++  HOST_WIDE_INT size;
+ 
+   /* We need to do this once per argument.  */
+   if (pcum->aapcs_arg_processed)
+@@ -1412,6 +1413,11 @@
+ 
+   pcum->aapcs_arg_processed = true;
+ 
++  /* Size in bytes, rounded to the nearest multiple of 8 bytes.  */
++  size
++    = AARCH64_ROUND_UP (type ? int_size_in_bytes (type) : GET_MODE_SIZE (mode),
++			UNITS_PER_WORD);
++
+   allocate_ncrn = (type) ? !(FLOAT_TYPE_P (type)) : !FLOAT_MODE_P (mode);
+   allocate_nvrn = aarch64_vfp_is_call_candidate (pcum_v,
+ 						 mode,
+@@ -1462,10 +1468,8 @@
+     }
+ 
+   ncrn = pcum->aapcs_ncrn;
+-  nregs = ((type ? int_size_in_bytes (type) : GET_MODE_SIZE (mode))
+-	   + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
++  nregs = size / UNITS_PER_WORD;
+ 
+-
+   /* C6 - C9.  though the sign and zero extension semantics are
+      handled elsewhere.  This is the case where the argument fits
+      entirely general registers.  */
+@@ -1513,13 +1517,12 @@
+   pcum->aapcs_nextncrn = NUM_ARG_REGS;
+ 
+   /* The argument is passed on stack; record the needed number of words for
+-     this argument (we can re-use NREGS) and align the total size if
+-     necessary.  */
++     this argument and align the total size if necessary.  */
+ on_stack:
+-  pcum->aapcs_stack_words = nregs;
++  pcum->aapcs_stack_words = size / UNITS_PER_WORD;
+   if (aarch64_function_arg_alignment (mode, type) == 16 * BITS_PER_UNIT)
+     pcum->aapcs_stack_size = AARCH64_ROUND_UP (pcum->aapcs_stack_size,
+-					       16 / UNITS_PER_WORD) + 1;
++					       16 / UNITS_PER_WORD);
+   return;
+ }
+ 
 Index: gcc/config/aarch64/aarch64.h
 ===================================================================
 --- a/src/gcc/config/aarch64/aarch64.h	(.../tags/gcc_4_9_0_release)
@@ -29475,10 +30018,10 @@ Index: gcc/config/msp430/msp430.md
 -    if (msp430_is_f5_mcu ())
 -      return \"MOV.W %1, &0x04C2 { MOV.W %2, &0x04C8 { MOV.W &0x04CA, %L0 { MOV.W &0x04CC, %H0\";
 +    if (msp430_use_f5_series_hwmult ())
-+      return \"PUSH.W sr { DINT { MOV.W %1, &0x04C2 { MOV.W %2, &0x04C8 { MOV.W &0x04CA, %L0 { MOV.W &0x04CC, %H0 { POP.W sr\";
++      return \"PUSH.W sr { DINT { NOP { MOV.W %1, &0x04C2 { MOV.W %2, &0x04C8 { MOV.W &0x04CA, %L0 { MOV.W &0x04CC, %H0 { POP.W sr\";
      else
 -      return \"MOV.W %1, &0x0132 { MOV.W %2, &0x0138 { MOV.W &0x013A, %L0 { MOV.W &0x013C, %H0\";
-+      return \"PUSH.W sr { DINT { MOV.W %1, &0x0132 { MOV.W %2, &0x0138 { MOV.W &0x013A, %L0 { MOV.W &0x013C, %H0 { POP.W sr\";
++      return \"PUSH.W sr { DINT { NOP { MOV.W %1, &0x0132 { MOV.W %2, &0x0138 { MOV.W &0x013A, %L0 { MOV.W &0x013C, %H0 { POP.W sr\";
    "
  )
  
@@ -29492,10 +30035,10 @@ Index: gcc/config/msp430/msp430.md
 -    if (msp430_is_f5_mcu ())
 -      return \"MOV.W %1, &0x04C0 { MOV.W %2, &0x04C8 { MOV.W &0x04CA, %L0 { MOV.W &0x04CC, %H0\";
 +    if (msp430_use_f5_series_hwmult ())
-+      return \"PUSH.W sr { DINT { MOV.W %1, &0x04C0 { MOV.W %2, &0x04C8 { MOV.W &0x04CA, %L0 { MOV.W &0x04CC, %H0 { POP.W sr\";
++      return \"PUSH.W sr { DINT { NOP { MOV.W %1, &0x04C0 { MOV.W %2, &0x04C8 { MOV.W &0x04CA, %L0 { MOV.W &0x04CC, %H0 { POP.W sr\";
      else
 -      return \"MOV.W %1, &0x0130 { MOV.W %2, &0x0138 { MOV.W &0x013A, %L0 { MOV.W &0x013C, %H0\";
-+      return \"PUSH.W sr { DINT { MOV.W %1, &0x0130 { MOV.W %2, &0x0138 { MOV.W &0x013A, %L0 { MOV.W &0x013C, %H0 { POP.W sr\";
++      return \"PUSH.W sr { DINT { NOP { MOV.W %1, &0x0130 { MOV.W %2, &0x0138 { MOV.W &0x013A, %L0 { MOV.W &0x013C, %H0 { POP.W sr\";
    "
  )
  
@@ -29509,10 +30052,10 @@ Index: gcc/config/msp430/msp430.md
 -    if (msp430_is_f5_mcu ())
 -      return \"MOV.W %L1, &0x04D4 { MOV.W %H1, &0x04D6 { MOV.W %L2, &0x04E0 { MOV.W %H2, &0x04E2 { MOV.W &0x04E4, %A0 { MOV.W &0x04E6, %B0 { MOV.W &0x04E8, %C0 { MOV.W &0x04EA, %D0\";
 +    if (msp430_use_f5_series_hwmult ())
-+      return \"PUSH.W sr { DINT { MOV.W %L1, &0x04D4 { MOV.W %H1, &0x04D6 { MOV.W %L2, &0x04E0 { MOV.W %H2, &0x04E2 { MOV.W &0x04E4, %A0 { MOV.W &0x04E6, %B0 { MOV.W &0x04E8, %C0 { MOV.W &0x04EA, %D0 { POP.W sr\";
++      return \"PUSH.W sr { DINT { NOP { MOV.W %L1, &0x04D4 { MOV.W %H1, &0x04D6 { MOV.W %L2, &0x04E0 { MOV.W %H2, &0x04E2 { MOV.W &0x04E4, %A0 { MOV.W &0x04E6, %B0 { MOV.W &0x04E8, %C0 { MOV.W &0x04EA, %D0 { POP.W sr\";
      else
 -      return \"MOV.W %L1, &0x0144 { MOV.W %H1, &0x0146 { MOV.W %L2, &0x0150 { MOV.W %H2, &0x0152 { MOV.W &0x0154, %A0 { MOV.W &0x0156, %B0 { MOV.W &0x0158, %C0 { MOV.W &0x015A, %D0\";
-+      return \"PUSH.W sr { DINT { MOV.W %L1, &0x0144 { MOV.W %H1, &0x0146 { MOV.W %L2, &0x0150 { MOV.W %H2, &0x0152 { MOV.W &0x0154, %A0 { MOV.W &0x0156, %B0 { MOV.W &0x0158, %C0 { MOV.W &0x015A, %D0 { POP.W sr\";
++      return \"PUSH.W sr { DINT { NOP { MOV.W %L1, &0x0144 { MOV.W %H1, &0x0146 { MOV.W %L2, &0x0150 { MOV.W %H2, &0x0152 { MOV.W &0x0154, %A0 { MOV.W &0x0156, %B0 { MOV.W &0x0158, %C0 { MOV.W &0x015A, %D0 { POP.W sr\";
    "
  )
  
@@ -29526,10 +30069,10 @@ Index: gcc/config/msp430/msp430.md
 -    if (msp430_is_f5_mcu ())
 -      return \"MOV.W %L1, &0x04D0 { MOV.W %H1, &0x04D2 { MOV.W %L2, &0x04E0 { MOV.W %H2, &0x04E2 { MOV.W &0x04E4, %A0 { MOV.W &0x04E6, %B0 { MOV.W &0x04E8, %C0 { MOV.W &0x04EA, %D0\";
 +    if (msp430_use_f5_series_hwmult ())
-+      return \"PUSH.W sr { DINT { MOV.W %L1, &0x04D0 { MOV.W %H1, &0x04D2 { MOV.W %L2, &0x04E0 { MOV.W %H2, &0x04E2 { MOV.W &0x04E4, %A0 { MOV.W &0x04E6, %B0 { MOV.W &0x04E8, %C0 { MOV.W &0x04EA, %D0 { POP.W sr\";
++      return \"PUSH.W sr { DINT { NOP { MOV.W %L1, &0x04D0 { MOV.W %H1, &0x04D2 { MOV.W %L2, &0x04E0 { MOV.W %H2, &0x04E2 { MOV.W &0x04E4, %A0 { MOV.W &0x04E6, %B0 { MOV.W &0x04E8, %C0 { MOV.W &0x04EA, %D0 { POP.W sr\";
      else
 -      return \"MOV.W %L1, &0x0140 { MOV.W %H1, &0x0141 { MOV.W %L2, &0x0150 { MOV.W %H2, &0x0152 { MOV.W &0x0154, %A0 { MOV.W &0x0156, %B0 { MOV.W &0x0158, %C0 { MOV.W &0x015A, %D0\";
-+      return \"PUSH.W sr { DINT { MOV.W %L1, &0x0140 { MOV.W %H1, &0x0142 { MOV.W %L2, &0x0150 { MOV.W %H2, &0x0152 { MOV.W &0x0154, %A0 { MOV.W &0x0156, %B0 { MOV.W &0x0158, %C0 { MOV.W &0x015A, %D0 { POP.W sr\";
++      return \"PUSH.W sr { DINT { NOP { MOV.W %L1, &0x0140 { MOV.W %H1, &0x0142 { MOV.W %L2, &0x0150 { MOV.W %H2, &0x0152 { MOV.W &0x0154, %A0 { MOV.W &0x0156, %B0 { MOV.W &0x0158, %C0 { MOV.W &0x015A, %D0 { POP.W sr\";
    "
  )
 Index: gcc/config/msp430/msp430.c
@@ -30904,4 +31447,4 @@ Index: .
 Property changes on: .
 ___________________________________________________________________
 Added: svn:mergeinfo
-   Merged /trunk:r210668
+   Merged /trunk:r210668,211733