HVM-572 KVM: x86: Inject #GP with the right rip on efer writes

1 files changed, 11 insertions, 17 deletions

diff --git a/kvm_x86.c b/kvm_x86.c
index 779b02a..825b907 100644
--- a/kvm_x86.c
+++ b/kvm_x86.c
@@ -578,38 +578,31 @@ static uint32_t emulated_msrs[] = {
 	MSR_IA32_MISC_ENABLE,
 };
 
-static void
+static int
 set_efer(struct kvm_vcpu *vcpu, uint64_t efer)
 {
-	if (efer & efer_reserved_bits) {
-		kvm_inject_gp(vcpu, 0);
-		return;
-	}
+	if (efer & efer_reserved_bits)
+		return (1);
 
 	if (is_paging(vcpu) &&
 	    (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME)) {
-		kvm_inject_gp(vcpu, 0);
-		return;
+		return (1);
 	}
 
 	if (efer & EFER_FFXSR) {
 		struct kvm_cpuid_entry2 *feat;
 
 		feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
-		if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
-			kvm_inject_gp(vcpu, 0);
-			return;
-		}
+		if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
+			return (1);
 	}
 
 	if (efer & EFER_SVME) {
 		struct kvm_cpuid_entry2 *feat;
 
 		feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
-		if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
-			kvm_inject_gp(vcpu, 0);
-			return;
-		}
+		if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
+			return (1);
 	}
 
 	efer &= ~EFER_LMA;
@@ -621,6 +614,8 @@ set_efer(struct kvm_vcpu *vcpu, uint64_t efer)
 
 	vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 	kvm_mmu_reset_context(vcpu);
+
+	return (0);
 }
 
 void
@@ -1108,8 +1103,7 @@ kvm_set_msr_common(struct kvm_vcpu *vcpu, uint32_t msr, uint64_t data)
 {
 	switch (msr) {
 	case MSR_EFER:
-		set_efer(vcpu, data);
-		break;
+		return (set_efer(vcpu, data));
 	case MSR_K7_HWCR:
 		data &= ~(uint64_t)0x40; /* ignore flush filter disable */
 		if (data != 0) {