diff options
author | af <none@none> | 2008-01-03 09:03:02 -0800 |
---|---|---|
committer | af <none@none> | 2008-01-03 09:03:02 -0800 |
commit | 5de8e333fea6455895155795aae363a0737b8e8e (patch) | |
tree | 1916d47d868dec782d96424fed685870a747b740 | |
parent | 4d594c339b4bc590af28251f4d30380f003d6c35 (diff) | |
download | illumos-gate-5de8e333fea6455895155795aae363a0737b8e8e.tar.gz |
6640340 Intel 7300 northbridge correctable memory errors wrongly diagnosed to rank 0 bank 0
-rw-r--r-- | usr/src/uts/i86pc/io/intel_nb5000/intel_nb5000.c | 8 | ||||
-rw-r--r-- | usr/src/uts/i86pc/io/intel_nb5000/nb5000.h | 110 | ||||
-rw-r--r-- | usr/src/uts/i86pc/io/intel_nb5000/nb5000_init.c | 9 | ||||
-rw-r--r-- | usr/src/uts/i86pc/io/intel_nb5000/nb_log.h | 9 | ||||
-rw-r--r-- | usr/src/uts/intel/sys/mc_intel.h | 4 |
5 files changed, 94 insertions, 46 deletions
diff --git a/usr/src/uts/i86pc/io/intel_nb5000/intel_nb5000.c b/usr/src/uts/i86pc/io/intel_nb5000/intel_nb5000.c index e72e59b683..8c0313eb27 100644 --- a/usr/src/uts/i86pc/io/intel_nb5000/intel_nb5000.c +++ b/usr/src/uts/i86pc/io/intel_nb5000/intel_nb5000.c @@ -20,7 +20,7 @@ */ /* - * Copyright 2007 Sun Microsystems, Inc. All rights reserved. + * Copyright 2008 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -646,6 +646,7 @@ log_fat_fbd_err(nb_regs_t *rp, int *interpose) rp->nb.fat_fbd_regs.nrecfbdc = NRECFBDC_RD(); rp->nb.fat_fbd_regs.nrecfbdd = NRECFBDD_RD(); rp->nb.fat_fbd_regs.nrecfbde = NRECFBDE_RD(); + rp->nb.fat_fbd_regs.nrecfbdf = NRECFBDF_RD(); rp->nb.fat_fbd_regs.spcps = SPCPS_RD(branch); rp->nb.fat_fbd_regs.spcpc = SPCPC_RD(branch); rp->nb.fat_fbd_regs.uerrcnt = UERRCNT_RD(branch); @@ -692,6 +693,7 @@ log_nf_fbd_err(nb_regs_t *rp, int *interpose) rp->nb.nf_fbd_regs.recfbdc = RECFBDC_RD(); rp->nb.nf_fbd_regs.recfbdd = RECFBDD_RD(); rp->nb.nf_fbd_regs.recfbde = RECFBDE_RD(); + rp->nb.nf_fbd_regs.recfbdf = RECFBDF_RD(); rp->nb.nf_fbd_regs.spcps = SPCPS_RD(branch); rp->nb.nf_fbd_regs.spcpc = SPCPC_RD(branch); rp->nb.nf_fbd_regs.cerrcnt = CERRCNT_RD(branch); @@ -974,6 +976,8 @@ nb_fat_fbd_err_payload(const nb_regs_t *nb_regs, nvlist_t *payload, DATA_TYPE_UINT32, nb_regs->nb.fat_fbd_regs.nrecfbdd, NULL); fm_payload_set(payload, FM_EREPORT_PAYLOAD_NAME_NRECFBDE, DATA_TYPE_UINT32, nb_regs->nb.fat_fbd_regs.nrecfbde, NULL); + fm_payload_set(payload, FM_EREPORT_PAYLOAD_NAME_NRECFBDF, + DATA_TYPE_UINT32, nb_regs->nb.fat_fbd_regs.nrecfbdf, NULL); fm_payload_set(payload, FM_EREPORT_PAYLOAD_NAME_SPCPS, DATA_TYPE_UINT8, nb_regs->nb.fat_fbd_regs.spcps, NULL); fm_payload_set(payload, FM_EREPORT_PAYLOAD_NAME_SPCPC, @@ -1046,6 +1050,8 @@ nb_nf_fbd_err_payload(const nb_regs_t *nb_regs, nvlist_t *payload, DATA_TYPE_UINT32, nb_regs->nb.nf_fbd_regs.recfbdd, NULL); fm_payload_set(payload, FM_EREPORT_PAYLOAD_NAME_RECFBDE, DATA_TYPE_UINT32, nb_regs->nb.nf_fbd_regs.recfbde, NULL); + fm_payload_set(payload, FM_EREPORT_PAYLOAD_NAME_RECFBDF, + DATA_TYPE_UINT32, nb_regs->nb.nf_fbd_regs.recfbdf, NULL); fm_payload_set(payload, FM_EREPORT_PAYLOAD_NAME_SPCPS, DATA_TYPE_UINT8, nb_regs->nb.nf_fbd_regs.spcps, NULL); fm_payload_set(payload, FM_EREPORT_PAYLOAD_NAME_SPCPC, diff --git a/usr/src/uts/i86pc/io/intel_nb5000/nb5000.h b/usr/src/uts/i86pc/io/intel_nb5000/nb5000.h index d349bc3800..0749980602 100644 --- a/usr/src/uts/i86pc/io/intel_nb5000/nb5000.h +++ b/usr/src/uts/i86pc/io/intel_nb5000/nb5000.h @@ -20,7 +20,7 @@ */ /* - * Copyright 2007 Sun Microsystems, Inc. All rights reserved. + * Copyright 2008 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -37,7 +37,9 @@ extern "C" { #define NB_5000_MAX_MEM_CONTROLLERS 2 #define NB_MEM_BRANCH_SELECT 3 -#define NB_MEM_RANK_SELECT 5 +#define NB_MAX_MEM_BRANCH_SELECT 3 +#define NB_MEM_RANK_SELECT (nb_chipset == INTEL_NB_7300 ? 7 : 5) +#define NB_MAX_MEM_RANK_SELECT 7 #define NB_RANKS_IN_SELECT 4 #define NB_PCI_DEV 8 @@ -60,8 +62,8 @@ extern "C" { #define TLOW_MAX 0x100000000ULL -#define MTR_PRESENT(mtr) ((mtr) & 0x10) -#define MTR_ETHROTTLE(mtr) ((mtr) & 8) +#define MTR_PRESENT(mtr) ((mtr) & 0x0100) +#define MTR_ETHROTTLE(mtr) ((mtr) & 0x0080) #define MTR_WIDTH(mtr) (((((mtr) >> 6) & 1) + 1) * 4) #define MTR_NUMBANK(mtr) (((((mtr) >> 5) & 1) + 1) * 4) #define MTR_NUMRANK(mtr) ((((mtr) >> 4) & 1) + 1) @@ -597,38 +599,74 @@ extern "C" { #define NRECMEMA_RD() nb_pci_getw(0, 16, 1, 0xbe, 0) #define NRECMEMB_RD() nb_pci_getl(0, 16, 1, 0xc0, 0) -#define NRECFGLOG_RD() nb_pci_getl(0, 16, 1, 0xc4, 0) -#define NRECFBDA_RD() nb_pci_getl(0, 16, 1, 0xc8, 0) -#define NRECFBDB_RD() nb_pci_getl(0, 16, 1, 0xcc, 0) -#define NRECFBDC_RD() nb_pci_getl(0, 16, 1, 0xd0, 0) -#define NRECFBDD_RD() nb_pci_getl(0, 16, 1, 0xd4, 0) -#define NRECFBDE_RD() nb_pci_getl(0, 16, 1, 0xd8, 0) -#define REDMEMB_RD() nb_pci_getl(0, 16, 1, 0x7c, 0) -#define RECMEMA_RD() nb_pci_getw(0, 16, 1, 0xe2, 0) -#define RECMEMB_RD() nb_pci_getl(0, 16, 1, 0xe4, 0) -#define RECFGLOG_RD() nb_pci_getl(0, 16, 1, 0xe8, 0) -#define RECFBDA_RD() nb_pci_getl(0, 16, 1, 0xec, 0) -#define RECFBDB_RD() nb_pci_getl(0, 16, 1, 0xf0, 0) -#define RECFBDC_RD() nb_pci_getl(0, 16, 1, 0xf4, 0) -#define RECFBDD_RD() nb_pci_getl(0, 16, 1, 0xf8, 0) -#define RECFBDE_RD() nb_pci_getl(0, 16, 1, 0xfc, 0) -#define NRECMEMA_WR() nb_pci_putw(0, 16, 1, 0xbe, 0) -#define NRECMEMB_WR() nb_pci_putl(0, 16, 1, 0xc0, 0) -#define NRECFGLOG_WR() nb_pci_putl(0, 16, 1, 0xc4, 0) -#define NRECFBDA_WR() nb_pci_putl(0, 16, 1, 0xc8, 0) -#define NRECFBDB_WR() nb_pci_putl(0, 16, 1, 0xcc, 0) -#define NRECFBDC_WR() nb_pci_putl(0, 16, 1, 0xd0, 0) -#define NRECFBDD_WR() nb_pci_putl(0, 16, 1, 0xd4, 0) -#define NRECFBDE_WR() nb_pci_putl(0, 16, 1, 0xd8, 0) -#define REDMEMB_WR() nb_pci_putl(0, 16, 1, 0x7c, 0) -#define RECMEMA_WR() nb_pci_putw(0, 16, 1, 0xe2, 0) -#define RECMEMB_WR() nb_pci_putl(0, 16, 1, 0xe4, 0) -#define RECFGLOG_WR() nb_pci_putl(0, 16, 1, 0xe8, 0) -#define RECFBDA_WR() nb_pci_putl(0, 16, 1, 0xec, 0) -#define RECFBDB_WR() nb_pci_putl(0, 16, 1, 0xf0, 0) -#define RECFBDC_WR() nb_pci_putl(0, 16, 1, 0xf4, 0) -#define RECFBDD_WR() nb_pci_putl(0, 16, 1, 0xf8, 0) -#define RECFBDE_WR() nb_pci_putl(0, 16, 1, 0xfc, 0) +#define NRECFGLOG_RD() \ + nb_pci_getl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0x74 : 0xc4, 0) +#define NRECFBDA_RD() \ + nb_pci_getl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xc4 : 0xc8, 0) +#define NRECFBDB_RD() \ + nb_pci_getl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xc8 : 0xcc, 0) +#define NRECFBDC_RD() \ + nb_pci_getl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xcc : 0xd0, 0) +#define NRECFBDD_RD() \ + nb_pci_getl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xd0 : 0xd4, 0) +#define NRECFBDE_RD() \ + nb_pci_getl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xd4 : 0xd8, 0) +#define NRECFBDF_RD() \ + (nb_chipset == INTEL_NB_7300 ? nb_pci_getw(0, 16, 1, 0xd8, 0) : 0) +#define REDMEMB_RD() nb_pci_getl(0, 16, 1, 0x7c, 0) +#define RECMEMA_RD() \ + nb_pci_getw(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xe0 : 0xe2, 0) +#define RECMEMB_RD() nb_pci_getl(0, 16, 1, 0xe4, 0) +#define RECFGLOG_RD() \ + nb_pci_getl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0x78 : 0xe8, 0) +#define RECFBDA_RD() \ + nb_pci_getl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xe8 : 0xec, 0) +#define RECFBDB_RD() \ + nb_pci_getl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xec : 0xf0, 0) +#define RECFBDC_RD() \ + nb_pci_getl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xf0 : 0xf4, 0) +#define RECFBDD_RD() \ + nb_pci_getl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xf4 : 0xf8, 0) +#define RECFBDE_RD() \ + nb_pci_getl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xf8 : 0xfc, 0) +#define RECFBDF_RD() \ + (nb_chipset == INTEL_NB_7300 ? nb_pci_getw(0, 16, 1, 0xfc, 0) : 0) +#define NRECMEMA_WR() nb_pci_putw(0, 16, 1, 0xbe, 0) +#define NRECMEMB_WR() nb_pci_putl(0, 16, 1, 0xc0, 0) +#define NRECFGLOG_WR() \ + nb_pci_putl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0x74 : 0xc4, 0); +#define NRECFBDA_WR() \ + nb_pci_putl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xc4 : 0xc8, 0); +#define NRECFBDB_WR() \ + nb_pci_putl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xc8 : 0xcc, 0); +#define NRECFBDC_WR() \ + nb_pci_putl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xcc : 0xd0, 0); +#define NRECFBDD_WR() \ + nb_pci_putl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xd0 : 0xd4, 0); +#define NRECFBDE_WR() \ + nb_pci_putl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xd4 : 0xd8, 0); +#define NRECFBDF_WR() \ + if (nb_chipset == INTEL_NB_7300) \ + nb_pci_putw(0, 16, 1, 0xd8, 0); +#define REDMEMB_WR() nb_pci_putl(0, 16, 1, 0x7c, 0) +#define RECMEMA_WR() \ + nb_pci_putw(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xe0 : 0xe2, 0) +#define RECMEMB_WR() nb_pci_putl(0, 16, 1, 0xe4, 0) +#define RECFGLOG_WR() \ + nb_pci_putl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0x78 : 0xe8, 0); +#define RECFBDA_WR() \ + nb_pci_putl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xe8 : 0xec, 0); +#define RECFBDB_WR() \ + nb_pci_putl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xec : 0xf0, 0); +#define RECFBDC_WR() \ + nb_pci_putl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xf0 : 0xf4, 0); +#define RECFBDD_WR() \ + nb_pci_putl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xf4 : 0xf8, 0); +#define RECFBDE_WR() \ + nb_pci_putl(0, 16, 1, nb_chipset == INTEL_NB_7300 ? 0xf8 : 0xfc, 0); +#define RECFBDF_WR() \ + if (nb_chipset == INTEL_NB_7300) \ + nb_pci_putw(0, 16, 1, 0xf8, 0); \ #define MC_RD() nb_pci_getl(0, 16, 1, 0x40, 0) #define MC_WR(val) nb_pci_putl(0, 16, 1, 0x40, val) diff --git a/usr/src/uts/i86pc/io/intel_nb5000/nb5000_init.c b/usr/src/uts/i86pc/io/intel_nb5000/nb5000_init.c index a5c55b46ae..19812b5b49 100644 --- a/usr/src/uts/i86pc/io/intel_nb5000/nb5000_init.c +++ b/usr/src/uts/i86pc/io/intel_nb5000/nb5000_init.c @@ -20,7 +20,7 @@ */ /* - * Copyright 2007 Sun Microsystems, Inc. All rights reserved. + * Copyright 2008 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -62,8 +62,8 @@ nb_dimm_t **nb_dimms; int nb_ndimm; uint32_t nb_chipset; enum nb_memory_mode nb_mode; -bank_select_t nb_banks[NB_MEM_BRANCH_SELECT]; -rank_select_t nb_ranks[NB_5000_MAX_MEM_CONTROLLERS][NB_MEM_RANK_SELECT]; +bank_select_t nb_banks[NB_MAX_MEM_BRANCH_SELECT]; +rank_select_t nb_ranks[NB_5000_MAX_MEM_CONTROLLERS][NB_MAX_MEM_RANK_SELECT]; uint32_t top_of_low_memory; uint8_t spare_rank[NB_5000_MAX_MEM_CONTROLLERS]; @@ -254,8 +254,6 @@ nb_dimm_init(int channel, int dimm, uint16_t mtr) spd_sz = 176; else spd_sz = 256; - if (mtr & 0x10) - dp->mtr_present = 1; dp->manufacture_id = read_spd_eeprom(channel, dimm, 117) | (read_spd_eeprom(channel, dimm, 118) << 8); dp->manufacture_location = read_spd_eeprom(channel, dimm, 119); @@ -277,6 +275,7 @@ nb_dimm_init(int channel, int dimm, uint16_t mtr) read_spd_eeprom(channel, dimm, 146 + i); } } + dp->mtr_present = MTR_PRESENT(mtr); dp->nranks = MTR_NUMRANK(mtr); dp->nbanks = MTR_NUMBANK(mtr); dp->ncolumn = MTR_NUMCOL(mtr); diff --git a/usr/src/uts/i86pc/io/intel_nb5000/nb_log.h b/usr/src/uts/i86pc/io/intel_nb5000/nb_log.h index bdd68b029d..adbe6ca67c 100644 --- a/usr/src/uts/i86pc/io/intel_nb5000/nb_log.h +++ b/usr/src/uts/i86pc/io/intel_nb5000/nb_log.h @@ -20,7 +20,7 @@ */ /* - * Copyright 2007 Sun Microsystems, Inc. All rights reserved. + * Copyright 2008 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -94,6 +94,7 @@ typedef struct nb_fat_fbd { uint32_t nrecfbdc; /* non recoverable dimm log C */ uint32_t nrecfbdd; /* non recoverable dimm log D */ uint32_t nrecfbde; /* non recoverable dimm log E */ + uint32_t nrecfbdf; /* non recoverable dimm log F */ uint32_t spcpc; /* spare copy control */ uint8_t spcps; /* spare copy status */ uint32_t uerrcnt; /* uncorrectable error count */ @@ -115,6 +116,7 @@ typedef struct nb_nf_fbd { uint32_t recfbdc; /* recoverable dimm log C */ uint32_t recfbdd; /* recoverable dimm log D */ uint32_t recfbde; /* recoverable dimm log E */ + uint32_t recfbdf; /* recoverable dimm log F */ uint32_t spcpc; /* spare copy control */ uint8_t spcps; /* spare copy status */ uint32_t cerrcnt; /* correctable error count */ @@ -226,8 +228,9 @@ extern void nb_dev_reinit(void); extern void nb_unload(void); extern void nb_dev_unload(void); extern uint32_t top_of_low_memory; -extern bank_select_t nb_banks[NB_MEM_BRANCH_SELECT]; -extern rank_select_t nb_ranks[NB_5000_MAX_MEM_CONTROLLERS][NB_MEM_RANK_SELECT]; +extern bank_select_t nb_banks[NB_MAX_MEM_BRANCH_SELECT]; +extern rank_select_t nb_ranks[NB_5000_MAX_MEM_CONTROLLERS] + [NB_MAX_MEM_RANK_SELECT]; extern uint8_t spare_rank[NB_5000_MAX_MEM_CONTROLLERS]; extern enum nb_memory_mode nb_mode; diff --git a/usr/src/uts/intel/sys/mc_intel.h b/usr/src/uts/intel/sys/mc_intel.h index 1ade228526..ba955e1686 100644 --- a/usr/src/uts/intel/sys/mc_intel.h +++ b/usr/src/uts/intel/sys/mc_intel.h @@ -20,7 +20,7 @@ */ /* - * Copyright 2007 Sun Microsystems, Inc. All rights reserved. + * Copyright 2008 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -100,6 +100,7 @@ extern "C" { #define FM_EREPORT_PAYLOAD_NAME_NRECFBDC "nrecfbdc" #define FM_EREPORT_PAYLOAD_NAME_NRECFBDD "nrecfbdd" #define FM_EREPORT_PAYLOAD_NAME_NRECFBDE "nrecfbde" +#define FM_EREPORT_PAYLOAD_NAME_NRECFBDF "nrecfbdf" #define FM_EREPORT_PAYLOAD_NAME_SPCPC "spcpc" #define FM_EREPORT_PAYLOAD_NAME_SPCPS "spcps" #define FM_EREPORT_PAYLOAD_NAME_UERRCNT "uerrcnt" @@ -123,6 +124,7 @@ extern "C" { #define FM_EREPORT_PAYLOAD_NAME_RECFBDC "recfbdc" #define FM_EREPORT_PAYLOAD_NAME_RECFBDD "recfbdd" #define FM_EREPORT_PAYLOAD_NAME_RECFBDE "recfbde" +#define FM_EREPORT_PAYLOAD_NAME_RECFBDF "recfbdf" #define FM_EREPORT_PAYLOAD_NAME_CERRCNT "cerrcnt" #define FM_EREPORT_PAYLOAD_NAME_CERRCNT_LAST "cerrcnt_last" #define FM_EREPORT_PAYLOAD_NAME_PCISTS "pcists" |