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| author | Robert Mustacchi <rm@joyent.com> | 2018-04-20 16:22:09 +0000 |
|---|---|---|
| committer | Robert Mustacchi <rm@joyent.com> | 2019-01-10 16:48:20 +0000 |
| commit | 2a613b5974ae49c8b068a3998ff554f8c6f0f593 (patch) | |
| tree | 7dc7eeca86a6b4b671f6c1e06fe0e81c1e4b9207 /usr/src/uts/i86pc/os/cmi_hw.c | |
| parent | ca13eaa51ee900abba73dfb6624e492f7e48863e (diff) | |
| download | illumos-gate-2a613b5974ae49c8b068a3998ff554f8c6f0f593.tar.gz | |
9747 Implement CPU autoreplace based on Intel PPIN
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>
Reviewed by: Rob Johnston <rob.johnston@joyent.com>
Reviewed by: Richard Lowe <richlowe@richlowe.net>
Approved by: Dan McDonald <danmcd@joyent.com>
Diffstat (limited to 'usr/src/uts/i86pc/os/cmi_hw.c')
| -rw-r--r-- | usr/src/uts/i86pc/os/cmi_hw.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/usr/src/uts/i86pc/os/cmi_hw.c b/usr/src/uts/i86pc/os/cmi_hw.c index be119e7046..f3fa68400e 100644 --- a/usr/src/uts/i86pc/os/cmi_hw.c +++ b/usr/src/uts/i86pc/os/cmi_hw.c @@ -21,6 +21,7 @@ /* * Copyright (c) 2007, 2010, Oracle and/or its affiliates. All rights reserved. + * Copyright (c) 2018, Joyent, Inc. */ /* * Copyright (c) 2010, Intel Corporation. @@ -121,6 +122,7 @@ struct cmi_hdl_ops { const char *(*cmio_chiprevstr)(cmi_hdl_impl_t *); uint32_t (*cmio_getsockettype)(cmi_hdl_impl_t *); const char *(*cmio_getsocketstr)(cmi_hdl_impl_t *); + uint_t (*cmio_chipsig)(cmi_hdl_impl_t *); id_t (*cmio_logical_id)(cmi_hdl_impl_t *); /* @@ -684,6 +686,12 @@ ntv_getsocketstr(cmi_hdl_impl_t *hdl) return (cpuid_getsocketstr(HDLPRIV(hdl))); } +static uint_t +ntv_chipsig(cmi_hdl_impl_t *hdl) +{ + return (cpuid_getsig(HDLPRIV(hdl))); +} + static id_t ntv_logical_id(cmi_hdl_impl_t *hdl) { @@ -997,6 +1005,13 @@ xpv_getsocketstr(cmi_hdl_impl_t *hdl) xpv_model(hdl), xpv_stepping(hdl))); } +/* ARGSUSED */ +static uint_t +xpv_chipsig(cmi_hdl_impl_t *hdl) +{ + return (0); +} + static id_t xpv_logical_id(cmi_hdl_impl_t *hdl) { @@ -1595,6 +1610,7 @@ cmi_hdl_class(cmi_hdl_t ophdl) cmio_##what(IMPLHDL(ophdl))); \ } +/* BEGIN CSTYLED */ CMI_HDL_OPFUNC(vendor, uint_t) CMI_HDL_OPFUNC(vendorstr, const char *) CMI_HDL_OPFUNC(family, uint_t) @@ -1614,6 +1630,8 @@ CMI_HDL_OPFUNC(logical_id, id_t) CMI_HDL_OPFUNC(smbiosid, uint16_t) CMI_HDL_OPFUNC(smb_chipid, uint_t) CMI_HDL_OPFUNC(smb_bboard, nvlist_t *) +CMI_HDL_OPFUNC(chipsig, uint_t) +/* END CSTYLED */ boolean_t cmi_hdl_is_cmt(cmi_hdl_t ophdl) @@ -1990,6 +2008,7 @@ static const struct cmi_hdl_ops cmi_hdl_ops = { xpv_chiprevstr, /* cmio_chiprevstr */ xpv_getsockettype, /* cmio_getsockettype */ xpv_getsocketstr, /* cmio_getsocketstr */ + xpv_chipsig, /* cmio_chipsig */ xpv_logical_id, /* cmio_logical_id */ NULL, /* cmio_getcr4 */ NULL, /* cmio_setcr4 */ @@ -2022,6 +2041,7 @@ static const struct cmi_hdl_ops cmi_hdl_ops = { ntv_chiprevstr, /* cmio_chiprevstr */ ntv_getsockettype, /* cmio_getsockettype */ ntv_getsocketstr, /* cmio_getsocketstr */ + ntv_chipsig, /* cmio_chipsig */ ntv_logical_id, /* cmio_logical_id */ ntv_getcr4, /* cmio_getcr4 */ ntv_setcr4, /* cmio_setcr4 */ |