From f226ceedc64a2db2c8016f3de28194d222fec764 Mon Sep 17 00:00:00 2001 From: Robert Mustacchi Date: Thu, 14 Jun 2018 15:55:36 +0000 Subject: 9744 invalidate cache before microcode update Reviewed by: John Levon Reviewed by: Andy Fiddaman Reviewed by: Richard Lowe Approved by: Dan McDonald --- usr/src/uts/i86pc/os/microcode.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) (limited to 'usr/src/uts/i86pc/os/microcode.c') diff --git a/usr/src/uts/i86pc/os/microcode.c b/usr/src/uts/i86pc/os/microcode.c index e59bdb8530..afc48953f5 100644 --- a/usr/src/uts/i86pc/os/microcode.c +++ b/usr/src/uts/i86pc/os/microcode.c @@ -24,6 +24,7 @@ * Use is subject to license terms. * * Copyright 2012 Nexenta Systems, Inc. All rights reserved. + * Copyright (c) 2018, Joyent, Inc. */ #include @@ -754,8 +755,15 @@ ucode_write(xc_arg_t arg1, xc_arg_t unused2, xc_arg_t unused3) return (0); } - if (!on_trap(&otd, OT_DATA_ACCESS)) + if (!on_trap(&otd, OT_DATA_ACCESS)) { + /* + * On some platforms a cache invalidation is required for the + * ucode update to be successful due to the parts of the + * processor that the microcode is updating. + */ + invalidate_cache(); wrmsr(ucode->write_msr, (uintptr_t)uusp->ucodep); + } no_trap(); #endif @@ -849,6 +857,12 @@ ucode_load_intel(ucode_file_t *ufp, cpu_ucode_info_t *uinfop, cpu_t *cp) uus.new_rev = uinfop->cui_rev; #else kpreempt_disable(); + /* + * On some platforms a cache invalidation is required for the + * ucode update to be successful due to the parts of the + * processor that the microcode is updating. + */ + invalidate_cache(); wrmsr(ucode->write_msr, (uintptr_t)ucodefp->uf_body); ucode->read_rev(uinfop); kpreempt_enable(); -- cgit v1.2.3