diff options
| author | Patrick Mooney <pmooney@pfmooney.com> | 2019-05-16 19:23:22 +0000 |
|---|---|---|
| committer | Patrick Mooney <pmooney@pfmooney.com> | 2019-05-17 18:11:59 +0000 |
| commit | 8bab6c89a8b6b113b13e1cca5a6dc469de70ef77 (patch) | |
| tree | c8fb9b2f299e247f7e255a1a0503444575964487 | |
| parent | 9dc0ec47175e096cf43e85a5cb88d6c8b0f61539 (diff) | |
| download | illumos-joyent-8bab6c89a8b6b113b13e1cca5a6dc469de70ef77.tar.gz | |
OS-7801 bhyve should expose MD_CLEAR capability
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>
Approved by: Jerry Jelinek <jerry.jelinek@joyent.com>
| -rw-r--r-- | usr/contrib/freebsd/x86/specialreg.h | 6 | ||||
| -rw-r--r-- | usr/src/compat/freebsd/amd64/machine/specialreg.h | 4 | ||||
| -rw-r--r-- | usr/src/uts/i86pc/io/vmm/x86.c | 2 |
3 files changed, 10 insertions, 2 deletions
diff --git a/usr/contrib/freebsd/x86/specialreg.h b/usr/contrib/freebsd/x86/specialreg.h index 5e223fa60d..ef78e9a0af 100644 --- a/usr/contrib/freebsd/x86/specialreg.h +++ b/usr/contrib/freebsd/x86/specialreg.h @@ -77,6 +77,7 @@ #define CR4_XSAVE 0x00040000 /* XSETBV/XGETBV */ #define CR4_SMEP 0x00100000 /* Supervisor-Mode Execution Prevention */ #define CR4_SMAP 0x00200000 /* Supervisor-Mode Access Prevention */ +#define CR4_PKE 0x00400000 /* Protection Keys Enable */ /* * Bits in AMD64 special registers. EFER is 64 bits wide. @@ -447,6 +448,8 @@ /* * CPUID instruction 7 Structured Extended Features, leaf 0 edx info */ +#define CPUID_STDEXT3_MD_CLEAR 0x00000400 +#define CPUID_STDEXT3_TSXFA 0x00002000 #define CPUID_STDEXT3_IBPB 0x04000000 #define CPUID_STDEXT3_STIBP 0x08000000 #define CPUID_STDEXT3_L1D_FLUSH 0x10000000 @@ -460,6 +463,7 @@ #define IA32_ARCH_CAP_RSBA 0x00000004 #define IA32_ARCH_CAP_SKIP_L1DFL_VMENTRY 0x00000008 #define IA32_ARCH_CAP_SSB_NO 0x00000010 +#define IA32_ARCH_CAP_MDS_NO 0x00000020 /* * CPUID manufacturers identifiers @@ -505,6 +509,7 @@ #define MSR_MTRRcap 0x0fe #define MSR_IA32_ARCH_CAP 0x10a #define MSR_IA32_FLUSH_CMD 0x10b +#define MSR_TSX_FORCE_ABORT 0x10f #define MSR_BBL_CR_ADDR 0x116 #define MSR_BBL_CR_DECC 0x118 #define MSR_BBL_CR_CTL 0x119 @@ -1041,6 +1046,7 @@ #define MSR_FSBASE 0xc0000100 /* base address of the %fs "segment" */ #define MSR_GSBASE 0xc0000101 /* base address of the %gs "segment" */ #define MSR_KGSBASE 0xc0000102 /* base address of the kernel %gs */ +#define MSR_TSC_AUX 0xc0000103 #define MSR_PERFEVSEL0 0xc0010000 #define MSR_PERFEVSEL1 0xc0010001 #define MSR_PERFEVSEL2 0xc0010002 diff --git a/usr/src/compat/freebsd/amd64/machine/specialreg.h b/usr/src/compat/freebsd/amd64/machine/specialreg.h index e1e6543701..ead63aaaab 100644 --- a/usr/src/compat/freebsd/amd64/machine/specialreg.h +++ b/usr/src/compat/freebsd/amd64/machine/specialreg.h @@ -10,7 +10,7 @@ */ /* - * Copyright 2017 Joyent, Inc. + * Copyright 2019 Joyent, Inc. */ #ifndef _COMPAT_FREEBSD_AMD64_MACHINE_SPECIALREG_H_ @@ -37,6 +37,7 @@ #undef CR4_VMXE #undef CR4_SMEP #undef CR4_SMAP +#undef CR4_PKE #undef CR4_FSGSBASE #undef CR4_PCIDE #endif /* _SYS_CONTROLREGS_H */ @@ -48,6 +49,7 @@ #undef IA32_ARCH_CAP_RSBA #undef IA32_ARCH_CAP_SKIP_L1DFL_VMENTRY #undef IA32_ARCH_CAP_SSB_NO +#undef IA32_ARCH_CAP_MDS_NO #undef IA32_SPEC_CTRL_IBRS #undef IA32_SPEC_CTRL_STIBP #undef IA32_SPEC_CTRL_SSBD diff --git a/usr/src/uts/i86pc/io/vmm/x86.c b/usr/src/uts/i86pc/io/vmm/x86.c index b126e96f2c..2ffa80b335 100644 --- a/usr/src/uts/i86pc/io/vmm/x86.c +++ b/usr/src/uts/i86pc/io/vmm/x86.c @@ -455,7 +455,7 @@ x86_emulate_cpuid(struct vm *vm, int vcpu_id, CPUID_STDEXT_AVX512ER | CPUID_STDEXT_AVX512CD | CPUID_STDEXT_SHA); regs[2] = 0; - regs[3] = 0; + regs[3] &= CPUID_STDEXT3_MD_CLEAR; /* Advertise INVPCID if it is enabled. */ error = vm_get_capability(vm, vcpu_id, |