diff options
| author | Jerry Jelinek <jerry.jelinek@joyent.com> | 2019-11-25 12:33:18 +0000 |
|---|---|---|
| committer | Jerry Jelinek <jerry.jelinek@joyent.com> | 2019-11-25 12:33:18 +0000 |
| commit | 70102ef7b7b71b21e8fae6172bf09af8d95c02f2 (patch) | |
| tree | dc2bcefd82969b2fffb222dca0391cac46ca66a3 | |
| parent | def8eb24e347b55aeaeb27f7e650cafc9ad35a5f (diff) | |
| parent | aefa9c84b0a900bedba3a7ed885f0ea75f3fe1ea (diff) | |
| download | illumos-joyent-70102ef7b7b71b21e8fae6172bf09af8d95c02f2.tar.gz | |
[illumos-gate merge]
commit aefa9c84b0a900bedba3a7ed885f0ea75f3fe1ea
12015 vioif with MSI-X not working on Google Compute Engine
commit c00b0288a75782c75abd0b9959021fd2417c8a28
12014 virtio_init_complete() comment should describe interrupt type parameter
commit d1f3e3c647f14e2496e646bb7ef0df729cbbf72a
11798 apix: cast between incompatible function types
commit 027bcc9f64a0a5915089267b0dc54c9ee05782b0
11797 i86pc: cast between incompatible function types
23 files changed, 157 insertions, 93 deletions
diff --git a/usr/src/uts/common/io/vioif/vioif.c b/usr/src/uts/common/io/vioif/vioif.c index a97dd9deca..e1535182b3 100644 --- a/usr/src/uts/common/io/vioif/vioif.c +++ b/usr/src/uts/common/io/vioif/vioif.c @@ -13,6 +13,7 @@ * Copyright 2013 Nexenta Inc. All rights reserved. * Copyright (c) 2014, 2016 by Delphix. All rights reserved. * Copyright 2019 Joyent, Inc. + * Copyright 2019 Joshua M. Clulow <josh@sysmgr.org> */ /* Based on the NetBSD virtio driver by Minoura Makoto. */ @@ -62,6 +63,7 @@ #include <sys/ethernet.h> #include <sys/vlan.h> #include <sys/sysmacros.h> +#include <sys/smbios.h> #include <sys/dlpi.h> #include <sys/taskq.h> @@ -180,6 +182,13 @@ static const uchar_t vioif_broadcast[ETHERADDRL] = { uint_t vioif_reclaim_ms = 200; /* + * Allow the operator to override the kinds of interrupts we'll use for + * vioif. This value defaults to -1 so that it can be overridden to 0 in + * /etc/system. + */ +int vioif_allowed_int_types = -1; + +/* * DMA attribute template for transmit and receive buffers. The SGL entry * count will be modified before using the template. Note that these * allocations are aligned so that VIOIF_HEADER_SKIP places the IP header in @@ -1576,6 +1585,45 @@ vioif_check_features(vioif_t *vif) } static int +vioif_select_interrupt_types(void) +{ + id_t id; + smbios_system_t sys; + smbios_info_t info; + + if (vioif_allowed_int_types != -1) { + /* + * If this value was tuned via /etc/system or the debugger, + * use the provided value directly. + */ + return (vioif_allowed_int_types); + } + + if ((id = smbios_info_system(ksmbios, &sys)) == SMB_ERR || + smbios_info_common(ksmbios, id, &info) == SMB_ERR) { + /* + * The system may not have valid SMBIOS data, so ignore a + * failure here. + */ + return (0); + } + + if (strcmp(info.smbi_manufacturer, "Google") == 0 && + strcmp(info.smbi_product, "Google Compute Engine") == 0) { + /* + * An undiagnosed issue with the Google Compute Engine (GCE) + * hypervisor exists. In this environment, no RX interrupts + * are received if MSI-X handlers are installed. This does not + * appear to be true for the Virtio SCSI driver. Fixed + * interrupts do appear to work, so we fall back for now: + */ + return (DDI_INTR_TYPE_FIXED); + } + + return (0); +} + +static int vioif_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) { int ret; @@ -1605,7 +1653,8 @@ vioif_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) goto fail; } - if (virtio_init_complete(vio, 0) != DDI_SUCCESS) { + if (virtio_init_complete(vio, vioif_select_interrupt_types()) != + DDI_SUCCESS) { dev_err(dip, CE_WARN, "failed to complete Virtio init"); goto fail; } diff --git a/usr/src/uts/common/io/virtio/virtio_impl.h b/usr/src/uts/common/io/virtio/virtio_impl.h index 518667c7f4..af786583f4 100644 --- a/usr/src/uts/common/io/virtio/virtio_impl.h +++ b/usr/src/uts/common/io/virtio/virtio_impl.h @@ -258,7 +258,7 @@ struct virtio_vq_elem { /* * This structure is variously known as the "used" ring, or the device-owned * portion of the queue structure. It is used by the device to return - * completed descriptor chains to the device. + * completed descriptor chains to the driver. */ struct virtio_vq_device { uint16_t vqde_flags; diff --git a/usr/src/uts/common/io/virtio/virtio_main.c b/usr/src/uts/common/io/virtio/virtio_main.c index cb81142a53..04b22709e8 100644 --- a/usr/src/uts/common/io/virtio/virtio_main.c +++ b/usr/src/uts/common/io/virtio/virtio_main.c @@ -323,7 +323,9 @@ virtio_init(dev_info_t *dip, uint64_t driver_features, boolean_t allow_indirect) /* * This function must be called by the driver once it has completed early setup - * calls. + * calls. The value of "allowed_interrupt_types" is a mask of interrupt types + * (DDI_INTR_TYPE_MSIX, etc) that we'll try to use when installing handlers, or + * the special value 0 to allow the system to use any available type. */ int virtio_init_complete(virtio_t *vio, int allowed_interrupt_types) diff --git a/usr/src/uts/common/os/cap_util.c b/usr/src/uts/common/os/cap_util.c index 530e8d6ba9..4f9b9f5985 100644 --- a/usr/src/uts/common/os/cap_util.c +++ b/usr/src/uts/common/os/cap_util.c @@ -1298,7 +1298,7 @@ static void cu_cpu_kstat_create(pghw_t *pg, cu_cntr_info_t *cntr_info) { kstat_t *ks; - char *sharing = pghw_type_string(pg->pghw_hw); + char *sharing = pghw_type_string(pg->pghw_hw); char name[KSTAT_STRLEN + 1]; /* @@ -1417,7 +1417,7 @@ cu_cpu_run(cpu_t *cp, cu_cpu_func_t func, uintptr_t arg) * cpu_call() will call func on the CPU specified with given argument * and return func's return value in last argument */ - cpu_call(cp, (cpu_call_func_t)func, arg, (uintptr_t)&error); + cpu_call(cp, (cpu_call_func_t)(uintptr_t)func, arg, (uintptr_t)&error); return (error); } @@ -1471,7 +1471,7 @@ cu_cpu_update(struct cpu *cp, boolean_t move_to) */ retval = 0; if (move_to) - (void) cu_cpu_run(cp, (cu_cpu_func_t)kcpc_read, + (void) cu_cpu_run(cp, (cu_cpu_func_t)(uintptr_t)kcpc_read, (uintptr_t)cu_cpu_update_stats); else { retval = kcpc_read((kcpc_update_func_t)cu_cpu_update_stats); diff --git a/usr/src/uts/common/vm/seg_kmem.c b/usr/src/uts/common/vm/seg_kmem.c index 0b116d6eba..15666a7da3 100644 --- a/usr/src/uts/common/vm/seg_kmem.c +++ b/usr/src/uts/common/vm/seg_kmem.c @@ -440,7 +440,7 @@ segkmem_badop() panic("segkmem_badop"); } -#define SEGKMEM_BADOP(t) (t(*)())segkmem_badop +#define SEGKMEM_BADOP(t) (t(*)())(uintptr_t)segkmem_badop /*ARGSUSED*/ static faultcode_t @@ -1224,7 +1224,7 @@ static void segkmem_free_one_lp(caddr_t addr, size_t size) { page_t *pp, *rootpp = NULL; - pgcnt_t pgs_left = btopr(size); + pgcnt_t pgs_left = btopr(size); ASSERT(size == segkmem_lpsize); @@ -1424,7 +1424,7 @@ segkmem_free_lpi(vmem_t *vmp, void *inaddr, size_t size) pgcnt_t nlpages = size >> segkmem_lpshift; size_t lpsize = segkmem_lpsize; caddr_t addr = inaddr; - pgcnt_t npages = btopr(size); + pgcnt_t npages = btopr(size); int i; ASSERT(vmp == heap_lp_arena); diff --git a/usr/src/uts/i86pc/io/apix/apix.c b/usr/src/uts/i86pc/io/apix/apix.c index c87abc8ea5..18dee7499a 100644 --- a/usr/src/uts/i86pc/io/apix/apix.c +++ b/usr/src/uts/i86pc/io/apix/apix.c @@ -612,7 +612,7 @@ apix_picinit(void) /* add nmi handler - least priority nmi handler */ LOCK_INIT_CLEAR(&apic_nmi_lock); - if (!psm_add_nmintr(0, (avfunc) apic_nmi_intr, + if (!psm_add_nmintr(0, apic_nmi_intr, "apix NMI handler", (caddr_t)NULL)) cmn_err(CE_WARN, "apix: Unable to add nmi handler"); diff --git a/usr/src/uts/i86pc/io/cbe.c b/usr/src/uts/i86pc/io/cbe.c index 030f667925..2635a013b0 100644 --- a/usr/src/uts/i86pc/io/cbe.c +++ b/usr/src/uts/i86pc/io/cbe.c @@ -68,15 +68,15 @@ extern int tsc_gethrtime_enable; void cbe_hres_tick(void); -int -cbe_softclock(void) +uint_t +cbe_softclock(caddr_t arg1 __unused, caddr_t arg2 __unused) { cyclic_softint(CPU, CY_LOCK_LEVEL); return (1); } -int -cbe_low_level(void) +uint_t +cbe_low_level(caddr_t arg1 __unused, caddr_t arg2 __unused) { cpu_t *cpu = CPU; @@ -90,8 +90,8 @@ cbe_low_level(void) * spurious calls, it would not matter if we called cyclic_fire() in both * cases. */ -int -cbe_fire(void) +uint_t +cbe_fire(caddr_t arg1 __unused, caddr_t arg2 __unused) { cpu_t *cpu = CPU; processorid_t me = cpu->cpu_id, i; @@ -346,21 +346,21 @@ cbe_init(void) cyclic_init(&cbe, cbe_timer_resolution); mutex_exit(&cpu_lock); - (void) add_avintr(NULL, CBE_HIGH_PIL, (avfunc)cbe_fire, + (void) add_avintr(NULL, CBE_HIGH_PIL, cbe_fire, "cbe_fire_master", cbe_vector, 0, NULL, NULL, NULL); if (psm_get_ipivect != NULL) { - (void) add_avintr(NULL, CBE_HIGH_PIL, (avfunc)cbe_fire, + (void) add_avintr(NULL, CBE_HIGH_PIL, cbe_fire, "cbe_fire_slave", (*psm_get_ipivect)(CBE_HIGH_PIL, PSM_INTR_IPI_HI), 0, NULL, NULL, NULL); } (void) add_avsoftintr((void *)&cbe_clock_hdl, CBE_LOCK_PIL, - (avfunc)cbe_softclock, "softclock", NULL, NULL); + cbe_softclock, "softclock", NULL, NULL); (void) add_avsoftintr((void *)&cbe_low_hdl, CBE_LOW_PIL, - (avfunc)cbe_low_level, "low level", NULL, NULL); + cbe_low_level, "low level", NULL, NULL); mutex_enter(&cpu_lock); diff --git a/usr/src/uts/i86pc/io/hpet_acpi.c b/usr/src/uts/i86pc/io/hpet_acpi.c index d65c514fe4..ac5a885a38 100644 --- a/usr/src/uts/i86pc/io/hpet_acpi.c +++ b/usr/src/uts/i86pc/io/hpet_acpi.c @@ -65,9 +65,8 @@ static int hpet_timer_available(uint32_t allocated_timers, uint32_t n); static void hpet_timer_alloc(uint32_t *allocated_timers, uint32_t n); static void hpet_timer_set_up(hpet_info_t *hip, uint32_t timer_n, uint32_t interrupt); -static uint_t hpet_isr(char *arg); -static uint32_t hpet_install_interrupt_handler(uint_t (*func)(char *), - int vector); +static uint_t hpet_isr(caddr_t, caddr_t); +static uint32_t hpet_install_interrupt_handler(avfunc func, int vector); static void hpet_uninstall_interrupt_handler(void); static void hpet_expire_all(void); static boolean_t hpet_guaranteed_schedule(hrtime_t required_wakeup_time); @@ -350,8 +349,7 @@ hpet_install_proxy(void) static void hpet_uninstall_interrupt_handler(void) { - rem_avintr(NULL, CBE_HIGH_PIL, (avfunc)&hpet_isr, - hpet_info.cstate_timer.intr); + rem_avintr(NULL, CBE_HIGH_PIL, &hpet_isr, hpet_info.cstate_timer.intr); } static int @@ -610,11 +608,11 @@ hpet_enable_timer(hpet_info_t *hip, uint32_t timer_n) * apic_init() psm_ops entry point. */ static uint32_t -hpet_install_interrupt_handler(uint_t (*func)(char *), int vector) +hpet_install_interrupt_handler(avfunc func, int vector) { uint32_t retval; - retval = add_avintr(NULL, CBE_HIGH_PIL, (avfunc)func, "HPET Timer", + retval = add_avintr(NULL, CBE_HIGH_PIL, func, "HPET Timer", vector, NULL, NULL, NULL, NULL); if (retval == 0) { cmn_err(CE_WARN, "!hpet_acpi: add_avintr() failed"); @@ -1001,9 +999,8 @@ hpet_cst_callback(uint32_t code) * This ISR runs on one CPU which pokes other CPUs out of Deep C-state as * needed. */ -/* ARGSUSED */ static uint_t -hpet_isr(char *arg) +hpet_isr(caddr_t arg __unused, caddr_t arg1 __unused) { uint64_t timer_status; uint64_t timer_mask; diff --git a/usr/src/uts/i86pc/io/pcplusmp/apic_common.c b/usr/src/uts/i86pc/io/pcplusmp/apic_common.c index e74d8cbf80..e3a0f31cef 100644 --- a/usr/src/uts/i86pc/io/pcplusmp/apic_common.c +++ b/usr/src/uts/i86pc/io/pcplusmp/apic_common.c @@ -363,17 +363,17 @@ apic_cpcovf_mask_clear(void) (apic_reg_ops->apic_read(APIC_PCINT_VECT) & ~APIC_LVT_MASK)); } -/*ARGSUSED*/ static int -apic_cmci_enable(xc_arg_t arg1, xc_arg_t arg2, xc_arg_t arg3) +apic_cmci_enable(xc_arg_t arg1 __unused, xc_arg_t arg2 __unused, + xc_arg_t arg3 __unused) { apic_reg_ops->apic_write(APIC_CMCI_VECT, apic_cmci_vect); return (0); } -/*ARGSUSED*/ static int -apic_cmci_disable(xc_arg_t arg1, xc_arg_t arg2, xc_arg_t arg3) +apic_cmci_disable(xc_arg_t arg1 __unused, xc_arg_t arg2 __unused, + xc_arg_t arg3 __unused) { apic_reg_ops->apic_write(APIC_CMCI_VECT, apic_cmci_vect | AV_MASK); return (0); @@ -497,7 +497,7 @@ apic_cpu_send_SIPI(processorid_t cpun, boolean_t start) /*ARGSUSED1*/ int -apic_cpu_start(processorid_t cpun, caddr_t arg) +apic_cpu_start(processorid_t cpun, caddr_t arg __unused) { ASSERT(MUTEX_HELD(&cpu_lock)); @@ -523,7 +523,7 @@ apic_cpu_start(processorid_t cpun, caddr_t arg) */ /*ARGSUSED1*/ int -apic_cpu_stop(processorid_t cpun, caddr_t arg) +apic_cpu_stop(processorid_t cpun, caddr_t arg __unused) { int rc; cpu_t *cp; @@ -644,15 +644,13 @@ apic_get_pir_ipivect(void) return (apic_pir_vect); } -/*ARGSUSED*/ void -apic_set_idlecpu(processorid_t cpun) +apic_set_idlecpu(processorid_t cpun __unused) { } -/*ARGSUSED*/ void -apic_unset_idlecpu(processorid_t cpun) +apic_unset_idlecpu(processorid_t cpun __unused) { } @@ -805,21 +803,20 @@ gethrtime_again: } /* apic NMI handler */ -/*ARGSUSED*/ -void -apic_nmi_intr(caddr_t arg, struct regs *rp) +uint_t +apic_nmi_intr(caddr_t arg __unused, caddr_t arg1 __unused) { nmi_action_t action = nmi_action; if (apic_shutdown_processors) { apic_disable_local_apic(); - return; + return (DDI_INTR_CLAIMED); } apic_error |= APIC_ERR_NMI; if (!lock_try(&apic_nmi_lock)) - return; + return (DDI_INTR_CLAIMED); apic_num_nmis++; /* @@ -860,6 +857,7 @@ apic_nmi_intr(caddr_t arg, struct regs *rp) } lock_clear(&apic_nmi_lock); + return (DDI_INTR_CLAIMED); } processorid_t @@ -1285,7 +1283,7 @@ apic_clkinit(int hertz) * after filesystems are all unmounted. */ void -apic_preshutdown(int cmd, int fcn) +apic_preshutdown(int cmd __unused, int fcn __unused) { APIC_VERBOSE_POWEROFF(("apic_preshutdown(%d,%d); m=%d a=%d\n", cmd, fcn, apic_poweroff_method, apic_enable_acpi)); @@ -1639,16 +1637,14 @@ apic_intrmap_init(int apic_mode) } } -/*ARGSUSED*/ static void -apic_record_ioapic_rdt(void *intrmap_private, ioapic_rdt_t *irdt) +apic_record_ioapic_rdt(void *intrmap_private __unused, ioapic_rdt_t *irdt) { irdt->ir_hi <<= APIC_ID_BIT_OFFSET; } -/*ARGSUSED*/ static void -apic_record_msi(void *intrmap_private, msi_regs_t *mregs) +apic_record_msi(void *intrmap_private __unused, msi_regs_t *mregs) { mregs->mr_addr = MSI_ADDR_HDR | (MSI_ADDR_RH_FIXED << MSI_ADDR_RH_SHIFT) | diff --git a/usr/src/uts/i86pc/os/cpupm/cpupm_throttle.c b/usr/src/uts/i86pc/os/cpupm/cpupm_throttle.c index b8c37a22c2..874912928e 100644 --- a/usr/src/uts/i86pc/os/cpupm/cpupm_throttle.c +++ b/usr/src/uts/i86pc/os/cpupm/cpupm_throttle.c @@ -153,9 +153,11 @@ read_status(cpu_acpi_handle_t handle, uint32_t *stat) /* * Transition the current processor to the requested throttling state. */ -static void -cpupm_tstate_transition(uint32_t req_state) +static int +cpupm_tstate_transition(xc_arg_t arg1, xc_arg_t arg2 __unused, + xc_arg_t arg3 __unused) { + uint32_t req_state = arg1; cpupm_mach_state_t *mach_state = (cpupm_mach_state_t *)CPU->cpu_m.mcpu_pm_mach_state; cpu_acpi_handle_t handle = mach_state->ms_acpi_handle; @@ -174,7 +176,7 @@ cpupm_tstate_transition(uint32_t req_state) */ ctrl = CPU_ACPI_TSTATE_CTRL(req_tstate); if (write_ctrl(handle, ctrl) != 0) { - return; + return (0); } /* @@ -182,7 +184,7 @@ cpupm_tstate_transition(uint32_t req_state) * no status value comparison is required. */ if (CPU_ACPI_TSTATE_STAT(req_tstate) == 0) { - return; + return (0); } /* Wait until switch is complete, but bound the loop just in case. */ @@ -197,11 +199,14 @@ cpupm_tstate_transition(uint32_t req_state) if (CPU_ACPI_TSTATE_STAT(req_tstate) != stat) { DTRACE_PROBE(throttle_transition_incomplete); } + return (0); } static void cpupm_throttle(cpuset_t set, uint32_t throtl_lvl) { + xc_arg_t xc_arg = (xc_arg_t)throtl_lvl; + /* * If thread is already running on target CPU then just * make the transition request. Otherwise, we'll need to @@ -209,12 +214,12 @@ cpupm_throttle(cpuset_t set, uint32_t throtl_lvl) */ kpreempt_disable(); if (CPU_IN_SET(set, CPU->cpu_id)) { - cpupm_tstate_transition(throtl_lvl); + cpupm_tstate_transition(xc_arg, 0, 0); CPUSET_DEL(set, CPU->cpu_id); } if (!CPUSET_ISNULL(set)) { - xc_call((xc_arg_t)throtl_lvl, 0, 0, - CPUSET2BV(set), (xc_func_t)cpupm_tstate_transition); + xc_call(xc_arg, 0, 0, + CPUSET2BV(set), cpupm_tstate_transition); } kpreempt_enable(); } diff --git a/usr/src/uts/i86pc/os/cpupm/pwrnow.c b/usr/src/uts/i86pc/os/cpupm/pwrnow.c index 437019542a..c7f2415e74 100644 --- a/usr/src/uts/i86pc/os/cpupm/pwrnow.c +++ b/usr/src/uts/i86pc/os/cpupm/pwrnow.c @@ -110,9 +110,11 @@ write_ctrl(cpu_acpi_handle_t handle, uint32_t ctrl) /* * Transition the current processor to the requested state. */ -static void -pwrnow_pstate_transition(uint32_t req_state) +static int +pwrnow_pstate_transition(xc_arg_t arg1, xc_arg_t arg2 __unused, + xc_arg_t arg3 __unused) { + uint32_t req_state = (uint32_t)arg1; cpupm_mach_state_t *mach_state = (cpupm_mach_state_t *)CPU->cpu_m.mcpu_pm_mach_state; cpu_acpi_handle_t handle = mach_state->ms_acpi_handle; @@ -137,6 +139,7 @@ pwrnow_pstate_transition(uint32_t req_state) mach_state->ms_pstate.cma_state.pstate = req_state; cpu_set_curr_clock((uint64_t)CPU_ACPI_FREQ(req_pstate) * 1000000); + return (0); } static void @@ -149,12 +152,12 @@ pwrnow_power(cpuset_t set, uint32_t req_state) */ kpreempt_disable(); if (CPU_IN_SET(set, CPU->cpu_id)) { - pwrnow_pstate_transition(req_state); + (void) pwrnow_pstate_transition(req_state, 0, 0); CPUSET_DEL(set, CPU->cpu_id); } if (!CPUSET_ISNULL(set)) { xc_call((xc_arg_t)req_state, 0, 0, - CPUSET2BV(set), (xc_func_t)pwrnow_pstate_transition); + CPUSET2BV(set), pwrnow_pstate_transition); } kpreempt_enable(); } diff --git a/usr/src/uts/i86pc/os/cpupm/speedstep.c b/usr/src/uts/i86pc/os/cpupm/speedstep.c index 6f3dfab61c..dfd2eebd64 100644 --- a/usr/src/uts/i86pc/os/cpupm/speedstep.c +++ b/usr/src/uts/i86pc/os/cpupm/speedstep.c @@ -126,9 +126,11 @@ write_ctrl(cpu_acpi_handle_t handle, uint32_t ctrl) /* * Transition the current processor to the requested state. */ -void -speedstep_pstate_transition(uint32_t req_state) +int +speedstep_pstate_transition(xc_arg_t arg1, xc_arg_t arg2 __unused, + xc_arg_t arg3 __unused) { + uint32_t req_state = (uint32_t)arg1; cpupm_mach_state_t *mach_state = (cpupm_mach_state_t *)CPU->cpu_m.mcpu_pm_mach_state; cpu_acpi_handle_t handle = mach_state->ms_acpi_handle; @@ -152,6 +154,7 @@ speedstep_pstate_transition(uint32_t req_state) mach_state->ms_pstate.cma_state.pstate = req_state; cpu_set_curr_clock(((uint64_t)CPU_ACPI_FREQ(req_pstate) * 1000000)); + return (0); } static void @@ -164,12 +167,12 @@ speedstep_power(cpuset_t set, uint32_t req_state) */ kpreempt_disable(); if (CPU_IN_SET(set, CPU->cpu_id)) { - speedstep_pstate_transition(req_state); + (void) speedstep_pstate_transition(req_state, 0, 0); CPUSET_DEL(set, CPU->cpu_id); } if (!CPUSET_ISNULL(set)) { xc_call((xc_arg_t)req_state, 0, 0, CPUSET2BV(set), - (xc_func_t)speedstep_pstate_transition); + speedstep_pstate_transition); } kpreempt_enable(); } diff --git a/usr/src/uts/i86pc/os/dtrace_subr.c b/usr/src/uts/i86pc/os/dtrace_subr.c index e8452c0367..53e3d4ddaa 100644 --- a/usr/src/uts/i86pc/os/dtrace_subr.c +++ b/usr/src/uts/i86pc/os/dtrace_subr.c @@ -134,9 +134,10 @@ dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit)) } static int -dtrace_xcall_func(dtrace_xcall_t func, void *arg) +dtrace_xcall_func(xc_arg_t arg1, xc_arg_t arg2, xc_arg_t arg3 __unused) { - (*func)(arg); + dtrace_xcall_t func = (dtrace_xcall_t)arg1; + (*func)((void*)arg2); return (0); } @@ -157,7 +158,7 @@ dtrace_xcall(processorid_t cpu, dtrace_xcall_t func, void *arg) kpreempt_disable(); xc_sync((xc_arg_t)func, (xc_arg_t)arg, 0, CPUSET2BV(set), - (xc_func_t)dtrace_xcall_func); + dtrace_xcall_func); kpreempt_enable(); } diff --git a/usr/src/uts/i86pc/os/fastboot.c b/usr/src/uts/i86pc/os/fastboot.c index 9dbcd456df..8f85bca6f5 100644 --- a/usr/src/uts/i86pc/os/fastboot.c +++ b/usr/src/uts/i86pc/os/fastboot.c @@ -1293,8 +1293,9 @@ err_out: /* ARGSUSED */ static int -fastboot_xc_func(fastboot_info_t *nk, xc_arg_t unused2, xc_arg_t unused3) +fastboot_xc_func(xc_arg_t arg1, xc_arg_t arg2 __unused, xc_arg_t arg3 __unused) { + fastboot_info_t *nk = (fastboot_info_t *)arg1; void (*fastboot_func)(fastboot_info_t *); fastboot_file_t *fb = &nk->fi_files[FASTBOOT_SWTCH]; fastboot_func = (void (*)())(fb->fb_va); @@ -1372,11 +1373,11 @@ fast_reboot() CPUSET_ZERO(cpuset); CPUSET_ADD(cpuset, bootcpuid); xc_priority((xc_arg_t)&newkernel, 0, 0, CPUSET2BV(cpuset), - (xc_func_t)fastboot_xc_func); + fastboot_xc_func); panic_idle(); } else - (void) fastboot_xc_func(&newkernel, 0, 0); + (void) fastboot_xc_func((xc_arg_t)&newkernel, 0, 0); } diff --git a/usr/src/uts/i86pc/os/machdep.c b/usr/src/uts/i86pc/os/machdep.c index e3c03dbe02..45e4d41aad 100644 --- a/usr/src/uts/i86pc/os/machdep.c +++ b/usr/src/uts/i86pc/os/machdep.c @@ -409,7 +409,7 @@ stop_other_cpus(void) cpuset_t xcset; CPUSET_ALL_BUT(xcset, CPU->cpu_id); - xc_priority(0, 0, 0, CPUSET2BV(xcset), (xc_func_t)mach_cpu_halt); + xc_priority(0, 0, 0, CPUSET2BV(xcset), mach_cpu_halt); restore_int_flag(s); } diff --git a/usr/src/uts/i86pc/os/mp_call.c b/usr/src/uts/i86pc/os/mp_call.c index df18f16588..2b60e280fd 100644 --- a/usr/src/uts/i86pc/os/mp_call.c +++ b/usr/src/uts/i86pc/os/mp_call.c @@ -37,7 +37,7 @@ /* * Interrupt another CPU. - * This is useful to make the other CPU go through a trap so that + * This is useful to make the other CPU go through a trap so that * it recognizes an address space trap (AST) for preempting a thread. * * It is possible to be preempted here and be resumed on the CPU @@ -87,7 +87,7 @@ cpu_call(cpu_t *cp, cpu_call_func_t func, uintptr_t arg1, uintptr_t arg2) } else { CPUSET_ONLY(set, cp->cpu_id); xc_call((xc_arg_t)arg1, (xc_arg_t)arg2, 0, CPUSET2BV(set), - (xc_func_t)func); + (xc_func_t)(uintptr_t)func); } kpreempt_enable(); } diff --git a/usr/src/uts/i86pc/os/mp_pc.c b/usr/src/uts/i86pc/os/mp_pc.c index e7b7142b17..331981e955 100644 --- a/usr/src/uts/i86pc/os/mp_pc.c +++ b/usr/src/uts/i86pc/os/mp_pc.c @@ -440,15 +440,18 @@ mach_cpucontext_free(struct cpu *cp, void *arg, int err) /* * "Enter monitor." Called via cross-call from stop_other_cpus(). */ -void -mach_cpu_halt(char *msg) +int +mach_cpu_halt(xc_arg_t arg1, xc_arg_t arg2 __unused, xc_arg_t arg3 __unused) { + char *msg = (char *)arg1; + if (msg) prom_printf("%s\n", msg); /*CONSTANTCONDITION*/ while (1) ; + return (0); } void diff --git a/usr/src/uts/i86pc/os/startup.c b/usr/src/uts/i86pc/os/startup.c index 9d9765cb2c..64193f62d2 100644 --- a/usr/src/uts/i86pc/os/startup.c +++ b/usr/src/uts/i86pc/os/startup.c @@ -2328,7 +2328,7 @@ startup_end(void) */ for (i = DDI_IPL_1; i <= DDI_IPL_10; i++) { (void) add_avsoftintr((void *)&softlevel_hdl[i-1], i, - (avfunc)ddi_periodic_softintr, "ddi_periodic", + (avfunc)(uintptr_t)ddi_periodic_softintr, "ddi_periodic", (caddr_t)(uintptr_t)i, NULL); } diff --git a/usr/src/uts/i86pc/sys/apic_common.h b/usr/src/uts/i86pc/sys/apic_common.h index eeee3c8a6a..440f817beb 100644 --- a/usr/src/uts/i86pc/sys/apic_common.h +++ b/usr/src/uts/i86pc/sys/apic_common.h @@ -167,7 +167,7 @@ extern int apic_stretch_ISR; /* IPL of 3 matches nothing now */ extern cyclic_id_t apic_cyclic_id; -extern void apic_nmi_intr(caddr_t arg, struct regs *rp); +extern uint_t apic_nmi_intr(caddr_t arg, caddr_t); extern int apic_clkinit(); extern hrtime_t apic_gettime(); extern hrtime_t apic_gethrtime(); diff --git a/usr/src/uts/i86pc/sys/machsystm.h b/usr/src/uts/i86pc/sys/machsystm.h index 7f9559a7da..5f286ca4c6 100644 --- a/usr/src/uts/i86pc/sys/machsystm.h +++ b/usr/src/uts/i86pc/sys/machsystm.h @@ -71,7 +71,7 @@ typedef struct mach_cpu_add_arg { } mach_cpu_add_arg_t; extern void mach_cpu_idle(void); -extern void mach_cpu_halt(char *); +extern int mach_cpu_halt(xc_arg_t, xc_arg_t, xc_arg_t); extern int mach_cpu_start(cpu_t *, void *); extern int mach_cpuid_start(processorid_t, void *); extern int mach_cpu_stop(cpu_t *, void *); @@ -107,8 +107,8 @@ struct memconf { struct system_hardware { int hd_nodes; /* number of nodes */ - int hd_cpus_per_node; /* max cpus in a node */ - struct memconf hd_mem[MAXNODES]; + int hd_cpus_per_node; /* max cpus in a node */ + struct memconf hd_mem[MAXNODES]; /* * memory layout for each * node. diff --git a/usr/src/uts/i86xpv/os/mp_xen.c b/usr/src/uts/i86xpv/os/mp_xen.c index 3f24dc1d84..fb41f72b0b 100644 --- a/usr/src/uts/i86xpv/os/mp_xen.c +++ b/usr/src/uts/i86xpv/os/mp_xen.c @@ -558,12 +558,15 @@ mach_cpu_pause(volatile char *safe) } } -void -mach_cpu_halt(char *msg) +int +mach_cpu_halt(xc_arg_t arg1, xc_arg_t arg2 __unused, xc_arg_t arg3 __unused) { + char *msg = (char *)arg1; + if (msg) prom_printf("%s\n", msg); (void) xen_vcpu_down(CPU->cpu_id); + return (0); } /*ARGSUSED*/ diff --git a/usr/src/uts/intel/ia32/os/desctbls.c b/usr/src/uts/intel/ia32/os/desctbls.c index 8e0a4edd61..30f2500c8a 100644 --- a/usr/src/uts/intel/ia32/os/desctbls.c +++ b/usr/src/uts/intel/ia32/os/desctbls.c @@ -103,7 +103,7 @@ user_desc_t *gdt0; desctbr_t gdt0_default_r; #endif -gate_desc_t *idt0; /* interrupt descriptor table */ +gate_desc_t *idt0; /* interrupt descriptor table */ #if defined(__i386) desctbr_t idt0_default_r; /* describes idt0 in IDTR format */ #endif @@ -147,10 +147,10 @@ void (*(fasttable[]))(void) = { fast_null, /* T_FNULL routine */ fast_null, /* T_FGETFP routine (initially null) */ fast_null, /* T_FSETFP routine (initially null) */ - (void (*)())get_hrtime, /* T_GETHRTIME */ - (void (*)())gethrvtime, /* T_GETHRVTIME */ - (void (*)())get_hrestime, /* T_GETHRESTIME */ - (void (*)())getlgrp /* T_GETLGRP */ + (void (*)())(uintptr_t)get_hrtime, /* T_GETHRTIME */ + (void (*)())(uintptr_t)gethrvtime, /* T_GETHRVTIME */ + (void (*)())(uintptr_t)get_hrestime, /* T_GETHRESTIME */ + (void (*)())(uintptr_t)getlgrp /* T_GETLGRP */ }; /* @@ -1356,7 +1356,7 @@ void brand_interpositioning_enable(void) { gate_desc_t *idt = CPU->cpu_idt; - int i; + int i; ASSERT(curthread->t_preempt != 0 || getpil() >= DISP_LEVEL); diff --git a/usr/src/uts/intel/kdi/kdi_idt.c b/usr/src/uts/intel/kdi/kdi_idt.c index a5520c72c3..58be698975 100644 --- a/usr/src/uts/intel/kdi/kdi_idt.c +++ b/usr/src/uts/intel/kdi/kdi_idt.c @@ -298,7 +298,8 @@ kdi_cpu_init(void) * loaded at boot. */ static int -kdi_cpu_activate(void) +kdi_cpu_activate(xc_arg_t arg1 __unused, xc_arg_t arg2 __unused, + xc_arg_t arg3 __unused) { kdi_idt_gates_install(KCS_SEL, KDI_IDT_SAVE); return (0); @@ -346,13 +347,13 @@ kdi_activate(kdi_main_t main, kdi_cpusave_t *cpusave, uint_t ncpusave) if (boothowto & RB_KMDB) { kdi_idt_gates_install(KMDBCODE_SEL, KDI_IDT_NOSAVE); } else { - xc_call(0, 0, 0, CPUSET2BV(cpuset), - (xc_func_t)kdi_cpu_activate); + xc_call(0, 0, 0, CPUSET2BV(cpuset), kdi_cpu_activate); } } static int -kdi_cpu_deactivate(void) +kdi_cpu_deactivate(xc_arg_t arg1 __unused, xc_arg_t arg2 __unused, + xc_arg_t arg3 __unused) { kdi_idt_gates_restore(); return (0); @@ -364,7 +365,7 @@ kdi_deactivate(void) cpuset_t cpuset; CPUSET_ALL(cpuset); - xc_call(0, 0, 0, CPUSET2BV(cpuset), (xc_func_t)kdi_cpu_deactivate); + xc_call(0, 0, 0, CPUSET2BV(cpuset), kdi_cpu_deactivate); kdi_nmemranges = 0; } |
