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author | John Levon <john.levon@joyent.com> | 2019-05-07 18:08:49 +0000 |
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committer | John Levon <john.levon@joyent.com> | 2019-05-14 18:05:30 +0000 |
commit | 84b93c8edb4bb1b55e9f0b8411f6cb5261f93133 (patch) | |
tree | 89690e3bcf9d942122bc7f099ee90679eb7dc55f | |
parent | b71842c66920b9f2c33533e7193c840d2d852c37 (diff) | |
download | illumos-joyent-84b93c8edb4bb1b55e9f0b8411f6cb5261f93133.tar.gz |
m
-rw-r--r-- | usr/src/cmd/psradm/psradm.c | 8 | ||||
-rw-r--r-- | usr/src/man/man1m/psradm.1m | 16 | ||||
-rw-r--r-- | usr/src/uts/i86pc/os/smt.c | 11 |
3 files changed, 19 insertions, 16 deletions
diff --git a/usr/src/cmd/psradm/psradm.c b/usr/src/cmd/psradm/psradm.c index c99c410d8e..38e0a7cb84 100644 --- a/usr/src/cmd/psradm/psradm.c +++ b/usr/src/cmd/psradm/psradm.c @@ -59,7 +59,7 @@ usage(void) (void) fprintf(stderr, "usage:\n" "\t%s [-F] -f|-n|-i|-s [-v] processor_id ...\n" "\t%s -a -f|-n|-i [-v]\n" - "\t%s -aH [-v]\n", + "\t%s -aS [-v]\n", cmdname, cmdname, cmdname); } @@ -228,7 +228,7 @@ main(int argc, char *argv[]) cmdname = basename(argv[0]); - while ((c = getopt(argc, argv, "afFHinsv")) != EOF) { + while ((c = getopt(argc, argv, "afFSinsv")) != EOF) { switch (c) { case 'a': /* applies to all possible CPUs */ @@ -239,7 +239,7 @@ main(int argc, char *argv[]) force = 1; break; - case 'H': + case 'S': disable_smt = 1; break; @@ -269,7 +269,7 @@ main(int argc, char *argv[]) if (disable_smt) { if (!all_flag) { - fprintf(stderr, "%s: -H must be used with -a.\n", + fprintf(stderr, "%s: -S must be used with -a.\n", cmdname); usage(); return (2); diff --git a/usr/src/man/man1m/psradm.1m b/usr/src/man/man1m/psradm.1m index 71ccd121c9..20c65f108a 100644 --- a/usr/src/man/man1m/psradm.1m +++ b/usr/src/man/man1m/psradm.1m @@ -21,7 +21,7 @@ psradm \- change processor operational status .LP .nf -\fBpsradm\fR \fB-aH\fR [\fB-v\fR] +\fBpsradm\fR \fB-aS\fR [\fB-v\fR] .fi .SH DESCRIPTION @@ -57,7 +57,7 @@ A \fBno-intr\fR processor processes \fBLWPs\fR but is not interruptible by I/O devices. .sp .LP -With the \fB-aH\fR option, simultaneous multi-threading is disabled. The -a +With the \fB-aS\fR option, simultaneous multi-threading is disabled. The -a option means "apply to every core" and is currently required. Each CPU core has its SMT siblings in the \fBdisabled\fR state, and will effectively stay unused. That is, only one CPU in each core will be processing I/O, scheduling processes, @@ -126,28 +126,28 @@ processor state transition. .sp .ne 2 .na -\fB\fB-H\fR\fR +\fB\fB-i\fR\fR .ad .RS 6n -Disable simultaneous multi-threading (hyper-threading). +Set the specified processors \fBno-intr\fR. .RE .sp .ne 2 .na -\fB\fB-i\fR\fR +\fB\fB-n\fR\fR .ad .RS 6n -Set the specified processors \fBno-intr\fR. +Bring the specified processors \fBon-line\fR. .RE .sp .ne 2 .na -\fB\fB-n\fR\fR +\fB\fB-S\fR\fR .ad .RS 6n -Bring the specified processors \fBon-line\fR. +Disable simultaneous multi-threading (hyper-threading). .RE .sp diff --git a/usr/src/uts/i86pc/os/smt.c b/usr/src/uts/i86pc/os/smt.c index 2bf02c0ee7..64e4549984 100644 --- a/usr/src/uts/i86pc/os/smt.c +++ b/usr/src/uts/i86pc/os/smt.c @@ -159,8 +159,9 @@ static uint_t empty_pil = XC_CPUPOKE_PIL; int smt_exclusion = 1; /* - * How long smt_acquire() will spin trying to acquire the core, in micro-seconds. - * This is enough time to wait out a significant proportion of interrupts. + * How long smt_acquire() will spin trying to acquire the core, in + * micro-seconds. This is enough time to wait out a significant proportion of + * interrupts. */ clock_t smt_acquire_wait_time = 64; @@ -291,7 +292,8 @@ smt_acquire(void) if (sibling_compatible(sibsmt, zoneid)) { smt->cs_state = CS_MK(CM_POISONED, zoneid); - sibsmt->cs_sibstate = CS_MK(CM_POISONED, zoneid); + sibsmt->cs_sibstate = CS_MK(CM_POISONED, + zoneid); membar_enter(); ret = 1; } @@ -723,7 +725,8 @@ smt_init(void) cp->cpu_m.mcpu_smt.cs_intr_depth = 0; cp->cpu_m.mcpu_smt.cs_state = CS_MK(CM_THREAD, GLOBAL_ZONEID); - cp->cpu_m.mcpu_smt.cs_sibstate = CS_MK(CM_THREAD, GLOBAL_ZONEID); + cp->cpu_m.mcpu_smt.cs_sibstate = CS_MK(CM_THREAD, + GLOBAL_ZONEID); ASSERT3P(cp->cpu_m.mcpu_smt.cs_sib, ==, NULL); cp->cpu_m.mcpu_smt.cs_sib = smt_find_sibling(cp); |