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authorToomas Soome <tsoome@me.com>2016-11-11 22:35:51 +0200
committerRichard Lowe <richlowe@richlowe.net>2016-12-27 12:01:59 -0500
commit03502720e0c6f75cbaab12fa1ef2917fbc2eebd1 (patch)
tree30f2a79843dccdff5a7a5b541ee3f61abdf1c294
parent3867c0453f38596e34b3a3266255ba1a68328f0a (diff)
downloadillumos-joyent-03502720e0c6f75cbaab12fa1ef2917fbc2eebd1.tar.gz
7686 loader: spelling fixes in comments.
Reviewed by: Andrew Stormont <andyjstormont@gmail.com> Reviewed by: Yuri Pankov <yuri.pankov@nexenta.com> Reviewed by: Robert Mustacchi <rm@joyent.com> Approved by: Richard Lowe <richlowe@richlowe.net>
-rw-r--r--usr/src/boot/sys/boot/arm/at91/bootiic/env_vars.c2
-rw-r--r--usr/src/boot/sys/boot/arm/at91/bootspi/env_vars.c2
-rw-r--r--usr/src/boot/sys/boot/arm/at91/libat91/at91rm9200.h208
-rw-r--r--usr/src/boot/sys/boot/arm/at91/libat91/mci_device.h10
-rw-r--r--usr/src/boot/sys/boot/efi/boot1/boot1.c4
-rw-r--r--usr/src/boot/sys/boot/efi/include/amd64/efibind.h6
-rw-r--r--usr/src/boot/sys/boot/efi/include/arm/efibind.h2
-rw-r--r--usr/src/boot/sys/boot/efi/include/arm64/efibind.h6
-rw-r--r--usr/src/boot/sys/boot/efi/include/efiuga.h4
-rw-r--r--usr/src/boot/sys/boot/efi/include/i386/efibind.h6
-rw-r--r--usr/src/boot/sys/boot/efi/loader/main.c4
-rw-r--r--usr/src/boot/sys/boot/fdt/fdt_loader_cmd.c6
-rw-r--r--usr/src/boot/sys/boot/i386/libfirewire/dconsole.c8
-rw-r--r--usr/src/boot/sys/boot/i386/libfirewire/fwohci.c6
-rw-r--r--usr/src/boot/sys/boot/i386/libi386/amd64_tramp.S4
-rw-r--r--usr/src/boot/sys/boot/i386/libi386/pxe.h6
-rw-r--r--usr/src/boot/sys/boot/ofw/common/main.c2
-rw-r--r--usr/src/boot/sys/boot/uboot/fdt/uboot_fdt.c2
18 files changed, 144 insertions, 144 deletions
diff --git a/usr/src/boot/sys/boot/arm/at91/bootiic/env_vars.c b/usr/src/boot/sys/boot/arm/at91/bootiic/env_vars.c
index f402a43f2a..ac0b4f978f 100644
--- a/usr/src/boot/sys/boot/arm/at91/bootiic/env_vars.c
+++ b/usr/src/boot/sys/boot/arm/at91/bootiic/env_vars.c
@@ -41,7 +41,7 @@ static int currentOffset;
/*
* .KB_C_FN_DEFINITION_START
* int ReadCharFromEnvironment(char *)
- * This private function reads characters from the enviroment variables
+ * This private function reads characters from the environment variables
* to service the command prompt during auto-boot or just to setup the
* default environment. Returns positive value if valid character was
* set in the pointer. Returns negative value to signal input stream
diff --git a/usr/src/boot/sys/boot/arm/at91/bootspi/env_vars.c b/usr/src/boot/sys/boot/arm/at91/bootspi/env_vars.c
index 7ab250e5d7..29b819b229 100644
--- a/usr/src/boot/sys/boot/arm/at91/bootspi/env_vars.c
+++ b/usr/src/boot/sys/boot/arm/at91/bootspi/env_vars.c
@@ -41,7 +41,7 @@ static int currentOffset;
/*
* .KB_C_FN_DEFINITION_START
* int ReadCharFromEnvironment(char *)
- * This private function reads characters from the enviroment variables
+ * This private function reads characters from the environment variables
* to service the command prompt during auto-boot or just to setup the
* default environment. Returns positive value if valid character was
* set in the pointer. Returns negative value to signal input stream
diff --git a/usr/src/boot/sys/boot/arm/at91/libat91/at91rm9200.h b/usr/src/boot/sys/boot/arm/at91/libat91/at91rm9200.h
index 80d44c8243..c9b9bcc9a0 100644
--- a/usr/src/boot/sys/boot/arm/at91/libat91/at91rm9200.h
+++ b/usr/src/boot/sys/boot/arm/at91/libat91/at91rm9200.h
@@ -450,51 +450,51 @@ typedef struct _AT91S_ST {
AT91_REG ST_CRTR; // Current Real-time Register
} AT91S_ST, *AT91PS_ST;
-// -------- ST_CR : (ST Offset: 0x0) System Timer Control Register --------
+// -------- ST_CR : (ST Offset: 0x0) System Timer Control Register --------
#define AT91C_ST_WDRST (0x1u << 0) // (ST) Watchdog Timer Restart
-// -------- ST_PIMR : (ST Offset: 0x4) System Timer Period Interval Mode Register --------
+// -------- ST_PIMR : (ST Offset: 0x4) System Timer Period Interval Mode Register --------
#define AT91C_ST_PIV (0xFFFFu << 0) // (ST) Watchdog Timer Restart
-// -------- ST_WDMR : (ST Offset: 0x8) System Timer Watchdog Mode Register --------
+// -------- ST_WDMR : (ST Offset: 0x8) System Timer Watchdog Mode Register --------
#define AT91C_ST_WDV (0xFFFFu << 0) // (ST) Watchdog Timer Restart
#define AT91C_ST_RSTEN (0x1u << 16) // (ST) Reset Enable
#define AT91C_ST_EXTEN (0x1u << 17) // (ST) External Signal Assertion Enable
-// -------- ST_RTMR : (ST Offset: 0xc) System Timer Real-time Mode Register --------
+// -------- ST_RTMR : (ST Offset: 0xc) System Timer Real-time Mode Register --------
#define AT91C_ST_RTPRES (0xFFFFu << 0) // (ST) Real-time Timer Prescaler Value
-// -------- ST_SR : (ST Offset: 0x10) System Timer Status Register --------
+// -------- ST_SR : (ST Offset: 0x10) System Timer Status Register --------
#define AT91C_ST_PITS (0x1u << 0) // (ST) Period Interval Timer Interrupt
#define AT91C_ST_WDOVF (0x1u << 1) // (ST) Watchdog Overflow
#define AT91C_ST_RTTINC (0x1u << 2) // (ST) Real-time Timer Increment
#define AT91C_ST_ALMS (0x1u << 3) // (ST) Alarm Status
-// -------- ST_IER : (ST Offset: 0x14) System Timer Interrupt Enable Register --------
-// -------- ST_IDR : (ST Offset: 0x18) System Timer Interrupt Disable Register --------
-// -------- ST_IMR : (ST Offset: 0x1c) System Timer Interrupt Mask Register --------
-// -------- ST_RTAR : (ST Offset: 0x20) System Timer Real-time Alarm Register --------
+// -------- ST_IER : (ST Offset: 0x14) System Timer Interrupt Enable Register --------
+// -------- ST_IDR : (ST Offset: 0x18) System Timer Interrupt Disable Register --------
+// -------- ST_IMR : (ST Offset: 0x1c) System Timer Interrupt Mask Register --------
+// -------- ST_RTAR : (ST Offset: 0x20) System Timer Real-time Alarm Register --------
#define AT91C_ST_ALMV (0xFFFFFu << 0) // (ST) Alarm Value Value
-// -------- ST_CRTR : (ST Offset: 0x24) System Timer Current Real-time Register --------
+// -------- ST_CRTR : (ST Offset: 0x24) System Timer Current Real-time Register --------
#define AT91C_ST_CRTV (0xFFFFFu << 0) // (ST) Current Real-time Value
// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Power Management Controler
+// SOFTWARE API DEFINITION FOR Power Management Controller
// *****************************************************************************
typedef struct _AT91S_PMC {
- AT91_REG PMC_SCER; // System Clock Enable Register
- AT91_REG PMC_SCDR; // System Clock Disable Register
- AT91_REG PMC_SCSR; // System Clock Status Register
- AT91_REG Reserved0[1]; //
- AT91_REG PMC_PCER; // Peripheral Clock Enable Register
- AT91_REG PMC_PCDR; // Peripheral Clock Disable Register
- AT91_REG PMC_PCSR; // Peripheral Clock Status Register
- AT91_REG Reserved1[5]; //
- AT91_REG PMC_MCKR; // Master Clock Register
- AT91_REG Reserved2[3]; //
- AT91_REG PMC_PCKR[8]; // Programmable Clock Register
- AT91_REG PMC_IER; // Interrupt Enable Register
- AT91_REG PMC_IDR; // Interrupt Disable Register
- AT91_REG PMC_SR; // Status Register
- AT91_REG PMC_IMR; // Interrupt Mask Register
+ AT91_REG PMC_SCER; // System Clock Enable Register
+ AT91_REG PMC_SCDR; // System Clock Disable Register
+ AT91_REG PMC_SCSR; // System Clock Status Register
+ AT91_REG Reserved0[1]; //
+ AT91_REG PMC_PCER; // Peripheral Clock Enable Register
+ AT91_REG PMC_PCDR; // Peripheral Clock Disable Register
+ AT91_REG PMC_PCSR; // Peripheral Clock Status Register
+ AT91_REG Reserved1[5]; //
+ AT91_REG PMC_MCKR; // Master Clock Register
+ AT91_REG Reserved2[3]; //
+ AT91_REG PMC_PCKR[8]; // Programmable Clock Register
+ AT91_REG PMC_IER; // Interrupt Enable Register
+ AT91_REG PMC_IDR; // Interrupt Disable Register
+ AT91_REG PMC_SR; // Status Register
+ AT91_REG PMC_IMR; // Interrupt Mask Register
} AT91S_PMC, *AT91PS_PMC;
-// -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register --------
+// -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register --------
#define AT91C_PMC_PCK (0x1u << 0) // (PMC) Processor Clock
#define AT91C_PMC_UDP (0x1u << 1) // (PMC) USB Device Port Clock
#define AT91C_PMC_MCKUDP (0x1u << 2) // (PMC) USB Device Port Master Clock Automatic Disable on Suspend
@@ -507,9 +507,9 @@ typedef struct _AT91S_PMC {
#define AT91C_PMC_PCK5 (0x1u << 13) // (PMC) Programmable Clock Output
#define AT91C_PMC_PCK6 (0x1u << 14) // (PMC) Programmable Clock Output
#define AT91C_PMC_PCK7 (0x1u << 15) // (PMC) Programmable Clock Output
-// -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register --------
-// -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register --------
-// -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register --------
+// -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register --------
+// -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register --------
+// -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register --------
#define AT91C_PMC_CSS (0x3u << 0) // (PMC) Programmable Clock Selection
#define AT91C_PMC_CSS_SLOW_CLK 0x0u // (PMC) Slow Clock is selected
#define AT91C_PMC_CSS_MAIN_CLK 0x1u // (PMC) Main Clock is selected
@@ -528,8 +528,8 @@ typedef struct _AT91S_PMC {
#define AT91C_PMC_MDIV_2 (0x1u << 8) // (PMC) The processor clock is twice as fast as the master clock
#define AT91C_PMC_MDIV_3 (0x2u << 8) // (PMC) The processor clock is three times faster than the master clock
#define AT91C_PMC_MDIV_4 (0x3u << 8) // (PMC) The processor clock is four times faster than the master clock
-// -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register --------
-// -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register --------
+// -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register --------
+// -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register --------
#define AT91C_PMC_MOSCS (0x1u << 0) // (PMC) MOSC Status/Enable/Disable/Mask
#define AT91C_PMC_LOCKA (0x1u << 1) // (PMC) PLL A Status/Enable/Disable/Mask
#define AT91C_PMC_LOCKB (0x1u << 2) // (PMC) PLL B Status/Enable/Disable/Mask
@@ -542,28 +542,28 @@ typedef struct _AT91S_PMC {
#define AT91C_PMC_PCK5RDY (0x1u << 13) // (PMC) PCK5_RDY Status/Enable/Disable/Mask
#define AT91C_PMC_PCK6RDY (0x1u << 14) // (PMC) PCK6_RDY Status/Enable/Disable/Mask
#define AT91C_PMC_PCK7RDY (0x1u << 15) // (PMC) PCK7_RDY Status/Enable/Disable/Mask
-// -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register --------
-// -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register --------
-// -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register --------
+// -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register --------
+// -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register --------
+// -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register --------
// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Clock Generator Controler
+// SOFTWARE API DEFINITION FOR Clock Generator Controller
// *****************************************************************************
typedef struct _AT91S_CKGR {
- AT91_REG CKGR_MOR; // Main Oscillator Register
- AT91_REG CKGR_MCFR; // Main Clock Frequency Register
- AT91_REG CKGR_PLLAR; // PLL A Register
- AT91_REG CKGR_PLLBR; // PLL B Register
+ AT91_REG CKGR_MOR; // Main Oscillator Register
+ AT91_REG CKGR_MCFR; // Main Clock Frequency Register
+ AT91_REG CKGR_PLLAR; // PLL A Register
+ AT91_REG CKGR_PLLBR; // PLL B Register
} AT91S_CKGR, *AT91PS_CKGR;
-// -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register --------
+// -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register --------
#define AT91C_CKGR_MOSCEN (0x1u << 0) // (CKGR) Main Oscillator Enable
#define AT91C_CKGR_OSCTEST (0x1u << 1) // (CKGR) Oscillator Test
#define AT91C_CKGR_OSCOUNT (0xFFu << 8) // (CKGR) Main Oscillator Start-up Time
-// -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register --------
+// -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register --------
#define AT91C_CKGR_MAINF (0xFFFFu << 0) // (CKGR) Main Clock Frequency
#define AT91C_CKGR_MAINRDY (0x1u << 16) // (CKGR) Main Clock Ready
-// -------- CKGR_PLLAR : (CKGR Offset: 0x8) PLL A Register --------
+// -------- CKGR_PLLAR : (CKGR Offset: 0x8) PLL A Register --------
#define AT91C_CKGR_DIVA (0xFFu << 0) // (CKGR) Divider Selected
#define AT91C_CKGR_DIVA_0 0x0u // (CKGR) Divider output is 0
#define AT91C_CKGR_DIVA_BYPASS 0x1u // (CKGR) Divider is bypassed
@@ -575,7 +575,7 @@ typedef struct _AT91S_CKGR {
#define AT91C_CKGR_OUTA_3 (0x3u << 14) // (CKGR) Please refer to the PLLA datasheet
#define AT91C_CKGR_MULA (0x7FFu << 16) // (CKGR) PLL A Multiplier
#define AT91C_CKGR_SRCA (0x1u << 29) // (CKGR) PLL A Source
-// -------- CKGR_PLLBR : (CKGR Offset: 0xc) PLL B Register --------
+// -------- CKGR_PLLBR : (CKGR Offset: 0xc) PLL B Register --------
#define AT91C_CKGR_DIVB (0xFFu << 0) // (CKGR) Divider Selected
#define AT91C_CKGR_DIVB_0 0x0u // (CKGR) Divider output is 0
#define AT91C_CKGR_DIVB_BYPASS 0x1u // (CKGR) Divider is bypassed
@@ -590,44 +590,44 @@ typedef struct _AT91S_CKGR {
#define AT91C_CKGR_USB_PLL (0x1u << 29) // (CKGR) PLL Use
// *****************************************************************************
-// SOFTWARE API DEFINITION FOR Parallel Input Output Controler
+// SOFTWARE API DEFINITION FOR Parallel Input Output Controller
// *****************************************************************************
typedef struct _AT91S_PIO {
- AT91_REG PIO_PER; // PIO Enable Register
- AT91_REG PIO_PDR; // PIO Disable Register
- AT91_REG PIO_PSR; // PIO Status Register
- AT91_REG Reserved0[1]; //
- AT91_REG PIO_OER; // Output Enable Register
- AT91_REG PIO_ODR; // Output Disable Registerr
- AT91_REG PIO_OSR; // Output Status Register
- AT91_REG Reserved1[1]; //
- AT91_REG PIO_IFER; // Input Filter Enable Register
- AT91_REG PIO_IFDR; // Input Filter Disable Register
- AT91_REG PIO_IFSR; // Input Filter Status Register
- AT91_REG Reserved2[1]; //
- AT91_REG PIO_SODR; // Set Output Data Register
- AT91_REG PIO_CODR; // Clear Output Data Register
- AT91_REG PIO_ODSR; // Output Data Status Register
- AT91_REG PIO_PDSR; // Pin Data Status Register
- AT91_REG PIO_IER; // Interrupt Enable Register
- AT91_REG PIO_IDR; // Interrupt Disable Register
- AT91_REG PIO_IMR; // Interrupt Mask Register
- AT91_REG PIO_ISR; // Interrupt Status Register
- AT91_REG PIO_MDER; // Multi-driver Enable Register
- AT91_REG PIO_MDDR; // Multi-driver Disable Register
- AT91_REG PIO_MDSR; // Multi-driver Status Register
- AT91_REG Reserved3[1]; //
- AT91_REG PIO_PPUDR; // Pull-up Disable Register
- AT91_REG PIO_PPUER; // Pull-up Enable Register
- AT91_REG PIO_PPUSR; // Pad Pull-up Status Register
- AT91_REG Reserved4[1]; //
- AT91_REG PIO_ASR; // Select A Register
- AT91_REG PIO_BSR; // Select B Register
- AT91_REG PIO_ABSR; // AB Select Status Register
- AT91_REG Reserved5[9]; //
- AT91_REG PIO_OWER; // Output Write Enable Register
- AT91_REG PIO_OWDR; // Output Write Disable Register
- AT91_REG PIO_OWSR; // Output Write Status Register
+ AT91_REG PIO_PER; // PIO Enable Register
+ AT91_REG PIO_PDR; // PIO Disable Register
+ AT91_REG PIO_PSR; // PIO Status Register
+ AT91_REG Reserved0[1]; //
+ AT91_REG PIO_OER; // Output Enable Register
+ AT91_REG PIO_ODR; // Output Disable Registerr
+ AT91_REG PIO_OSR; // Output Status Register
+ AT91_REG Reserved1[1]; //
+ AT91_REG PIO_IFER; // Input Filter Enable Register
+ AT91_REG PIO_IFDR; // Input Filter Disable Register
+ AT91_REG PIO_IFSR; // Input Filter Status Register
+ AT91_REG Reserved2[1]; //
+ AT91_REG PIO_SODR; // Set Output Data Register
+ AT91_REG PIO_CODR; // Clear Output Data Register
+ AT91_REG PIO_ODSR; // Output Data Status Register
+ AT91_REG PIO_PDSR; // Pin Data Status Register
+ AT91_REG PIO_IER; // Interrupt Enable Register
+ AT91_REG PIO_IDR; // Interrupt Disable Register
+ AT91_REG PIO_IMR; // Interrupt Mask Register
+ AT91_REG PIO_ISR; // Interrupt Status Register
+ AT91_REG PIO_MDER; // Multi-driver Enable Register
+ AT91_REG PIO_MDDR; // Multi-driver Disable Register
+ AT91_REG PIO_MDSR; // Multi-driver Status Register
+ AT91_REG Reserved3[1]; //
+ AT91_REG PIO_PPUDR; // Pull-up Disable Register
+ AT91_REG PIO_PPUER; // Pull-up Enable Register
+ AT91_REG PIO_PPUSR; // Pad Pull-up Status Register
+ AT91_REG Reserved4[1]; //
+ AT91_REG PIO_ASR; // Select A Register
+ AT91_REG PIO_BSR; // Select B Register
+ AT91_REG PIO_ABSR; // AB Select Status Register
+ AT91_REG Reserved5[9]; //
+ AT91_REG PIO_OWER; // Output Write Enable Register
+ AT91_REG PIO_OWDR; // Output Write Disable Register
+ AT91_REG PIO_OWSR; // Output Write Status Register
} AT91S_PIO, *AT91PS_PIO;
@@ -635,30 +635,30 @@ typedef struct _AT91S_PIO {
// SOFTWARE API DEFINITION FOR Debug Unit
// *****************************************************************************
typedef struct _AT91S_DBGU {
- AT91_REG DBGU_CR; // Control Register
- AT91_REG DBGU_MR; // Mode Register
- AT91_REG DBGU_IER; // Interrupt Enable Register
- AT91_REG DBGU_IDR; // Interrupt Disable Register
- AT91_REG DBGU_IMR; // Interrupt Mask Register
- AT91_REG DBGU_CSR; // Channel Status Register
- AT91_REG DBGU_RHR; // Receiver Holding Register
- AT91_REG DBGU_THR; // Transmitter Holding Register
- AT91_REG DBGU_BRGR; // Baud Rate Generator Register
- AT91_REG Reserved0[7]; //
- AT91_REG DBGU_C1R; // Chip ID1 Register
- AT91_REG DBGU_C2R; // Chip ID2 Register
- AT91_REG DBGU_FNTR; // Force NTRST Register
- AT91_REG Reserved1[45]; //
- AT91_REG DBGU_RPR; // Receive Pointer Register
- AT91_REG DBGU_RCR; // Receive Counter Register
- AT91_REG DBGU_TPR; // Transmit Pointer Register
- AT91_REG DBGU_TCR; // Transmit Counter Register
- AT91_REG DBGU_RNPR; // Receive Next Pointer Register
- AT91_REG DBGU_RNCR; // Receive Next Counter Register
- AT91_REG DBGU_TNPR; // Transmit Next Pointer Register
- AT91_REG DBGU_TNCR; // Transmit Next Counter Register
- AT91_REG DBGU_PTCR; // PDC Transfer Control Register
- AT91_REG DBGU_PTSR; // PDC Transfer Status Register
+ AT91_REG DBGU_CR; // Control Register
+ AT91_REG DBGU_MR; // Mode Register
+ AT91_REG DBGU_IER; // Interrupt Enable Register
+ AT91_REG DBGU_IDR; // Interrupt Disable Register
+ AT91_REG DBGU_IMR; // Interrupt Mask Register
+ AT91_REG DBGU_CSR; // Channel Status Register
+ AT91_REG DBGU_RHR; // Receiver Holding Register
+ AT91_REG DBGU_THR; // Transmitter Holding Register
+ AT91_REG DBGU_BRGR; // Baud Rate Generator Register
+ AT91_REG Reserved0[7]; //
+ AT91_REG DBGU_C1R; // Chip ID1 Register
+ AT91_REG DBGU_C2R; // Chip ID2 Register
+ AT91_REG DBGU_FNTR; // Force NTRST Register
+ AT91_REG Reserved1[45]; //
+ AT91_REG DBGU_RPR; // Receive Pointer Register
+ AT91_REG DBGU_RCR; // Receive Counter Register
+ AT91_REG DBGU_TPR; // Transmit Pointer Register
+ AT91_REG DBGU_TCR; // Transmit Counter Register
+ AT91_REG DBGU_RNPR; // Receive Next Pointer Register
+ AT91_REG DBGU_RNCR; // Receive Next Counter Register
+ AT91_REG DBGU_TNPR; // Transmit Next Pointer Register
+ AT91_REG DBGU_TNCR; // Transmit Next Counter Register
+ AT91_REG DBGU_PTCR; // PDC Transfer Control Register
+ AT91_REG DBGU_PTSR; // PDC Transfer Status Register
} AT91S_DBGU, *AT91PS_DBGU;
// -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register --------
diff --git a/usr/src/boot/sys/boot/arm/at91/libat91/mci_device.h b/usr/src/boot/sys/boot/arm/at91/libat91/mci_device.h
index c2b75ad70b..27e5d36223 100644
--- a/usr/src/boot/sys/boot/arm/at91/libat91/mci_device.h
+++ b/usr/src/boot/sys/boot/arm/at91/libat91/mci_device.h
@@ -106,15 +106,15 @@ typedef struct _AT91S_MciDevice
///////////////////////////////////////////////////////////////////////////////
#define AT91C_CMD_SEND_OK 0 // Command ok
#define AT91C_CMD_SEND_ERROR -1 // Command failed
-#define AT91C_INIT_OK 2 // Init Successfull
+#define AT91C_INIT_OK 2 // Init Successful
#define AT91C_INIT_ERROR 3 // Init Failed
-#define AT91C_READ_OK 4 // Read Successfull
+#define AT91C_READ_OK 4 // Read Successful
#define AT91C_READ_ERROR 5 // Read Failed
-#define AT91C_WRITE_OK 6 // Write Successfull
+#define AT91C_WRITE_OK 6 // Write Successful
#define AT91C_WRITE_ERROR 7 // Write Failed
-#define AT91C_ERASE_OK 8 // Erase Successfull
+#define AT91C_ERASE_OK 8 // Erase Successful
#define AT91C_ERASE_ERROR 9 // Erase Failed
-#define AT91C_CARD_SELECTED_OK 10 // Card Selection Successfull
+#define AT91C_CARD_SELECTED_OK 10 // Card Selection Successful
#define AT91C_CARD_SELECTED_ERROR 11 // Card Selection Failed
#define AT91C_MCI_SR_ERROR (AT91C_MCI_UNRE | AT91C_MCI_OVRE | AT91C_MCI_DTOE | \
diff --git a/usr/src/boot/sys/boot/efi/boot1/boot1.c b/usr/src/boot/sys/boot/efi/boot1/boot1.c
index 7692f52e68..7d92f2a765 100644
--- a/usr/src/boot/sys/boot/efi/boot1/boot1.c
+++ b/usr/src/boot/sys/boot/efi/boot1/boot1.c
@@ -108,8 +108,8 @@ nodes_match(EFI_DEVICE_PATH *imgpath, EFI_DEVICE_PATH *devpath)
/*
* device_paths_match returns TRUE if the imgpath isn't NULL and all nodes
- * in imgpath and devpath match up to their respect occurances of a media
- * node, FALSE otherwise.
+ * in imgpath and devpath match up to their respective occurences of a
+ * media node, FALSE otherwise.
*/
static BOOLEAN
device_paths_match(EFI_DEVICE_PATH *imgpath, EFI_DEVICE_PATH *devpath)
diff --git a/usr/src/boot/sys/boot/efi/include/amd64/efibind.h b/usr/src/boot/sys/boot/efi/include/amd64/efibind.h
index e871085d39..6b0465b627 100644
--- a/usr/src/boot/sys/boot/efi/include/amd64/efibind.h
+++ b/usr/src/boot/sys/boot/efi/include/amd64/efibind.h
@@ -232,12 +232,12 @@ typedef uint64_t UINTN;
#define LOAD_INTERNAL_DRIVER(_if, type, name, entry) \
- (_if)->LoadInternal(type, name, NULL)
+ (_if)->LoadInternal(type, name, NULL)
-#else // EFI_NT_EMULATOR
+#else // EFI_NT_EMULATOR
//
-// When build similiar to FW, then link everything together as
+// When building similar to FW, link everything together as
// one big module.
//
diff --git a/usr/src/boot/sys/boot/efi/include/arm/efibind.h b/usr/src/boot/sys/boot/efi/include/arm/efibind.h
index 85537ad376..177032adc0 100644
--- a/usr/src/boot/sys/boot/efi/include/arm/efibind.h
+++ b/usr/src/boot/sys/boot/efi/include/arm/efibind.h
@@ -34,7 +34,7 @@ Abstract:
//
-// Make sure we are useing the correct packing rules per EFI specification
+// Make sure we are using the correct packing rules per EFI specification
//
#ifndef __GNUC__
#pragma pack()
diff --git a/usr/src/boot/sys/boot/efi/include/arm64/efibind.h b/usr/src/boot/sys/boot/efi/include/arm64/efibind.h
index 142f16267c..8581643b98 100644
--- a/usr/src/boot/sys/boot/efi/include/arm64/efibind.h
+++ b/usr/src/boot/sys/boot/efi/include/arm64/efibind.h
@@ -176,9 +176,9 @@ typedef uint64_t UINTN;
#define VOLATILE volatile
//
-// BugBug: Need to find out if this is portable accross compliers.
+// BugBug: Need to find out if this is portable across compilers.
//
-void __mfa (void);
+void __mfa (void);
#define MEMORY_FENCE() __mfa()
#ifdef EFI_NO_INTERFACE_DECL
@@ -190,7 +190,7 @@ void __mfa (void);
#endif
//
-// When build similiar to FW, then link everything together as
+// When building similar to FW, link everything together as
// one big module.
//
diff --git a/usr/src/boot/sys/boot/efi/include/efiuga.h b/usr/src/boot/sys/boot/efi/include/efiuga.h
index 6dfaf500b2..dce4e044c1 100644
--- a/usr/src/boot/sys/boot/efi/include/efiuga.h
+++ b/usr/src/boot/sys/boot/efi/include/efiuga.h
@@ -136,10 +136,10 @@ typedef enum {
@param[in] Width - Width of rectangle in BltBuffer in pixels.
@param[in] Height - Hight of rectangle in BltBuffer in pixels.
@param[in] Delta - OPTIONAL
-
+
@retval EFI_SUCCESS - The Blt operation completed.
@retval EFI_INVALID_PARAMETER - BltOperation is not valid.
- @retval EFI_DEVICE_ERROR - A hardware error occured writting to the video buffer.
+ @retval EFI_DEVICE_ERROR - A hardware error occurred writing to the video buffer.
--*/
typedef
diff --git a/usr/src/boot/sys/boot/efi/include/i386/efibind.h b/usr/src/boot/sys/boot/efi/include/i386/efibind.h
index 6e5a7163a9..fee8d3a92c 100644
--- a/usr/src/boot/sys/boot/efi/include/i386/efibind.h
+++ b/usr/src/boot/sys/boot/efi/include/i386/efibind.h
@@ -229,12 +229,12 @@ typedef uint32_t UINTN;
#define LOAD_INTERNAL_DRIVER(_if, type, name, entry) \
- (_if)->LoadInternal(type, name, NULL)
+ (_if)->LoadInternal(type, name, NULL)
-#else // EFI_NT_EMULATOR
+#else // EFI_NT_EMULATOR
//
-// When build similiar to FW, then link everything together as
+// When building similar to FW, link everything together as
// one big module.
//
diff --git a/usr/src/boot/sys/boot/efi/loader/main.c b/usr/src/boot/sys/boot/efi/loader/main.c
index 5dc1099cdd..249be4a95e 100644
--- a/usr/src/boot/sys/boot/efi/loader/main.c
+++ b/usr/src/boot/sys/boot/efi/loader/main.c
@@ -79,8 +79,8 @@ static void efi_zfs_probe(void);
/*
* Need this because EFI uses UTF-16 unicode string constants, but we
- * use UTF-8. We can't use printf due to the possiblity of \0 and we
- * don't support support wide characters either.
+ * use UTF-8. We can't use printf due to the possibility of \0 and we
+ * don't support wide characters either.
*/
static void
print_str16(const CHAR16 *str)
diff --git a/usr/src/boot/sys/boot/fdt/fdt_loader_cmd.c b/usr/src/boot/sys/boot/fdt/fdt_loader_cmd.c
index 662d004807..b0b7ef568c 100644
--- a/usr/src/boot/sys/boot/fdt/fdt_loader_cmd.c
+++ b/usr/src/boot/sys/boot/fdt/fdt_loader_cmd.c
@@ -157,7 +157,7 @@ fdt_find_static_dtb()
}
/*
- * The most efficent way to find a symbol would be to calculate a
+ * The most efficient way to find a symbol would be to calculate a
* hash, find proper bucket and chain, and thus find a symbol.
* However, that would involve code duplication (e.g. for hash
* function). So we're using simpler and a bit slower way: we're
@@ -533,7 +533,7 @@ fdt_fixup_memory(struct fdt_mem_region *region, size_t num)
if (fdt_get_mem_rsv(fdtp, i, &rstart, &rsize))
break;
if (rsize) {
- /* Ensure endianess, and put cells into a buffer */
+ /* Ensure endianness, and put cells into a buffer */
if (addr_cells == 2)
*(uint64_t *)buf =
cpu_to_fdt64(rstart);
@@ -583,7 +583,7 @@ fdt_fixup_memory(struct fdt_mem_region *region, size_t num)
for (i = 0; i < num; i++) {
curmr = &region[i];
if (curmr->size != 0) {
- /* Ensure endianess, and put cells into a buffer */
+ /* Ensure endianness, and put cells into a buffer */
if (addr_cells == 2)
*(uint64_t *)buf =
cpu_to_fdt64(curmr->start);
diff --git a/usr/src/boot/sys/boot/i386/libfirewire/dconsole.c b/usr/src/boot/sys/boot/i386/libfirewire/dconsole.c
index 16645e259c..eccdc77799 100644
--- a/usr/src/boot/sys/boot/i386/libfirewire/dconsole.c
+++ b/usr/src/boot/sys/boot/i386/libfirewire/dconsole.c
@@ -47,13 +47,13 @@ static int dcons_started = 0;
static struct dcons_softc sc[DCONS_NPORT];
uint32_t dcons_paddr;
-/* The buffer must be allocated in BSS becase:
+/* The buffer must be allocated in BSS because:
* - The dcons driver in the kernel is initialized before VM/pmap is
- * initialized, so that the buffer must be allocate in the region
+ * initialized, so that the buffer must be allocated in the region
* that is mapped at the very early boot state.
- * - We expect identiy map only for regions before KERNLOAD
+ * - We expect identity map only for regions before KERNLOAD
* (i386:4MB amd64:1MB).
- * - It seems that heap in conventional memory(640KB) is not sufficent
+ * - It seems that heap in conventional memory(640KB) is not sufficient
* and we move it to high address as LOADER_SUPPORT_BZIP2.
* - BSS is placed in conventional memory.
*/
diff --git a/usr/src/boot/sys/boot/i386/libfirewire/fwohci.c b/usr/src/boot/sys/boot/i386/libfirewire/fwohci.c
index 326e44b2ec..cd47708851 100644
--- a/usr/src/boot/sys/boot/i386/libfirewire/fwohci.c
+++ b/usr/src/boot/sys/boot/i386/libfirewire/fwohci.c
@@ -214,10 +214,10 @@ fwohci_reset(struct fwohci_softc *sc, device_t dev)
int i, max_rec, speed;
uint32_t reg, reg2;
- /* Disable interrupts */
+ /* Disable interrupts */
OWRITE(sc, FWOHCI_INTMASKCLR, ~0);
- /* FLUSH FIFO and reset Transmitter/Reciever */
+ /* FLUSH FIFO and reset Transmitter/Receiver */
OWRITE(sc, OHCI_HCCCTL, OHCI_HCC_RESET);
if (firewire_debug)
device_printf(dev, "resetting OHCI...");
@@ -297,7 +297,7 @@ fwohci_init(struct fwohci_softc *sc, device_t dev)
return (ENXIO);
#if 0
-/* SID recieve buffer must align 2^11 */
+/* SID receive buffer must align 2^11 */
#define OHCI_SIDSIZE (1 << 11)
sc->sid_buf = fwdma_malloc(&sc->fc, OHCI_SIDSIZE, OHCI_SIDSIZE,
&sc->sid_dma, BUS_DMA_WAITOK);
diff --git a/usr/src/boot/sys/boot/i386/libi386/amd64_tramp.S b/usr/src/boot/sys/boot/i386/libi386/amd64_tramp.S
index fe0cf83c9d..d044c05814 100644
--- a/usr/src/boot/sys/boot/i386/libi386/amd64_tramp.S
+++ b/usr/src/boot/sys/boot/i386/libi386/amd64_tramp.S
@@ -95,8 +95,8 @@ amd64_tramp:
movl %cr0, %eax
orl $CR0_PG, %eax
movl %eax, %cr0
-
- /* Now we're in compatability mode. set %cs for long mode */
+
+ /* Now we're in compatibility mode. set %cs for long mode */
movl $VTOP(gdtdesc), %eax
movl VTOP(entry_hi), %esi
movl VTOP(entry_lo), %edi
diff --git a/usr/src/boot/sys/boot/i386/libi386/pxe.h b/usr/src/boot/sys/boot/i386/libi386/pxe.h
index 651bdcd35f..cdad520fe0 100644
--- a/usr/src/boot/sys/boot/i386/libi386/pxe.h
+++ b/usr/src/boot/sys/boot/i386/libi386/pxe.h
@@ -226,7 +226,7 @@ typedef struct {
#define PXENV_UNDI_SET_STATION_ADDRESS 0x000A
typedef struct {
PXENV_STATUS_t Status;
- MAC_ADDR StationAddress; /* Temp MAC addres to use */
+ MAC_ADDR StationAddress; /* Temp MAC address to use */
} PACKED t_PXENV_UNDI_SET_STATION_ADDR;
#define PXENV_UNDI_SET_PACKET_FILTER 0x000B
@@ -330,7 +330,7 @@ typedef struct {
PXENV_STATUS_t Status;
uint16_t FuncFlag; /* PXENV_UNDI_ISR_OUT_xxx */
uint16_t BufferLength; /* Length of Frame */
- uint16_t FrameLength; /* Total length of reciever frame */
+ uint16_t FrameLength; /* Total length of receiver frame */
uint16_t FrameHeaderLength; /* Length of the media header in Frame */
SEGOFF16_t Frame; /* receive buffer */
uint8_t ProtType; /* Protocol type */
@@ -344,7 +344,7 @@ typedef struct {
# define PXENV_UNDI_ISR_OUT_NOT_OUTS 1
/*
- * one of these will bre returnd for PXEND_UNDI_ISR_IN_PROCESS
+ * one of these will be returned for PXEND_UNDI_ISR_IN_PROCESS
* and PXENV_UNDI_ISR_IN_GET_NEXT
*/
# define PXENV_UNDI_ISR_OUT_DONE 0
diff --git a/usr/src/boot/sys/boot/ofw/common/main.c b/usr/src/boot/sys/boot/ofw/common/main.c
index 0913f0c9c2..1435a11d36 100644
--- a/usr/src/boot/sys/boot/ofw/common/main.c
+++ b/usr/src/boot/sys/boot/ofw/common/main.c
@@ -98,7 +98,7 @@ main(int (*openfirm)(void *))
char **bargv;
/*
- * Initalise the Open Firmware routines by giving them the entry point.
+ * Initialize the Open Firmware routines by giving them the entry point.
*/
OF_init(openfirm);
diff --git a/usr/src/boot/sys/boot/uboot/fdt/uboot_fdt.c b/usr/src/boot/sys/boot/uboot/fdt/uboot_fdt.c
index 6b646f63dc..46882338a8 100644
--- a/usr/src/boot/sys/boot/uboot/fdt/uboot_fdt.c
+++ b/usr/src/boot/sys/boot/uboot/fdt/uboot_fdt.c
@@ -141,7 +141,7 @@ fdt_platform_fixups(void)
if (n != 0) {
/*
- * Find the lenght of the interface id by
+ * Find the length of the interface id by
* taking in to account the first 3 and
* last 4 characters.
*/