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authorRobert Mustacchi <rm@joyent.com>2014-09-22 16:17:03 -0700
committerRobert Mustacchi <rm@joyent.com>2014-09-24 19:11:36 -0700
commitdcf050af29bc1c6bd38ba7f173dc18bb7c5629e1 (patch)
treed697f046fb7d6965792ae8db2c9aa99f3899852f
parent3be32116258babbbdd231a5bba8e6e58e87daa99 (diff)
downloadillumos-joyent-dcf050af29bc1c6bd38ba7f173dc18bb7c5629e1.tar.gz
5192 cpuid_pass2 incorrectly asserts when disabling xsave
Reviewed by: Richard Lowe <richlowe@richlowe.net> Reviewed by: Hans Rosenfeld <hans.rosenfeld@nexenta.com> Reviewed by: Garrett D'Amore <garrett@damore.org> Reviewed by: Josef 'Jeff' Sipek <jeffpc@josefsipek.net> Approved by: Gordon Ross <gordon.ross@nexenta.com>
-rw-r--r--usr/src/uts/i86pc/os/cpuid.c32
1 files changed, 22 insertions, 10 deletions
diff --git a/usr/src/uts/i86pc/os/cpuid.c b/usr/src/uts/i86pc/os/cpuid.c
index a9b4428347..67f2127620 100644
--- a/usr/src/uts/i86pc/os/cpuid.c
+++ b/usr/src/uts/i86pc/os/cpuid.c
@@ -32,7 +32,7 @@
* Portions Copyright 2009 Advanced Micro Devices, Inc.
*/
/*
- * Copyright (c) 2012, Joyent, Inc. All rights reserved.
+ * Copyright (c) 2014, Joyent, Inc. All rights reserved.
*/
/*
* Various routines to handle identification
@@ -1946,16 +1946,28 @@ cpuid_pass2(cpu_t *cpu)
"continue.", cpu->cpu_id);
} else {
/*
- * Must be from boot CPU, OK to disable XSAVE.
+ * If we reached here on the boot CPU, it's also
+ * almost certain that we'll reach here on the
+ * non-boot CPUs. When we're here on a boot CPU
+ * we should disable the feature, on a non-boot
+ * CPU we need to confirm that we have.
*/
- ASSERT(cpu->cpu_id == 0);
- remove_x86_feature(x86_featureset,
- X86FSET_XSAVE);
- remove_x86_feature(x86_featureset, X86FSET_AVX);
- CPI_FEATURES_ECX(cpi) &= ~CPUID_INTC_ECX_XSAVE;
- CPI_FEATURES_ECX(cpi) &= ~CPUID_INTC_ECX_AVX;
- CPI_FEATURES_ECX(cpi) &= ~CPUID_INTC_ECX_F16C;
- xsave_force_disable = B_TRUE;
+ if (cpu->cpu_id == 0) {
+ remove_x86_feature(x86_featureset,
+ X86FSET_XSAVE);
+ remove_x86_feature(x86_featureset,
+ X86FSET_AVX);
+ CPI_FEATURES_ECX(cpi) &=
+ ~CPUID_INTC_ECX_XSAVE;
+ CPI_FEATURES_ECX(cpi) &=
+ ~CPUID_INTC_ECX_AVX;
+ CPI_FEATURES_ECX(cpi) &=
+ ~CPUID_INTC_ECX_F16C;
+ xsave_force_disable = B_TRUE;
+ } else {
+ VERIFY(is_x86_feature(x86_featureset,
+ X86FSET_XSAVE) == B_FALSE);
+ }
}
}
}