13029 AMD bhyve should reload TSS ASAP

Reviewed by: John Levon <john.levon@joyent.com>
Approved by: Dan McDonald <danmcd@joyent.com>

3 files changed, 29 insertions, 31 deletions

diff --git a/usr/src/uts/i86pc/io/vmm/amd/offsets.in b/usr/src/uts/i86pc/io/vmm/amd/offsets.in
index 886d013607..ad4ee7155a 100644
--- a/usr/src/uts/i86pc/io/vmm/amd/offsets.in
+++ b/usr/src/uts/i86pc/io/vmm/amd/offsets.in
@@ -12,8 +12,10 @@
 
 /*
  * Copyright 2017 Joyent, Inc.
+ * Copyright 2020 Oxide Computer Company
  */
 #include <sys/types.h>
+#include <sys/cpuvar.h>
 
 #include "amd/svm.h"
 
@@ -33,5 +35,19 @@ svm_regctx
 	sctx_r14	SCTX_R14
 	sctx_r15	SCTX_R15
 
+/* Need access to GDT to restore TSS */
+cpu
+	cpu_m.mcpu_gdt		CPU_GDT
+
+user_desc	USER_DESC_SZ
+
+system_desc
+	ssd_type	SSD_TYPE
+
+\#define	GDT_KTSS_OFF	_MUL(USER_DESC_SZ, GDT_KTSS)
+
+/* Necessary for TSS-related data */
+\#include <sys/segments.h>
+
 /* Pull in definition for MSR_GSBASE */
 \#include <machine/specialreg.h>
diff --git a/usr/src/uts/i86pc/io/vmm/amd/svm.c b/usr/src/uts/i86pc/io/vmm/amd/svm.c
index f717962c4e..615d3cd029 100644
--- a/usr/src/uts/i86pc/io/vmm/amd/svm.c
+++ b/usr/src/uts/i86pc/io/vmm/amd/svm.c
@@ -1802,30 +1802,6 @@ done:
 	}
 }
 
-static __inline void
-restore_host_tss(void)
-{
-#ifdef __FreeBSD__
-	struct system_segment_descriptor *tss_sd;
-
-	/*
-	 * The TSS descriptor was in use prior to launching the guest so it
-	 * has been marked busy.
-	 *
-	 * 'ltr' requires the descriptor to be marked available so change the
-	 * type to "64-bit available TSS".
-	 */
-	tss_sd = PCPU_GET(tss);
-	tss_sd->sd_type = SDT_SYSTSS;
-	ltr(GSEL(GPROC0_SEL, SEL_KPL));
-#else
-	system_desc_t *tss = (system_desc_t *)&CPU->cpu_gdt[GDT_KTSS];
-
-	tss->ssd_type = SDT_SYSTSS;
-	wr_tsr(KTSS_SEL);
-#endif
-}
-
 #ifdef __FreeBSD__
 static void
 check_asid(struct svm_softc *sc, int vcpuid, pmap_t pmap, u_int thiscpu)
@@ -2174,13 +2150,6 @@ svm_vmrun(void *arg, int vcpu, register_t rip, pmap_t pmap,
 
 		CPU_CLR_ATOMIC(curcpu, &pmap->pm_active);
 
-		/*
-		 * The host GDTR and IDTR is saved by VMRUN and restored
-		 * automatically on #VMEXIT. However, the host TSS needs
-		 * to be restored explicitly.
-		 */
-		restore_host_tss();
-
 		/* Restore host LDTR. */
 		lldt(ldt_sel);
 
diff --git a/usr/src/uts/i86pc/io/vmm/amd/svm_support.s b/usr/src/uts/i86pc/io/vmm/amd/svm_support.s
index 27ef1a04af..c1537b1544 100644
--- a/usr/src/uts/i86pc/io/vmm/amd/svm_support.s
+++ b/usr/src/uts/i86pc/io/vmm/amd/svm_support.s
@@ -28,6 +28,7 @@
 
 /*
  * Copyright 2019 Joyent, Inc.
+ * Copyright 2020 Oxide Computer Company
  */
 
 #include <sys/asm_linkage.h>
@@ -142,6 +143,18 @@ ENTRY_NP(svm_launch)
 	movl	$MSR_GSBASE, %ecx
 	wrmsr
 
+	/*
+	 * While SVM will save/restore the GDTR and IDTR, the TR does not enjoy
+	 * such treatment.  Reload the KTSS immediately, since it is used by
+	 * dtrace and other fault/trap handlers.
+	 */
+	movq	SVMSTK_RDX(%rsp), %rdi		/* %rdi = CPU */
+	movq	CPU_GDT(%rdi), %rdi		/* %rdi = cpu->cpu_gdt */
+	leaq	GDT_KTSS_OFF(%rdi), %rdi	/* %rdi = &cpu_gdt[GDT_KTSS] */
+	andb	$0xfd, SSD_TYPE(%rdi)		/* ssd_type.busy = 0 */
+	movw	$KTSS_SEL, %ax			/* reload kernel TSS */
+	ltr	%ax
+
 	SVM_GUEST_FLUSH_SCRATCH
 
 	addq	$SVMSTKSIZE, %rsp