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| author | Jerry Jelinek <jerry.jelinek@joyent.com> | 2020-08-18 11:29:06 +0000 |
|---|---|---|
| committer | Jerry Jelinek <jerry.jelinek@joyent.com> | 2020-08-18 11:29:06 +0000 |
| commit | a39a1701f2e9d5fb23ed48afe6358df976103cad (patch) | |
| tree | 7d921cad3f06df0fbf9ccc3408808bf44da10531 | |
| parent | 23187d70952e17a17d29f2e3bc82dd1ae3d715d6 (diff) | |
| parent | 0d54f452f42b98b9da0e75b9401795c3a0560297 (diff) | |
| download | illumos-joyent-a39a1701f2e9d5fb23ed48afe6358df976103cad.tar.gz | |
[illumos-gate merge]
commit 0d54f452f42b98b9da0e75b9401795c3a0560297
13048 Fix format issue in regex(5) man page
commit b445c7c6f2f09c2296534b5ccda2c05321c474b1
12755 Double fault when booting under Amazon EC2
| -rw-r--r-- | usr/src/man/man5/regex.5 | 4 | ||||
| -rw-r--r-- | usr/src/uts/i86pc/cpu/generic_cpu/gcpu_main.c | 17 |
2 files changed, 19 insertions, 2 deletions
diff --git a/usr/src/man/man5/regex.5 b/usr/src/man/man5/regex.5 index 2f84bd6daf..077c6335f9 100644 --- a/usr/src/man/man5/regex.5 +++ b/usr/src/man/man5/regex.5 @@ -44,7 +44,7 @@ .\" Portions Copyright (c) 1999, Sun Microsystems, Inc. All Rights Reserved .\" Copyright 2017 Nexenta Systems, Inc. .\" -.Dd June 2, 2017 +.Dd August 14, 2020 .Dt REGEX 5 .Os .Sh NAME @@ -511,7 +511,7 @@ and Such a subexpression matches whatever it would have matched without the .Qq \e( and -Qq \e) , +.Qq \e) , except that anchoring within subexpressions is optional behavior; see .Sx BRE Expression Anchoring , below. diff --git a/usr/src/uts/i86pc/cpu/generic_cpu/gcpu_main.c b/usr/src/uts/i86pc/cpu/generic_cpu/gcpu_main.c index a7effbdc46..04286b642c 100644 --- a/usr/src/uts/i86pc/cpu/generic_cpu/gcpu_main.c +++ b/usr/src/uts/i86pc/cpu/generic_cpu/gcpu_main.c @@ -31,6 +31,7 @@ /* * Copyright (c) 2018, Joyent, Inc. + * Copyright 2020 RackTop Systems, Inc. */ /* @@ -113,6 +114,14 @@ gcpu_init_ident_ppin(cmi_hdl_t hdl) return (NULL); } + /* + * If the PPIN is not enabled and not locked, attempt to enable it. + * Note: in some environments such as Amazon EC2 the PPIN appears + * to be disabled and unlocked but our attempts to enable it don't + * stick, and when we attempt to read the PPIN we get an uncaught + * #GP. To avoid that happening we read the MSR back and verify it + * has taken the new value. + */ if ((value & MSR_PPIN_CTL_ENABLED) == 0) { if ((value & MSR_PPIN_CTL_LOCKED) != 0) { return (NULL); @@ -122,6 +131,14 @@ gcpu_init_ident_ppin(cmi_hdl_t hdl) CMI_SUCCESS) { return (NULL); } + + if (cmi_hdl_rdmsr(hdl, ppin_ctl_msr, &value) != CMI_SUCCESS) { + return (NULL); + } + + if ((value & MSR_PPIN_CTL_ENABLED) == 0) { + return (NULL); + } } if (cmi_hdl_rdmsr(hdl, ppin_msr, &value) != CMI_SUCCESS) { |