diff options
author | Patrick Mooney <pmooney@pfmooney.com> | 2018-07-18 21:17:19 +0000 |
---|---|---|
committer | Patrick Mooney <pmooney@oxide.computer> | 2020-09-01 19:00:14 +0000 |
commit | 8515d723262b57176aeeda8734edbe79fe1e7a5a (patch) | |
tree | 496fa5abdeb4f3af5390f5f1011cae46aa6a077c | |
parent | 1c8449e95a93a750df972545379490366b392934 (diff) | |
download | illumos-joyent-8515d723262b57176aeeda8734edbe79fe1e7a5a.tar.gz |
13085 fast_syscall state should be tracked
Reviewed by: John Levon <john.levon@joyent.com>
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Toomas Soome <tsoome@me.com>
Approved by: Dan McDonald <danmcd@joyent.com>
-rw-r--r--[-rwxr-xr-x] | usr/src/test/os-tests/tests/i386/ldt.c | 0 | ||||
-rw-r--r-- | usr/src/uts/i86pc/os/mp_startup.c | 8 | ||||
-rw-r--r-- | usr/src/uts/i86pc/sys/machcpuvar.h | 8 |
3 files changed, 16 insertions, 0 deletions
diff --git a/usr/src/test/os-tests/tests/i386/ldt.c b/usr/src/test/os-tests/tests/i386/ldt.c index 1f39e1a9bd..1f39e1a9bd 100755..100644 --- a/usr/src/test/os-tests/tests/i386/ldt.c +++ b/usr/src/test/os-tests/tests/i386/ldt.c diff --git a/usr/src/uts/i86pc/os/mp_startup.c b/usr/src/uts/i86pc/os/mp_startup.c index ffc8ee84aa..3c42c2d42f 100644 --- a/usr/src/uts/i86pc/os/mp_startup.c +++ b/usr/src/uts/i86pc/os/mp_startup.c @@ -2106,6 +2106,8 @@ cpu_sep_enable(void) ASSERT(curthread->t_preempt || getpil() >= LOCK_LEVEL); wrmsr(MSR_INTC_SEP_CS, (uint64_t)(uintptr_t)KCS_SEL); + + CPU->cpu_m.mcpu_fast_syscall_state |= FSS_SEP_ENABLED; } static void @@ -2119,6 +2121,8 @@ cpu_sep_disable(void) * the sysenter or sysexit instruction to trigger a #gp fault. */ wrmsr(MSR_INTC_SEP_CS, 0); + + CPU->cpu_m.mcpu_fast_syscall_state &= ~FSS_SEP_ENABLED; } static void @@ -2129,6 +2133,8 @@ cpu_asysc_enable(void) wrmsr(MSR_AMD_EFER, rdmsr(MSR_AMD_EFER) | (uint64_t)(uintptr_t)AMD_EFER_SCE); + + CPU->cpu_m.mcpu_fast_syscall_state |= FSS_ASYSC_ENABLED; } static void @@ -2143,4 +2149,6 @@ cpu_asysc_disable(void) */ wrmsr(MSR_AMD_EFER, rdmsr(MSR_AMD_EFER) & ~((uint64_t)(uintptr_t)AMD_EFER_SCE)); + + CPU->cpu_m.mcpu_fast_syscall_state &= ~FSS_ASYSC_ENABLED; } diff --git a/usr/src/uts/i86pc/sys/machcpuvar.h b/usr/src/uts/i86pc/sys/machcpuvar.h index f4e38dec98..772f3112cb 100644 --- a/usr/src/uts/i86pc/sys/machcpuvar.h +++ b/usr/src/uts/i86pc/sys/machcpuvar.h @@ -81,6 +81,12 @@ struct xen_evt_data { ulong_t evt_affinity[sizeof (ulong_t) * 8]; /* service on cpu */ }; +enum fast_syscall_state { + FSS_DISABLED = 0, + FSS_ASYSC_ENABLED = (1 << 0), + FSS_SEP_ENABLED = (1 << 1) +}; + struct kpti_frame { uint64_t kf_lower_redzone; @@ -214,6 +220,8 @@ struct machcpu { uint16_t mcpu_idle_type; /* CPU next idle type */ uint16_t max_cstates; /* supported max cstates */ + enum fast_syscall_state mcpu_fast_syscall_state; + struct cpu_ucode_info *mcpu_ucode_info; void *mcpu_pm_mach_state; |