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authorJoshua M. Clulow <jmc@joyent.com>2016-03-01 01:25:54 +0000
committerJoshua M. Clulow <jmc@joyent.com>2016-07-06 16:25:22 +0000
commit98d86a0a7845a809b1073a2c478778477de6889b (patch)
treeed8b9f938512063eb545cca598b02003ebc3e847
parent916bdba8ba4ac66a0564b63f5d543247301f3e73 (diff)
downloadillumos-joyent-98d86a0a7845a809b1073a2c478778477de6889b.tar.gz
XXX rename interrupt parameters
-rw-r--r--usr/src/uts/common/io/cpqary3/cpqary3.c4
-rw-r--r--usr/src/uts/common/io/cpqary3/cpqary3.h4
-rw-r--r--usr/src/uts/common/io/cpqary3/cpqary3_ciss.c46
-rw-r--r--usr/src/uts/common/io/cpqary3/cpqary3_ciss_simple.c6
-rw-r--r--usr/src/uts/common/io/cpqary3/cpqary3_scsi.h6
-rw-r--r--usr/src/uts/common/io/cpqary3/cpqary3_transport.c21
6 files changed, 22 insertions, 65 deletions
diff --git a/usr/src/uts/common/io/cpqary3/cpqary3.c b/usr/src/uts/common/io/cpqary3/cpqary3.c
index 79beb027cb..54627d4f8d 100644
--- a/usr/src/uts/common/io/cpqary3/cpqary3.c
+++ b/usr/src/uts/common/io/cpqary3/cpqary3.c
@@ -348,9 +348,9 @@ cpqary3_attach(dev_info_t *dip, ddi_attach_cmd_t attach_cmd)
cpq->cpq_init_level |= CPQARY3_INITLEVEL_MINOR_NODE;
/* Enable the Controller Interrupt */
- cpqary3_intr_onoff(cpq, CPQARY3_INTR_ENABLE);
+ cpqary3_intr_set(cpq, B_TRUE);
if (cpq->cpq_host_support & 0x4) {
- cpqary3_lockup_intr_onoff(cpq, CPQARY3_LOCKUP_INTR_ENABLE);
+ cpqary3_lockup_intr_set(cpq, B_TRUE);
}
/*
diff --git a/usr/src/uts/common/io/cpqary3/cpqary3.h b/usr/src/uts/common/io/cpqary3/cpqary3.h
index 9974b8cabb..682ec98e87 100644
--- a/usr/src/uts/common/io/cpqary3/cpqary3.h
+++ b/usr/src/uts/common/io/cpqary3/cpqary3.h
@@ -468,8 +468,6 @@ typedef struct cpqary3_ioctlreq {
void cpqary3_init_hbatran(cpqary3_t *);
void cpqary3_periodic(void *);
int cpqary3_flush_cache(cpqary3_t *);
-void cpqary3_intr_onoff(cpqary3_t *, uint8_t);
-void cpqary3_lockup_intr_onoff(cpqary3_t *, uint8_t);
uint16_t cpqary3_init_ctlr_resource(cpqary3_t *);
int32_t cpqary3_ioctl_driver_info(uintptr_t, int);
int32_t cpqary3_ioctl_ctlr_info(uintptr_t, cpqary3_t *, int);
@@ -517,6 +515,8 @@ uint32_t cpqary3_isr_sw_simple(caddr_t);
void cpqary3_trigger_sw_isr(cpqary3_t *);
int cpqary3_interrupts_setup(cpqary3_t *);
void cpqary3_interrupts_teardown(cpqary3_t *);
+void cpqary3_intr_set(cpqary3_t *, boolean_t);
+void cpqary3_lockup_intr_set(cpqary3_t *, boolean_t);
/*
* Controller initialisation routines.
diff --git a/usr/src/uts/common/io/cpqary3/cpqary3_ciss.c b/usr/src/uts/common/io/cpqary3/cpqary3_ciss.c
index 4eeb32478d..b8fc52acb1 100644
--- a/usr/src/uts/common/io/cpqary3/cpqary3_ciss.c
+++ b/usr/src/uts/common/io/cpqary3/cpqary3_ciss.c
@@ -10,23 +10,11 @@
*/
/*
- * Copyright (C) 2013 Hewlett-Packard Development Company, L.P.
* Copyright 2016 Joyent, Inc.
*/
-/*
- * This module contains routines that program the controller. All
- * operations viz., initialization of controller, submision &
- * retrieval of commands, enabling & disabling of interrupts,
- * checking interrupt status are performed here.
- */
-
-#include <sys/sdt.h>
#include "cpqary3.h"
-/*
- * XXX
- */
int
cpqary3_retrieve(cpqary3_t *cpq, uint32_t want_tag, boolean_t *found)
{
@@ -91,29 +79,17 @@ cpqary3_submit(cpqary3_t *cpq, cpqary3_command_t *cpcm)
return (0);
}
-
-/*
- * Function : cpqary3_intr_onoff
- * Description : This routine enables/disables the HBA interrupt.
- * Called By : cpqary3_attach(), ry3_handle_flag_nointr(),
- * cpqary3_tick_hdlr(), cpqary3_init_ctlr_resource()
- * Parameters : per-controller, flag stating enable/disable
- * Calls : None
- * Return Values: None
- */
void
-cpqary3_intr_onoff(cpqary3_t *cpq, uint8_t flag)
+cpqary3_intr_set(cpqary3_t *cpq, boolean_t enabled)
{
/*
* Read the Interrupt Mask Register.
*/
uint32_t imr = cpqary3_get32(cpq, CISS_I2O_INTERRUPT_MASK);
- VERIFY(flag == CPQARY3_INTR_ENABLE || flag == CPQARY3_INTR_DISABLE);
-
switch (cpq->cpq_ctlr_mode) {
case CPQARY3_CTLR_MODE_SIMPLE:
- if (flag == CPQARY3_INTR_ENABLE) {
+ if (enabled) {
imr &= ~INTR_SIMPLE_MASK;
} else {
imr |= INTR_SIMPLE_MASK;
@@ -121,7 +97,7 @@ cpqary3_intr_onoff(cpqary3_t *cpq, uint8_t flag)
break;
default:
- if (flag == CPQARY3_INTR_ENABLE) {
+ if (enabled) {
imr &= ~cpq->cpq_board->bd_intrmask;
} else {
imr |= cpq->cpq_board->bd_intrmask;
@@ -132,18 +108,8 @@ cpqary3_intr_onoff(cpqary3_t *cpq, uint8_t flag)
cpqary3_put32(cpq, CISS_I2O_INTERRUPT_MASK, imr);
}
-/*
- * Function : cpqary3_lockup_intr_onoff
- * Description : This routine enables/disables the lockup interrupt.
- * Called By : cpqary3_attach(), cpqary3_handle_flag_nointr(),
- * cpqary3_tick_hdlr(), cpqary3_hw_isr,
- * cpqary3_init_ctlr_resource()
- * Parameters : per-controller, flag stating enable/disable
- * Calls : None
- * Return Values: None
- */
void
-cpqary3_lockup_intr_onoff(cpqary3_t *cpq, uint8_t flag)
+cpqary3_lockup_intr_set(cpqary3_t *cpq, boolean_t enabled)
{
/*
* Read the Interrupt Mask Register.
@@ -154,11 +120,9 @@ cpqary3_lockup_intr_onoff(cpqary3_t *cpq, uint8_t flag)
* Enable or disable firmware lockup interrupts from the controller
* based on the flag.
*/
- if (flag == CPQARY3_LOCKUP_INTR_ENABLE) {
+ if (enabled) {
imr &= ~cpq->cpq_board->bd_lockup_intrmask;
} else {
- VERIFY(flag == CPQARY3_LOCKUP_INTR_DISABLE);
-
imr |= cpq->cpq_board->bd_lockup_intrmask;
}
diff --git a/usr/src/uts/common/io/cpqary3/cpqary3_ciss_simple.c b/usr/src/uts/common/io/cpqary3/cpqary3_ciss_simple.c
index 0667496912..07c09818c8 100644
--- a/usr/src/uts/common/io/cpqary3/cpqary3_ciss_simple.c
+++ b/usr/src/uts/common/io/cpqary3/cpqary3_ciss_simple.c
@@ -55,7 +55,7 @@ cpqary3_isr_hw_simple(caddr_t arg)
* Disable interrupts until the soft interrupt handler has had a chance
* to read and process replies.
*/
- cpqary3_intr_onoff(cpq, CPQARY3_INTR_DISABLE);
+ cpqary3_intr_set(cpq, B_FALSE);
cpqary3_trigger_sw_isr(cpq);
@@ -86,7 +86,7 @@ cpqary3_isr_sw_simple(caddr_t arg)
* Unmask the controller inbound data interrupt.
*/
if (!cpq->cpq_intr_off) {
- cpqary3_intr_onoff(cpq, CPQARY3_INTR_ENABLE);
+ cpqary3_intr_set(cpq, B_TRUE);
}
cpq->cpq_swintr_flag = B_FALSE;
@@ -146,7 +146,7 @@ cpqary3_ctlr_init_simple(cpqary3_t *cpq)
/*
* Disable device interrupts while we are setting up.
*/
- cpqary3_intr_onoff(cpq, CPQARY3_INTR_DISABLE);
+ cpqary3_intr_set(cpq, B_FALSE);
if ((cpq->cpq_maxcmds = cpqary3_ctlr_get_cmdsoutmax(cpq)) == 0) {
dev_err(cpq->dip, CE_WARN, "maximum outstanding commands set "
diff --git a/usr/src/uts/common/io/cpqary3/cpqary3_scsi.h b/usr/src/uts/common/io/cpqary3/cpqary3_scsi.h
index 695d05d9d1..a91373555e 100644
--- a/usr/src/uts/common/io/cpqary3/cpqary3_scsi.h
+++ b/usr/src/uts/common/io/cpqary3/cpqary3_scsi.h
@@ -93,12 +93,6 @@ extern "C" {
#define CPQARY3_SYNC_SUBMITTED 8
#define CPQARY3_SYNC_TIMEOUT 16
-#define CPQARY3_INTR_ENABLE 1
-#define CPQARY3_INTR_DISABLE 2
-
-#define CPQARY3_LOCKUP_INTR_ENABLE 1
-#define CPQARY3_LOCKUP_INTR_DISABLE 2
-
#define CPQARY3_COALESCE_DELAY 0x0
#define CPQARY3_COALESCE_COUNT 0x00000001l
diff --git a/usr/src/uts/common/io/cpqary3/cpqary3_transport.c b/usr/src/uts/common/io/cpqary3/cpqary3_transport.c
index bcb8365f15..f829a7f018 100644
--- a/usr/src/uts/common/io/cpqary3/cpqary3_transport.c
+++ b/usr/src/uts/common/io/cpqary3/cpqary3_transport.c
@@ -942,9 +942,10 @@ cpqary3_handle_flag_nointr(cpqary3_command_t *cpcm, struct scsi_pkt *scsi_pktp)
mutex_enter(&cpq->sw_mutex);
mutex_enter(&cpq->hw_mutex);
cpq->cpq_intr_off = B_TRUE;
- cpqary3_intr_onoff(cpq, CPQARY3_INTR_DISABLE);
- if (cpq->cpq_host_support & 0x4)
- cpqary3_lockup_intr_onoff(cpq, CPQARY3_LOCKUP_INTR_DISABLE);
+ cpqary3_intr_set(cpq, B_FALSE);
+ if (cpq->cpq_host_support & 0x4) {
+ cpqary3_lockup_intr_set(cpq, B_FALSE);
+ }
while (avl_numnodes(&cpq->cpq_inflight) > 0) {
(void) cpqary3_retrieve(cpq, 0, NULL);
@@ -953,10 +954,9 @@ cpqary3_handle_flag_nointr(cpqary3_command_t *cpcm, struct scsi_pkt *scsi_pktp)
if (cpqary3_submit(cpq, cpcm) != 0) {
cpq->cpq_intr_off = B_FALSE;
- cpqary3_intr_onoff(cpq, CPQARY3_INTR_ENABLE);
+ cpqary3_intr_set(cpq, B_TRUE);
if (cpq->cpq_host_support & 0x4) {
- cpqary3_lockup_intr_onoff(cpq,
- CPQARY3_LOCKUP_INTR_ENABLE);
+ cpqary3_lockup_intr_set(cpq, B_TRUE);
}
mutex_exit(&cpq->hw_mutex);
@@ -972,10 +972,9 @@ cpqary3_handle_flag_nointr(cpqary3_command_t *cpcm, struct scsi_pkt *scsi_pktp)
scsi_pktp->pkt_state = 0;
cpq->cpq_intr_off = B_FALSE;
- cpqary3_intr_onoff(cpq, CPQARY3_INTR_ENABLE);
+ cpqary3_intr_set(cpq, B_TRUE);
if (cpq->cpq_host_support & 0x4) {
- cpqary3_lockup_intr_onoff(cpq,
- CPQARY3_LOCKUP_INTR_ENABLE);
+ cpqary3_lockup_intr_set(cpq, B_TRUE);
}
mutex_exit(&cpq->hw_mutex);
@@ -986,9 +985,9 @@ cpqary3_handle_flag_nointr(cpqary3_command_t *cpcm, struct scsi_pkt *scsi_pktp)
}
cpq->cpq_intr_off = B_FALSE;
- cpqary3_intr_onoff(cpq, CPQARY3_INTR_ENABLE);
+ cpqary3_intr_set(cpq, B_TRUE);
if (cpq->cpq_host_support & 0x4) {
- cpqary3_lockup_intr_onoff(cpq, CPQARY3_LOCKUP_INTR_ENABLE);
+ cpqary3_lockup_intr_set(cpq, B_TRUE);
}
mutex_exit(&cpq->hw_mutex);