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| author | Robert Mustacchi <rm@joyent.com> | 2018-07-15 16:02:36 +0000 |
|---|---|---|
| committer | Robert Mustacchi <rm@joyent.com> | 2018-09-24 18:35:18 +0000 |
| commit | 1f1540205fa6366266184180654434272c425ac2 (patch) | |
| tree | dbb354f00033a4b7c2db6b1ec88ba02ad977bf19 /usr/src/cmd/dis | |
| parent | 856f620e96e5413932a6607aea5094db2ece172f (diff) | |
| download | illumos-joyent-1f1540205fa6366266184180654434272c425ac2.tar.gz | |
9820 Want risc-v disassembler
Reviewed by: Dan McDonald <danmcd@joyent.com>
Reviewed by: Richard Lowe <richlowe@richlowe.net>
Approved by: Garrett D'Amore <garrett@damore.org>
Diffstat (limited to 'usr/src/cmd/dis')
| -rw-r--r-- | usr/src/cmd/dis/dis_main.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/usr/src/cmd/dis/dis_main.c b/usr/src/cmd/dis/dis_main.c index 2886f412c9..db785eff7b 100644 --- a/usr/src/cmd/dis/dis_main.c +++ b/usr/src/cmd/dis/dis_main.c @@ -26,6 +26,7 @@ * Copyright 2011 Jason King. All rights reserved. * Copyright 2012 Joshua M. Clulow <josh@sysmgr.org> * Copyright 2015 Josef 'Jeff' Sipek <jeffpc@josefsipek.net> + * Copyright 2018, Joyent, Inc. */ #include <ctype.h> @@ -579,6 +580,29 @@ dis_file(const char *filename) } break; + case EM_RISCV: + /* + * RISC-V is defined to be litle endian. The current ISA + * makes it clear that the 64-bit instructions can + * co-exist with the 32-bit ones and therefore we don't + * need a separate elf class at this time. + */ + if (ehdr.e_ident[EI_DATA] != ELFDATA2LSB) { + warn("invalid EI_DATA field for RISC-V object"); + return; + } + + if (ehdr.e_ident[EI_CLASS] == ELFCLASS32) { + g_flags |= DIS_RISCV_32; + } else if (ehdr.e_ident[EI_CLASS] == ELFCLASS64) { + g_flags |= DIS_RISCV_64; + } else { + warn("invalid EI_CLASS field for RISC-V " + "object"); + return; + } + break; + default: die("%s: unsupported ELF machine 0x%x", filename, ehdr.e_machine); |