6293502 US4+ (panther) cpu not in ultra_conf.c, libcpc calls cpc_getcpuver misreport, cpc_getcpuref fails

3 files changed, 147 insertions, 7 deletions

diff --git a/usr/src/lib/libcpc/common/libcpc_impl.h b/usr/src/lib/libcpc/common/libcpc_impl.h
index 401b7e327a..d0ec83fd45 100644
--- a/usr/src/lib/libcpc/common/libcpc_impl.h
+++ b/usr/src/lib/libcpc/common/libcpc_impl.h
@@ -20,7 +20,7 @@
  * CDDL HEADER END
  */
 /*
- * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
+ * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
  */
 
@@ -163,6 +163,7 @@ extern cpc_set_t *__cpc_eventtoset(cpc_t *cpc, cpc_event_t *event, int flags);
 #define	CPC_ULTRA3		1002
 #define	CPC_ULTRA3_PLUS		1003
 #define	CPC_ULTRA3_I		1004
+#define	CPC_ULTRA4_PLUS		1005
 
 #define	CPC_PENTIUM		2000
 #define	CPC_PENTIUM_MMX		2001
@@ -186,7 +187,7 @@ extern cpc_set_t *__cpc_eventtoset(cpc_t *cpc, cpc_event_t *event, int flags);
 #if defined(__sparc)
 
 /*
- * UltraSPARC I, II and III processors
+ * UltraSPARC I, II, III and IV processors
  *
  * The performance counters on these processors allow up to two 32-bit
  * performance events to be captured simultaneously from a selection
diff --git a/usr/src/lib/libcpc/sparc/conf_ultra.c b/usr/src/lib/libcpc/sparc/conf_ultra.c
index 9b5d836ec9..7ba852b5c1 100644
--- a/usr/src/lib/libcpc/sparc/conf_ultra.c
+++ b/usr/src/lib/libcpc/sparc/conf_ultra.c
@@ -40,7 +40,7 @@
 /*
  * Configuration data for UltraSPARC performance counters.
  *
- * Definitions taken from [1], [2], [3]  and [4].  See the references to
+ * Definitions taken from [1], [2], [3]  [4] and [5].  See the references to
  * understand what any of these settings actually means.
  *
  * Note that in the current draft of [2], there is some re-use
@@ -53,12 +53,14 @@
  * [2] "UltraSPARC-III Programmer's Reference Manual," April 1999.
  * [3] "Cheetah+ Programmer's Reference Manual," November 2000.
  * [4] "UltraSPARC-IIIi Programmer's Reference Manual," November 2000.
+ * [5] "UltraSPARC-IV+ Programmer's Reference Manual," October 2004.
  */
 
 #define	V_US12		(1u << 0)	/* specific to UltraSPARC 1 and 2 */
 #define	V_US3		(1u << 1)	/* specific to UltraSPARC 3 */
 #define	V_US3_PLUS	(1u << 2)	/* specific to UltraSPARC 3 PLUS */
 #define	V_US3_I		(1u << 3)	/* specific to UltraSPARC-IIIi */
+#define	V_US4_PLUS	(1u << 4)	/* specific to UltraSPARC-IV+ */
 #define	V_END		(1u << 31)
 
 /*
@@ -69,7 +71,8 @@ static const uint_t cpuvermap[] = {
 	V_US12,			/* CPC_ULTRA2 */
 	V_US3,			/* CPC_ULTRA3 */
 	V_US3_PLUS,		/* CPC_ULTRA3_PLUS */
-	V_US3_I			/* CPC_ULTRA3I */
+	V_US3_I,		/* CPC_ULTRA3I */
+	V_US4_PLUS		/* CPC_ULTRA4_PLUS */
 };
 
 struct nametable {
@@ -141,6 +144,61 @@ static const struct nametable US3_names0[] = {
 	{V_END}
 };
 
+static const struct nametable US4_PLUS_names0[] = {
+	{V_US4_PLUS,	0x0,   "Cycle_cnt"},
+	{V_US4_PLUS,	0x1,   "Instr_cnt"},
+	{V_US4_PLUS,	0x2,   "Dispatch0_IC_miss"},
+	{V_US4_PLUS,	0x3,   "IU_stat_jmp_correct_pred"},
+	{V_US4_PLUS,	0x4,   "Dispatch0_2nd_br"},
+	{V_US4_PLUS,	0x5,   "Rstall_storeQ"},
+	{V_US4_PLUS,	0x6,   "Rstall_IU_use"},
+	{V_US4_PLUS,	0x7,   "IU_stat_ret_correct_pred"},
+	{V_US4_PLUS,	0x8,   "IC_ref"},
+	{V_US4_PLUS,	0x9,   "DC_rd"},
+	{V_US4_PLUS,	0xa,   "Rstall_FP_use"},
+	{V_US4_PLUS,	0xb,   "SW_pf_instr"},
+	{V_US4_PLUS,	0xc,   "L2_ref"},
+	{V_US4_PLUS,	0xd,   "L2_write_hit_RTO"},
+	{V_US4_PLUS,	0xe,   "L2_snoop_inv_sh"},
+	{V_US4_PLUS,	0xf,   "L2_rd_miss"},
+	{V_US4_PLUS,	0x10,  "PC_rd"},
+	{V_US4_PLUS,	0x11,  "SI_snoop_sh"},
+	{V_US4_PLUS,	0x12,  "SI_ciq_flow_sh"},
+	{V_US4_PLUS,	0x13,  "Re_DC_miss"},
+	{V_US4_PLUS,	0x14,  "SW_count_NOP"},
+	{V_US4_PLUS,	0x15,  "IU_stat_br_miss_taken"},
+	{V_US4_PLUS,	0x16,  "IU_stat_br_count_untaken"},
+	{V_US4_PLUS,	0x17,  "HW_pf_exec"},
+	{V_US4_PLUS,	0x18,  "FA_pipe_completion"},
+	{V_US4_PLUS,	0x19,  "SSM_L3_wb_remote"},
+	{V_US4_PLUS,	0x1a,  "SSM_L3_miss_local"},
+	{V_US4_PLUS,	0x1b,  "SSM_L3_miss_mtag_remote"},
+	{V_US4_PLUS,	0x1c,  "SW_pf_str_trapped"},
+	{V_US4_PLUS,	0x1d,  "SW_pf_PC_installed"},
+	{V_US4_PLUS,	0x1e,  "IPB_to_IC_fill"},
+	{V_US4_PLUS,	0x1f,  "L2_write_miss"},
+	{V_US4_PLUS,	0x20,  "MC_reads_0_sh"},
+	{V_US4_PLUS,	0x21,  "MC_reads_1_sh"},
+	{V_US4_PLUS,	0x22,  "MC_reads_2_sh"},
+	{V_US4_PLUS,	0x23,  "MC_reads_3_sh"},
+	{V_US4_PLUS,	0x24,  "MC_stalls_0_sh"},
+	{V_US4_PLUS,	0x25,  "MC_stalls_2_sh"},
+	{V_US4_PLUS,	0x26,  "L2_hit_other_half"},
+	{V_US4_PLUS,	0x28,  "L3_rd_miss"},
+	{V_US4_PLUS,	0x29,  "Re_L2_miss"},
+	{V_US4_PLUS,	0x2a,  "IC_miss_cancelled"},
+	{V_US4_PLUS,	0x2b,  "DC_wr_miss"},
+	{V_US4_PLUS,	0x2c,  "L3_hit_I_state_sh"},
+	{V_US4_PLUS,	0x2d,  "SI_RTS_src_data"},
+	{V_US4_PLUS,	0x2e,  "L2_IC_miss"},
+	{V_US4_PLUS,	0x2f,  "SSM_new_transaction_sh"},
+	{V_US4_PLUS,	0x30,  "L2_SW_pf_miss"},
+	{V_US4_PLUS,	0x31,  "L2_wb"},
+	{V_US4_PLUS,	0x32,  "L2_wb_sh"},
+	{V_US4_PLUS,	0x33,  "L2_snoop_cb_sh"},
+	{V_END}
+};
+
 static const struct nametable US3_PLUS_names0[] = {
 	USall_EVENTS_0(V_US3_PLUS),
 	US3all_EVENTS_0(V_US3_PLUS),
@@ -251,6 +309,65 @@ static const struct nametable US3_I_names1[] = {
 	{V_US3_I,	0x4,	"Re_DC_missovhd"},
 	{V_END}
 };
+
+static const struct nametable US4_PLUS_names1[] = {
+	{V_US4_PLUS,	0x0,   "Cycle_cnt"},
+	{V_US4_PLUS,	0x1,   "Instr_cnt"},
+	{V_US4_PLUS,	0x2,   "Dispatch0_other"},
+	{V_US4_PLUS,	0x3,   "DC_wr"},
+	{V_US4_PLUS,	0x4,   "Re_DC_missovhd"},
+	{V_US4_PLUS,	0x5,   "Re_FPU_bypass"},
+	{V_US4_PLUS,	0x6,   "L3_write_hit_RTO"},
+	{V_US4_PLUS,	0x7,   "L2L3_snoop_inv_sh"},
+	{V_US4_PLUS,	0x8,   "IC_L2_req"},
+	{V_US4_PLUS,	0x9,   "DC_rd_miss"},
+	{V_US4_PLUS,	0xa,   "L2_hit_I_state_sh"},
+	{V_US4_PLUS,	0xb,   "L3_write_miss_RTO"},
+	{V_US4_PLUS,	0xc,   "L2_miss"},
+	{V_US4_PLUS,	0xd,   "SI_owned_sh"},
+	{V_US4_PLUS,	0xe,   "SI_RTO_src_data"},
+	{V_US4_PLUS,	0xf,   "SW_pf_duplicate"},
+	{V_US4_PLUS,	0x10,  "IU_stat_jmp_mispred"},
+	{V_US4_PLUS,	0x11,  "ITLB_miss"},
+	{V_US4_PLUS,	0x12,  "DTLB_miss"},
+	{V_US4_PLUS,	0x13,  "WC_miss"},
+	{V_US4_PLUS,	0x14,  "IC_fill"},
+	{V_US4_PLUS,	0x15,  "IU_stat_ret_mispred"},
+	{V_US4_PLUS,	0x16,  "Re_L3_miss"},
+	{V_US4_PLUS,	0x17,  "Re_PFQ_full"},
+	{V_US4_PLUS,	0x18,  "PC_soft_hit"},
+	{V_US4_PLUS,	0x19,  "PC_inv"},
+	{V_US4_PLUS,	0x1a,  "PC_hard_hit"},
+	{V_US4_PLUS,	0x1b,  "IC_pf"},
+	{V_US4_PLUS,	0x1c,  "SW_count_NOP"},
+	{V_US4_PLUS,	0x1d,  "IU_stat_br_miss_untaken"},
+	{V_US4_PLUS,	0x1e,  "IU_stat_br_count_taken"},
+	{V_US4_PLUS,	0x1f,  "PC_miss"},
+	{V_US4_PLUS,	0x20,  "MC_writes_0_sh"},
+	{V_US4_PLUS,	0x21,  "MC_writes_1_sh"},
+	{V_US4_PLUS,	0x22,  "MC_writes_2_sh"},
+	{V_US4_PLUS,	0x23,  "MC_writes_3_sh"},
+	{V_US4_PLUS,	0x24,  "MC_stalls_1_sh"},
+	{V_US4_PLUS,	0x25,  "MC_stalls_3_sh"},
+	{V_US4_PLUS,	0x26,  "Re_RAW_miss"},
+	{V_US4_PLUS,	0x27,  "FM_pipe_completion"},
+	{V_US4_PLUS,	0x28,  "SSM_L3_miss_mtag_remote"},
+	{V_US4_PLUS,	0x29,  "SSM_L3_miss_remote"},
+	{V_US4_PLUS,	0x2a,  "SW_pf_exec"},
+	{V_US4_PLUS,	0x2b,  "SW_pf_str_exec"},
+	{V_US4_PLUS,	0x2c,  "SW_pf_dropped"},
+	{V_US4_PLUS,	0x2d,  "SW_pf_L2_installed"},
+	{V_US4_PLUS,	0x2f,  "L2_HW_pf_miss"},
+	{V_US4_PLUS,	0x31,  "L3_miss"},
+	{V_US4_PLUS,	0x32,  "L3_IC_miss"},
+	{V_US4_PLUS,	0x33,  "L3_SW_pf_miss"},
+	{V_US4_PLUS,	0x34,  "L3_hit_other_half"},
+	{V_US4_PLUS,	0x35,  "L3_wb"},
+	{V_US4_PLUS,	0x36,  "L3_wb_sh"},
+	{V_US4_PLUS,	0x37,  "L2L3_snoop_cb_sh"},
+	{V_END}
+};
+
 #undef	USall_EVENTS_1
 #undef	US3all_EVENTS_1
 
@@ -274,6 +391,11 @@ static const struct nametable *US3_I_names[2] = {
 	US3_I_names1
 };
 
+static const struct nametable *US4_PLUS_names[2] = {
+	US4_PLUS_names0,
+	US4_PLUS_names1
+};
+
 #define	MAPCPUVER(cpuver)	(cpuvermap[(cpuver) - CPC_ULTRA1])
 
 static int
@@ -318,6 +440,9 @@ getnametable(int cpuver, int regno)
 	case V_US3_I:
 		n = US3_I_names[regno];
 		break;
+	case V_US4_PLUS:
+		n = US4_PLUS_names[regno];
+		break;
 	default:
 		n = NULL;
 		break;
@@ -393,6 +518,8 @@ cpc_getcciname(int cpuver)
 			return ("UltraSPARC III+ & IV");
 		case V_US3_I:
 			return ("UltraSPARC IIIi & IIIi+");
+		case V_US4_PLUS:
+			return ("UltraSPARC IV+");
 		default:
 			break;
 		}
@@ -421,6 +548,11 @@ cpc_getcpuref(int cpuver)
 			return (gettext(
 			    "See the \"UltraSPARC IIIi User's Manual\"  "
 			    "for descriptions of these events." CPU_REF_URL));
+		case V_US4_PLUS:
+			return (gettext(
+			    "See the \"UltraSPARC IV User's Manual"
+			    "Supplement\"  "
+			    "for descriptions of these events." CPU_REF_URL));
 		default:
 			break;
 		}
@@ -444,6 +576,7 @@ cpc_getnpic(int cpuver)
 	case CPC_ULTRA3:
 	case CPC_ULTRA3_PLUS:
 	case CPC_ULTRA3_I:
+	case CPC_ULTRA4_PLUS:
 		return (sizeof (event->ce_pic) / sizeof (event->ce_pic[0]));
 	default:
 		return (0);
@@ -466,12 +599,13 @@ node2ver(char *node)
 	} else if (strcmp(node, "SUNW,UltraSPARC-III") == 0)
 		return (CPC_ULTRA3);
 	else if (strcmp(node, "SUNW,UltraSPARC-III+") == 0 ||
-	    strcmp(node, "SUNW,UltraSPARC-IV") == 0 ||
-	    strcmp(node, "SUNW,UltraSPARC-IV+") == 0)
+	    strcmp(node, "SUNW,UltraSPARC-IV") == 0)
 		return (CPC_ULTRA3_PLUS);
 	else if (strcmp(node, "SUNW,UltraSPARC-IIIi") == 0 ||
 	    strcmp(node, "SUNW,UltraSPARC-IIIi+") == 0)
 		return (CPC_ULTRA3_I);
+	else if (strcmp(node, "SUNW,UltraSPARC-IV+") == 0)
+		return (CPC_ULTRA4_PLUS);
 
 	return (-1);
 }
diff --git a/usr/src/lib/libcpc/sparc/event_ultra.c b/usr/src/lib/libcpc/sparc/event_ultra.c
index 39aec138b6..c99e706bb2 100644
--- a/usr/src/lib/libcpc/sparc/event_ultra.c
+++ b/usr/src/lib/libcpc/sparc/event_ultra.c
@@ -20,7 +20,7 @@
  * CDDL HEADER END
  */
 /*
- * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
+ * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
  */
 
@@ -75,6 +75,7 @@ cpc_getusage(int cpuver)
 	case CPC_ULTRA3:
 	case CPC_ULTRA3_PLUS:
 	case CPC_ULTRA3_I:
+	case CPC_ULTRA4_PLUS:
 		return ("pic0=<event0>,pic1=<event1> "
 		    "[,sys] "
 		    "[,nouser]");
@@ -230,6 +231,7 @@ cpc_strtoevent(int cpuver, const char *spec, cpc_event_t *event)
 	case CPC_ULTRA3:
 	case CPC_ULTRA3_PLUS:
 	case CPC_ULTRA3_I:
+	case CPC_ULTRA4_PLUS:
 		keyvals = us3_keyvals;
 		ntokens = sizeof (us3_keyvals) / sizeof	(us3_keyvals[0]);
 		bits = &event->ce_pcr;
@@ -366,6 +368,7 @@ unmake_pcr(uint64_t pcr, int cpuver, struct xpcr *xpcr)
 	case CPC_ULTRA3:
 	case CPC_ULTRA3_PLUS:
 	case CPC_ULTRA3_I:
+	case CPC_ULTRA4_PLUS:
 		kv = us3_keyvals;
 		break;
 	}
@@ -392,6 +395,7 @@ cpc_eventtostr(cpc_event_t *event)
 	case CPC_ULTRA3:
 	case CPC_ULTRA3_PLUS:
 	case CPC_ULTRA3_I:
+	case CPC_ULTRA4_PLUS:
 		break;
 	default:
 		return (NULL);
@@ -462,6 +466,7 @@ __cpc_eventtoset(cpc_t *cpc, cpc_event_t *event, int iflags)
 	case CPC_ULTRA3:
 	case CPC_ULTRA3_PLUS:
 	case CPC_ULTRA3_I:
+	case CPC_ULTRA4_PLUS:
 		break;
 	default:
 		return (NULL);