diff options
| author | et142600 <none@none> | 2006-12-18 17:33:27 -0800 |
|---|---|---|
| committer | et142600 <none@none> | 2006-12-18 17:33:27 -0800 |
| commit | bf8fc2340620695a402331e5da7c7db43264174d (patch) | |
| tree | 9b23a124fe91273377ea5adbd2b56d8eba5778dc /usr/src/uts/common/sys/pci.h | |
| parent | 60ab199ec2cf89967053c7b7c15b36530083b272 (diff) | |
| download | illumos-joyent-bf8fc2340620695a402331e5da7c7db43264174d.tar.gz | |
PSARC/2006/599 SPARC PCI Express Fabric FMA Support
6345809 SPARC PCIe systems should not call pci_ereport_post
6404017 PX Error handling code should match error philosophy spec
6418713 Failed PIOs in PCIe sparc platforms may go undetected
6466248 Support PCIe Fabric FMA for SPARC Platforms
--HG--
rename : deleted_files/usr/src/uts/common/io/pcie_fault.c => usr/src/uts/common/io/pcie_fault.c
rename : deleted_files/usr/src/uts/sun4v/io/px/px_err_gen.c => usr/src/uts/sun4v/io/px/px_err_gen.c
Diffstat (limited to 'usr/src/uts/common/sys/pci.h')
| -rw-r--r-- | usr/src/uts/common/sys/pci.h | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/usr/src/uts/common/sys/pci.h b/usr/src/uts/common/sys/pci.h index 8eecb28c77..0aa406df04 100644 --- a/usr/src/uts/common/sys/pci.h +++ b/usr/src/uts/common/sys/pci.h @@ -695,8 +695,19 @@ extern "C" { /* * PCI-X bridge capability related definitions */ -#define PCI_PCIX_SEC_STATUS 0x2 /* Secondary status register offset */ -#define PCI_PCIX_BDG_STATUS 0x4 /* Bridge Status register offset */ +#define PCI_PCIX_SEC_STATUS 0x2 /* Secondary Status offset */ +#define PCI_PCIX_SEC_STATUS_SCD 0x4 /* Split Completion Discarded */ +#define PCI_PCIX_SEC_STATUS_USC 0x8 /* Unexpected Split Complete */ +#define PCI_PCIX_SEC_STATUS_SCO 0x10 /* Split Completion Overrun */ +#define PCI_PCIX_SEC_STATUS_SRD 0x20 /* Split Completion Delayed */ +#define PCI_PCIX_SEC_STATUS_ERR_MASK 0x3C + +#define PCI_PCIX_BDG_STATUS 0x4 /* Bridge Status offset */ +#define PCI_PCIX_BDG_STATUS_USC 0x80000 +#define PCI_PCIX_BDG_STATUS_SCO 0x100000 +#define PCI_PCIX_BDG_STATUS_SRD 0x200000 +#define PCI_PCIX_BDG_STATUS_ERR_MASK 0x380000 + #define PCI_PCIX_UP_SPL_CTL 0x8 /* Upstream split ctrl reg offset */ #define PCI_PCIX_DOWN_SPL_CTL 0xC /* Downstream split ctrl reg offset */ #define PCI_PCIX_BDG_ECC_STATUS 0x10 /* ECC Status register offset */ |