PSARC 2006/020 FMA for Athlon 64 and Opteron Processors

PSARC 2006/028 eversholt language enhancements
6181364 Eversholt needs method to revise value of a fault's property
6183842 eft can construct extra propagations in the instance tree
6187143 eversholt needs to use fmd_case_add_serd() to add counted ereports against open case
6232253 wildcarding may not pick up matches buried in config path
6284455 eversholt wildcarding and vertical expansion have trouble working together
6298484 properties are not auto-converting to integers in eversholt constraints
6298972 eversholt should be able to mark faults as no-message like the cpumem DE
6298974 nested SERD engines don't work
6298981 eft memory usage could improve by caching common constraint expressions
6323319 call() is not allowing string-valued returns
6323322 a global variable should be allowed as the RHS of an nvpair
6323393 eversholt caches a little too much info when caching constraints
6323554 eversholt type conversion can cause core dump
6328144 libexacct leaks like a really big sieve when faced with non-exacct input
6331093 payloadprop should be able to read and interpret hc scheme fmris
6332245 payloadprop() returns cached value from existing FME when not appropriate
6333617 eversholt should have way to check if a global is defined
6346926 eversholt needs a way to maintain diagnosis statistics
6359264 Provide FMA support for AMD64 processors
6363503 Can not register error handler callbacks for root node
6366821 cpu scheme serial number should be a string
6367031 eft.so leaks memory
6370284 cpumem-diagnosis checks the asru version against FM_EREPORT_VERSION instead of FM_CPU_SCHEME_VERSION
6377319 eft could close cases for resources already in the faulty state
6379498 fmd dies on assertion failure when repairing an fmd module
6381022 fmd_case_insert_event() should reject duplicates and save memory

--HG--
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rename : usr/src/uts/common/sys/fm/cpu/UltraSPARC-II.h => usr/src/uts/sparc/sys/fm/cpu/UltraSPARC-II.h
rename : usr/src/uts/common/sys/fm/cpu/UltraSPARC-III.h => usr/src/uts/sparc/sys/fm/cpu/UltraSPARC-III.h
rename : usr/src/uts/common/sys/fm/cpu/UltraSPARC-T1.h => usr/src/uts/sparc/sys/fm/cpu/UltraSPARC-T1.h

1 files changed, 223 insertions, 0 deletions

diff --git a/usr/src/uts/intel/sys/fm/cpu/AMD.h b/usr/src/uts/intel/sys/fm/cpu/AMD.h
new file mode 100644
index 0000000000..bb7aa427e5
--- /dev/null
+++ b/usr/src/uts/intel/sys/fm/cpu/AMD.h
@@ -0,0 +1,223 @@
+/*
+ * CDDL HEADER START
+ *
+ * The contents of this file are subject to the terms of the
+ * Common Development and Distribution License, Version 1.0 only
+ * (the "License").  You may not use this file except in compliance
+ * with the License.
+ *
+ * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
+ * or http://www.opensolaris.org/os/licensing.
+ * See the License for the specific language governing permissions
+ * and limitations under the License.
+ *
+ * When distributing Covered Code, include this CDDL HEADER in each
+ * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
+ * If applicable, add the following below this CDDL HEADER, with the
+ * fields enclosed by brackets "[]" replaced with your own identifying
+ * information: Portions Copyright [yyyy] [name of copyright owner]
+ *
+ * CDDL HEADER END
+ */
+
+/*
+ * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
+ * Use is subject to license terms.
+ */
+
+#ifndef _SYS_FM_CPU_AMD_H
+#define	_SYS_FM_CPU_AMD_H
+
+#pragma ident	"%Z%%M%	%I%	%E% SMI"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Ereport class subcategory for AMD processors */
+#define	FM_EREPORT_CPU_AMD	"amd"
+
+/*
+ * Ereport payload definitions
+ */
+#define	FM_EREPORT_PAYLOAD_NAME_BANK_STAT	"bank-status"
+#define	FM_EREPORT_PAYLOAD_NAME_BANK_NUM	"bank-number"
+#define	FM_EREPORT_PAYLOAD_NAME_ADDR		"addr"
+#define	FM_EREPORT_PAYLOAD_NAME_ADDR_VALID	"addr-valid"
+#define	FM_EREPORT_PAYLOAD_NAME_SYND		"syndrome"
+#define	FM_EREPORT_PAYLOAD_NAME_SYND_TYPE	"syndrome-type"
+#define	FM_EREPORT_PAYLOAD_NAME_IP		"ip"
+#define	FM_EREPORT_PAYLOAD_NAME_PRIV		"privileged"
+#define	FM_EREPORT_PAYLOAD_NAME_RESOURCE	"resource"
+
+#define	FM_EREPORT_PAYLOAD_FLAG_BANK_STAT	0x0000000000000001
+#define	FM_EREPORT_PAYLOAD_FLAG_BANK_NUM	0x0000000000000002
+#define	FM_EREPORT_PAYLOAD_FLAG_ADDR		0x0000000000000004
+#define	FM_EREPORT_PAYLOAD_FLAG_ADDR_VALID	0x0000000000000008
+#define	FM_EREPORT_PAYLOAD_FLAG_SYND		0x0000000000000010
+#define	FM_EREPORT_PAYLOAD_FLAG_SYND_TYPE	0x0000000000000020
+#define	FM_EREPORT_PAYLOAD_FLAG_IP		0x0000000000000040
+#define	FM_EREPORT_PAYLOAD_FLAG_PRIV		0x0000000000000080
+#define	FM_EREPORT_PAYLOAD_FLAG_RESOURCE	0x0000000000000100
+#define	FM_EREPORT_PAYLOAD_FLAG_STACK		0x0000000000000200
+
+#define	FM_EREPORT_PAYLOAD_FLAGS_BANK \
+	(FM_EREPORT_PAYLOAD_FLAG_BANK_STAT | FM_EREPORT_PAYLOAD_FLAG_BANK_NUM)
+#define	FM_EREPORT_PAYLOAD_FLAGS_ADDR \
+	(FM_EREPORT_PAYLOAD_FLAG_ADDR | FM_EREPORT_PAYLOAD_FLAG_ADDR_VALID)
+#define	FM_EREPORT_PAYLOAD_FLAGS_SYND \
+	(FM_EREPORT_PAYLOAD_FLAG_SYND | FM_EREPORT_PAYLOAD_FLAG_SYND_TYPE)
+#define	FM_EREPORT_PAYLOAD_FLAGS_RESOURCE \
+	(FM_EREPORT_PAYLOAD_FLAG_RESOURCE)
+#define	FM_EREPORT_PAYLOAD_FLAGS_COMMON \
+	(FM_EREPORT_PAYLOAD_FLAGS_BANK | FM_EREPORT_PAYLOAD_FLAG_IP | \
+	FM_EREPORT_PAYLOAD_FLAG_PRIV)
+#define	FM_EREPORT_PAYLOAD_FLAGS_NB \
+	(FM_EREPORT_PAYLOAD_FLAG_STACK)
+
+#define	FM_EREPORT_PAYLOAD_FLAGS_1(f1) \
+	(FM_EREPORT_PAYLOAD_FLAGS_COMMON | FM_EREPORT_PAYLOAD_FLAGS_##f1)
+#define	FM_EREPORT_PAYLOAD_FLAGS_2(f1, f2) \
+	(FM_EREPORT_PAYLOAD_FLAGS_COMMON | FM_EREPORT_PAYLOAD_FLAGS_##f1 | \
+	FM_EREPORT_PAYLOAD_FLAGS_##f2)
+#define	FM_EREPORT_PAYLOAD_FLAGS_3(f1, f2, f3) \
+	(FM_EREPORT_PAYLOAD_FLAGS_COMMON | FM_EREPORT_PAYLOAD_FLAGS_##f1 | \
+	FM_EREPORT_PAYLOAD_FLAGS_##f2 | FM_EREPORT_PAYLOAD_FLAGS_##f3)
+
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_DC_INF_SYS_ECC1 \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, SYND)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_DC_INF_L2_ECC1 \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, SYND)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_DC_INF_SYS_ECCM \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, SYND)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_DC_INF_L2_ECCM \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, SYND)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_DC_DATA_ECC1 \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, SYND)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_DC_DATA_ECC1_UC \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, SYND)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_DC_DATA_ECCM \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, SYND)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_DC_TAG_PAR \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_DC_STAG_PAR \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_DC_L1TLB_PAR \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_DC_L2TLB_PAR \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_IC_INF_SYS_ECC1 \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_IC_INF_L2_ECC1 \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_IC_INF_SYS_ECCM \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_IC_INF_L2_ECCM \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_IC_DATA_PAR \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_IC_TAG_PAR \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_IC_STAG_PAR \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_IC_L1TLB_PAR \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_IC_L2TLB_PAR \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_IC_RDDE \
+	FM_EREPORT_PAYLOAD_FLAGS_COMMON
+
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_BU_L2D_ECC1 \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, SYND)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_BU_L2D_ECCM \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, SYND)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_BU_L2T_PAR \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_BU_L2T_ECC1 \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, SYND)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_BU_L2T_ECCM \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, SYND)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_BU_S_RDE \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_BU_S_ECC1 \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, SYND)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_BU_S_ECCM \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, SYND)
+
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_LS_S_RDE \
+	FM_EREPORT_PAYLOAD_FLAGS_COMMON
+
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_NB_MEM_CE \
+	FM_EREPORT_PAYLOAD_FLAGS_3(ADDR, SYND, RESOURCE)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_NB_MEM_UE \
+	FM_EREPORT_PAYLOAD_FLAGS_3(ADDR, SYND, RESOURCE)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_NB_HT_CRC \
+	FM_EREPORT_PAYLOAD_FLAGS_COMMON
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_NB_HT_SYNC \
+	FM_EREPORT_PAYLOAD_FLAGS_COMMON
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_NB_MA \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, NB)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_NB_TA \
+	FM_EREPORT_PAYLOAD_FLAGS_2(ADDR, NB)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_NB_GART_WALK \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_NB_RMW \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_NB_WDOG \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+
+#define	FM_EREPORT_PAYLOAD_FLAGS_CPU_AMD_UNKNOWN \
+	FM_EREPORT_PAYLOAD_FLAGS_1(ADDR)
+
+#define	FM_EREPORT_CPU_AMD_DC_INF_SYS_ECC1	"dc.inf_sys_ecc1"
+#define	FM_EREPORT_CPU_AMD_DC_INF_SYS_ECCM	"dc.inf_sys_eccm"
+#define	FM_EREPORT_CPU_AMD_DC_INF_L2_ECC1	"dc.inf_l2_ecc1"
+#define	FM_EREPORT_CPU_AMD_DC_INF_L2_ECCM	"dc.inf_l2_eccm"
+#define	FM_EREPORT_CPU_AMD_DC_DATA_ECC1		"dc.data_ecc1"
+#define	FM_EREPORT_CPU_AMD_DC_DATA_ECC1_UC	"dc.data_ecc1_uc"
+#define	FM_EREPORT_CPU_AMD_DC_DATA_ECCM		"dc.data_eccm"
+#define	FM_EREPORT_CPU_AMD_DC_TAG_PAR		"dc.tag_par"
+#define	FM_EREPORT_CPU_AMD_DC_STAG_PAR		"dc.stag_par"
+#define	FM_EREPORT_CPU_AMD_DC_L1TLB_PAR		"dc.l1tlb_par"
+#define	FM_EREPORT_CPU_AMD_DC_L2TLB_PAR		"dc.l2tlb_par"
+
+#define	FM_EREPORT_CPU_AMD_IC_INF_SYS_ECC1	"ic.inf_sys_ecc1"
+#define	FM_EREPORT_CPU_AMD_IC_INF_SYS_ECCM	"ic.inf_sys_eccm"
+#define	FM_EREPORT_CPU_AMD_IC_INF_L2_ECC1	"ic.inf_l2_ecc1"
+#define	FM_EREPORT_CPU_AMD_IC_INF_L2_ECCM	"ic.inf_l2_eccm"
+#define	FM_EREPORT_CPU_AMD_IC_DATA_PAR		"ic.data_par"
+#define	FM_EREPORT_CPU_AMD_IC_TAG_PAR		"ic.tag_par"
+#define	FM_EREPORT_CPU_AMD_IC_STAG_PAR		"ic.stag_par"
+#define	FM_EREPORT_CPU_AMD_IC_L1TLB_PAR		"ic.l1tlb_par"
+#define	FM_EREPORT_CPU_AMD_IC_L2TLB_PAR		"ic.l2tlb_par"
+#define	FM_EREPORT_CPU_AMD_IC_RDDE		"ic.rdde"
+
+#define	FM_EREPORT_CPU_AMD_BU_L2D_ECC1		"bu.l2d_ecc1"
+#define	FM_EREPORT_CPU_AMD_BU_L2D_ECCM		"bu.l2d_eccm"
+#define	FM_EREPORT_CPU_AMD_BU_L2T_PAR		"bu.l2t_par"
+#define	FM_EREPORT_CPU_AMD_BU_L2T_ECC1		"bu.l2t_ecc1"
+#define	FM_EREPORT_CPU_AMD_BU_L2T_ECCM		"bu.l2t_eccm"
+#define	FM_EREPORT_CPU_AMD_BU_S_RDE		"bu.s_rde"
+#define	FM_EREPORT_CPU_AMD_BU_S_ECC1		"bu.s_ecc1"
+#define	FM_EREPORT_CPU_AMD_BU_S_ECCM		"bu.s_eccm"
+
+#define	FM_EREPORT_CPU_AMD_LS_S_RDE		"ls.s_rde"
+
+#define	FM_EREPORT_CPU_AMD_NB_MEM_CE		"nb.mem_ce"
+#define	FM_EREPORT_CPU_AMD_NB_MEM_UE		"nb.mem_ue"
+#define	FM_EREPORT_CPU_AMD_NB_HT_CRC		"nb.ht_crc"
+#define	FM_EREPORT_CPU_AMD_NB_HT_SYNC		"nb.ht_sync"
+#define	FM_EREPORT_CPU_AMD_NB_MA		"nb.ma"
+#define	FM_EREPORT_CPU_AMD_NB_TA		"nb.ta"
+#define	FM_EREPORT_CPU_AMD_NB_GART_WALK		"nb.gart_walk"
+#define	FM_EREPORT_CPU_AMD_NB_RMW		"nb.rmw"
+#define	FM_EREPORT_CPU_AMD_NB_WDOG		"nb.wdog"
+
+#define	FM_EREPORT_CPU_AMD_UNKNOWN		"unknown"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SYS_FM_CPU_AMD_H */