[illumos-gate merge]

commit 6eedf6a58bb97d935b764a55719f82a486168fbb
    4806 define x2apic feature flag
    4807 pcplusmp & apix should use x2apic feature flag
commit 9b1d70f8223c4278acf4ca60eaf5dd285f72eeee
    4805 apic_mode global should be an enum
commit a833a696f1726fd5d95ded0820612f465a2dad8d
    4804 apix & pcplusmp are nearly warning free already

Conflicts:
	usr/src/uts/intel/sys/x86_archext.h

9 files changed, 25 insertions, 81 deletions

diff --git a/usr/src/uts/i86pc/apix/Makefile b/usr/src/uts/i86pc/apix/Makefile
index 501e095b4d..e65d4cf1ee 100644
--- a/usr/src/uts/i86pc/apix/Makefile
+++ b/usr/src/uts/i86pc/apix/Makefile
@@ -63,9 +63,6 @@ $(NOT_RELEASE_BUILD)DEBUG_DEFS	+= $(DEBUG_FLGS)
 LDFLAGS		+= -dy -N misc/acpica
 
 CERRWARN	+= -_gcc=-Wno-uninitialized
-CERRWARN	+= -_gcc=-Wno-unused-variable
-CERRWARN	+= -_gcc=-Wno-unused-function
-CERRWARN	+= -_gcc=-Wno-empty-body
 
 #
 #	Default build targets.
diff --git a/usr/src/uts/i86pc/io/hpet_acpi.c b/usr/src/uts/i86pc/io/hpet_acpi.c
index b618e491e7..d65c514fe4 100644
--- a/usr/src/uts/i86pc/io/hpet_acpi.c
+++ b/usr/src/uts/i86pc/io/hpet_acpi.c
@@ -54,18 +54,12 @@ static uint64_t hpet_read_gen_config(hpet_info_t *hip);
 static uint64_t hpet_read_gen_intrpt_stat(hpet_info_t *hip);
 static uint64_t hpet_read_timer_N_config(hpet_info_t *hip, uint_t n);
 static hpet_TN_conf_cap_t hpet_convert_timer_N_config(uint64_t conf);
-/* LINTED E_STATIC_UNUSED */
-static uint64_t hpet_read_timer_N_comp(hpet_info_t *hip, uint_t n);
-/* LINTED E_STATIC_UNUSED */
-static void hpet_write_gen_cap(hpet_info_t *hip, uint64_t l);
 static void hpet_write_gen_config(hpet_info_t *hip, uint64_t l);
 static void hpet_write_gen_intrpt_stat(hpet_info_t *hip, uint64_t l);
 static void hpet_write_timer_N_config(hpet_info_t *hip, uint_t n, uint64_t l);
 static void hpet_write_timer_N_comp(hpet_info_t *hip, uint_t n, uint64_t l);
 static void hpet_disable_timer(hpet_info_t *hip, uint32_t timer_n);
 static void hpet_enable_timer(hpet_info_t *hip, uint32_t timer_n);
-/* LINTED E_STATIC_UNUSED */
-static void hpet_write_main_counter_value(hpet_info_t *hip, uint64_t l);
 static int hpet_get_IOAPIC_intr_capable_timer(hpet_info_t *hip);
 static int hpet_timer_available(uint32_t allocated_timers, uint32_t n);
 static void hpet_timer_alloc(uint32_t *allocated_timers, uint32_t n);
@@ -526,17 +520,6 @@ hpet_convert_timer_N_config(uint64_t conf)
 }
 
 static uint64_t
-hpet_read_timer_N_comp(hpet_info_t *hip, uint_t n)
-{
-	if (hip->timer_n_config[n].size_cap == 1)
-		return (*(uint64_t *)
-		    HPET_TIMER_N_COMP_ADDRESS(hip->logical_address, n));
-	else
-		return (*(uint32_t *)
-		    HPET_TIMER_N_COMP_ADDRESS(hip->logical_address, n));
-}
-
-static uint64_t
 hpet_read_main_counter_value(hpet_info_t *hip)
 {
 	uint64_t	value;
@@ -571,12 +554,6 @@ hpet_read_main_counter_value(hpet_info_t *hip)
 }
 
 static void
-hpet_write_gen_cap(hpet_info_t *hip, uint64_t l)
-{
-	*(uint64_t *)HPET_GEN_CAP_ADDRESS(hip->logical_address) = l;
-}
-
-static void
 hpet_write_gen_config(hpet_info_t *hip, uint64_t l)
 {
 	*(uint64_t *)HPET_GEN_CONFIG_ADDRESS(hip->logical_address) = l;
@@ -625,28 +602,6 @@ hpet_enable_timer(hpet_info_t *hip, uint32_t timer_n)
 	hpet_write_timer_N_config(hip, timer_n, l);
 }
 
-static void
-hpet_write_main_counter_value(hpet_info_t *hip, uint64_t l)
-{
-	uint32_t	*address;
-
-	/*
-	 * HPET spec 1.0a states main counter register should be halted before
-	 * it is written to.
-	 */
-	ASSERT(!(hpet_read_gen_config(hip) & HPET_GCFR_ENABLE_CNF));
-
-	if (hip->gen_cap.count_size_cap == 1) {
-		*(uint64_t *)HPET_MAIN_COUNTER_ADDRESS(hip->logical_address)
-		    = l;
-	} else {
-		address = (uint32_t *)HPET_MAIN_COUNTER_ADDRESS(
-		    hip->logical_address);
-
-		address[0] = (uint32_t)(l & 0xFFFFFFFF);
-	}
-}
-
 /*
  * Add the interrupt handler for I/O APIC interrupt number (interrupt line).
  *
diff --git a/usr/src/uts/i86pc/io/mp_platform_misc.c b/usr/src/uts/i86pc/io/mp_platform_misc.c
index af0e0cff00..3737a59a8d 100644
--- a/usr/src/uts/i86pc/io/mp_platform_misc.c
+++ b/usr/src/uts/i86pc/io/mp_platform_misc.c
@@ -553,7 +553,7 @@ apic_delspl_common(int irqno, int ipl, int min_ipl, int max_ipl)
 	if ((irqptr->airq_ipl != max_ipl) && (max_ipl != PSM_INVALID_IPL) &&
 	    !ioapic_mask_workaround[irqptr->airq_ioapicindex]) {
 		apic_irq_t	*irqp;
-		if (vector = apic_allocate_vector(max_ipl, irqno, 1)) {
+		if ((vector = apic_allocate_vector(max_ipl, irqno, 1))) {
 			apic_mark_vector(irqheadptr->airq_vector, vector);
 			irqp = irqheadptr;
 			while (irqp) {
diff --git a/usr/src/uts/i86pc/io/pcplusmp/apic.c b/usr/src/uts/i86pc/io/pcplusmp/apic.c
index db5674aa5a..d65e4db941 100644
--- a/usr/src/uts/i86pc/io/pcplusmp/apic.c
+++ b/usr/src/uts/i86pc/io/pcplusmp/apic.c
@@ -215,14 +215,6 @@ static struct	psm_info apic_psm_info = {
 
 static void *apic_hdlp;
 
-/*
- * apic_let_idle_redistribute can have the following values:
- * 0 - If clock decremented it from 1 to 0, clock has to call redistribute.
- * apic_redistribute_lock prevents multiple idle cpus from redistributing
- */
-int	apic_num_idle_redistributions = 0;
-static	int apic_let_idle_redistribute = 0;
-
 /* to gather intr data and redistribute */
 static void apic_redistribute_compute(void);
 
@@ -798,7 +790,7 @@ apic_get_ipivect(int ipl, int type)
 	int irq;
 
 	if ((irq = apic_allocate_irq(APIC_VECTOR(ipl))) != -1) {
-		if (vector = apic_allocate_vector(ipl, irq, 1)) {
+		if ((vector = apic_allocate_vector(ipl, irq, 1))) {
 			apic_irq_table[irq]->airq_mps_intr_index =
 			    RESERVE_INDEX;
 			apic_irq_table[irq]->airq_vector = vector;
diff --git a/usr/src/uts/i86pc/io/pcplusmp/apic_regops.c b/usr/src/uts/i86pc/io/pcplusmp/apic_regops.c
index c50fa98045..eba22ca090 100644
--- a/usr/src/uts/i86pc/io/pcplusmp/apic_regops.c
+++ b/usr/src/uts/i86pc/io/pcplusmp/apic_regops.c
@@ -22,6 +22,9 @@
  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
  */
+/*
+ * Copyright 2014 Josef 'Jeff' Sipek <jeffpc@josefsipek.net>
+ */
 
 #include <sys/cpuvar.h>
 #include <sys/psm.h>
@@ -61,7 +64,7 @@ static void local_x2apic_write_int_cmd(uint32_t cpu_id, uint32_t cmd1);
  * -----------------------------------------------------------
  */
 int	x2apic_enable = 1;
-int 	apic_mode = LOCAL_APIC;		/* Default mode is Local APIC */
+apic_mode_t apic_mode = LOCAL_APIC;	/* Default mode is Local APIC */
 
 /* Uses MMIO (Memory Mapped IO) */
 static apic_reg_ops_t local_apic_regs_ops = {
@@ -94,7 +97,6 @@ apic_reg_ops_t *apic_reg_ops = &local_apic_regs_ops;
 void apic_send_EOI();
 void apic_send_directed_EOI(uint32_t irq);
 
-#define	X2APIC_CPUID_BIT	21
 #define	X2APIC_ENABLE_BIT	10
 
 /*
@@ -233,15 +235,10 @@ apic_send_directed_EOI(uint32_t irq)
 int
 apic_detect_x2apic(void)
 {
-	struct cpuid_regs cp;
-
 	if (x2apic_enable == 0)
 		return (0);
 
-	cp.cp_eax = 1;
-	(void) __cpuid_insn(&cp);
-
-	return ((cp.cp_ecx & (0x1 << X2APIC_CPUID_BIT)) ? 1 : 0);
+	return (is_x86_feature(x86_featureset, X86FSET_X2APIC));
 }
 
 void
diff --git a/usr/src/uts/i86pc/os/cpuid.c b/usr/src/uts/i86pc/os/cpuid.c
index fce8fd9c23..a9b4428347 100644
--- a/usr/src/uts/i86pc/os/cpuid.c
+++ b/usr/src/uts/i86pc/os/cpuid.c
@@ -22,6 +22,7 @@
  * Copyright (c) 2004, 2010, Oracle and/or its affiliates. All rights reserved.
  * Copyright (c) 2011 by Delphix. All rights reserved.
  * Copyright 2013 Nexenta Systems, Inc. All rights reserved.
+ * Copyright 2014 Josef "Jeff" Sipek <jeffpc@josefsipek.net>
  */
 /*
  * Copyright (c) 2010, Intel Corporation.
@@ -163,7 +164,8 @@ static char *x86_feature_names[NUM_X86_FEATURES] = {
 	"svm",
 	"topoext",
 	"f16c",
-	"rdrand"
+	"rdrand",
+	"x2apic",
 };
 
 boolean_t
@@ -1311,6 +1313,9 @@ cpuid_pass1(cpu_t *cpu, uchar_t *featureset)
 			}
 		}
 	}
+	if (cp->cp_ecx & CPUID_INTC_ECX_X2APIC) {
+		add_x86_feature(featureset, X86FSET_X2APIC);
+	}
 	if (cp->cp_edx & CPUID_INTC_EDX_DE) {
 		add_x86_feature(featureset, X86FSET_DE);
 	}
diff --git a/usr/src/uts/i86pc/pcplusmp/Makefile b/usr/src/uts/i86pc/pcplusmp/Makefile
index c65a382e71..6590ef9f28 100644
--- a/usr/src/uts/i86pc/pcplusmp/Makefile
+++ b/usr/src/uts/i86pc/pcplusmp/Makefile
@@ -65,8 +65,6 @@ $(NOT_RELEASE_BUILD)DEBUG_DEFS	+= $(DEBUG_FLGS)
 #
 LDFLAGS		+= -dy -N misc/acpica
 
-CFLAGS		+= -Dbug1157974 -Dbug1155030
-
 #
 # For now, disable these lint checks; maintainers should endeavor
 # to investigate and remove these for maximum lint coverage.
@@ -77,11 +75,7 @@ LINTTAGS	+= -erroff=E_SUPPRESSION_DIRECTIVE_UNUSED
 LINTTAGS	+= -erroff=E_STATIC_UNUSED
 LINTTAGS	+= -erroff=E_ASSIGN_NARROW_CONV
 
-CERRWARN	+= -_gcc=-Wno-parentheses
 CERRWARN	+= -_gcc=-Wno-uninitialized
-CERRWARN	+= -_gcc=-Wno-unused-function
-CERRWARN	+= -_gcc=-Wno-unused-variable
-CERRWARN	+= -_gcc=-Wno-empty-body
 
 #
 #	Default build targets.
diff --git a/usr/src/uts/i86pc/sys/apic.h b/usr/src/uts/i86pc/sys/apic.h
index 8f9803290c..11ae48340a 100644
--- a/usr/src/uts/i86pc/sys/apic.h
+++ b/usr/src/uts/i86pc/sys/apic.h
@@ -103,10 +103,12 @@ extern "C" {
 #define	APIC_DIVIDE_REG		0xf8
 
 /* Various mode for local APIC. Modes are mutually exclusive  */
-#define	APIC_IS_DISABLED	0x0
-#define	APIC_MODE_NOTSET	0x1
-#define	LOCAL_APIC		0x2
-#define	LOCAL_X2APIC		0x3
+typedef enum apic_mode {
+	APIC_IS_DISABLED = 0,
+	APIC_MODE_NOTSET,
+	LOCAL_APIC,
+	LOCAL_X2APIC
+} apic_mode_t;
 
 /* x2APIC SELF IPI Register */
 #define	X2APIC_SELF_IPI		0xFC
@@ -865,7 +867,7 @@ extern int apic_sci_vect;
 extern int apic_hpet_vect;
 extern uchar_t apic_ipls[];
 extern apic_reg_ops_t *apic_reg_ops;
-extern int apic_mode;
+extern apic_mode_t apic_mode;
 extern void x2apic_update_psm();
 extern void apic_change_ops();
 extern void apic_common_send_ipi(int, int);
diff --git a/usr/src/uts/intel/sys/x86_archext.h b/usr/src/uts/intel/sys/x86_archext.h
index 81083eea05..d61147295a 100644
--- a/usr/src/uts/intel/sys/x86_archext.h
+++ b/usr/src/uts/intel/sys/x86_archext.h
@@ -31,6 +31,7 @@
  * Copyright (c) 2012, Joyent, Inc. All rights reserved.
  * Copyright 2012 Jens Elkner <jel+illumos@cs.uni-magdeburg.de>
  * Copyright 2012 Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org>
+ * Copyright 2014 Josef 'Jeff' Sipek <jeffpc@josefsipek.net>
  */
 
 #ifndef _SYS_X86_ARCHEXT_H
@@ -116,7 +117,7 @@ extern "C" {
 #define	CPUID_INTC_ECX_DCA	0x00040000	/* direct cache access */
 #define	CPUID_INTC_ECX_SSE4_1	0x00080000	/* SSE4.1 insns */
 #define	CPUID_INTC_ECX_SSE4_2	0x00100000	/* SSE4.2 insns */
-#define	CPUID_INTC_ECX_X2APIC	0x00200000	/* x2apic support */
+#define	CPUID_INTC_ECX_X2APIC	0x00200000	/* x2APIC */
 #define	CPUID_INTC_ECX_MOVBE	0x00400000	/* MOVBE insn */
 #define	CPUID_INTC_ECX_POPCNT	0x00800000	/* POPCNT insn */
 #define	CPUID_INTC_ECX_TSCDL	0x01000000	/* Deadline TSC */
@@ -357,7 +358,7 @@ extern "C" {
 #define	X86FSET_PGE		4
 #define	X86FSET_DE		5
 #define	X86FSET_CMOV		6
-#define	X86FSET_MMX 		7
+#define	X86FSET_MMX		7
 #define	X86FSET_MCA		8
 #define	X86FSET_PAE		9
 #define	X86FSET_CX8		10
@@ -390,6 +391,7 @@ extern "C" {
 #define	X86FSET_TOPOEXT		37
 #define	X86FSET_F16C		38
 #define	X86FSET_RDRAND		39
+#define	X86FSET_X2APIC		40
 
 /*
  * flags to patch tsc_read routine.
@@ -650,7 +652,7 @@ extern "C" {
 
 #if defined(_KERNEL) || defined(_KMEMUSER)
 
-#define	NUM_X86_FEATURES	40
+#define	NUM_X86_FEATURES	41
 extern uchar_t x86_featureset[];
 
 extern void free_x86_featureset(void *featureset);