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| author | Mark Haywood <Mark.Haywood@Sun.COM> | 2009-02-10 20:58:32 -0500 |
|---|---|---|
| committer | Mark Haywood <Mark.Haywood@Sun.COM> | 2009-02-10 20:58:32 -0500 |
| commit | 84e1ed4249618c81c3c770730fe3e5ba51a9a246 (patch) | |
| tree | b3b4e30505d5434a3bc030c5bd1ab85d87e9cc2e /usr/src | |
| parent | a45f3f93509927476463caf678b7806c65d5efe1 (diff) | |
| download | illumos-joyent-84e1ed4249618c81c3c770730fe3e5ba51a9a246.tar.gz | |
6803564 Speedstep needs to enable yet another PDC bit to ensure that HW_ALL domains are supported
Diffstat (limited to 'usr/src')
| -rw-r--r-- | usr/src/uts/i86pc/io/cpudrv/cpudrv_intel.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/usr/src/uts/i86pc/io/cpudrv/cpudrv_intel.c b/usr/src/uts/i86pc/io/cpudrv/cpudrv_intel.c index 100023cff7..8fed6f6a4e 100644 --- a/usr/src/uts/i86pc/io/cpudrv/cpudrv_intel.c +++ b/usr/src/uts/i86pc/io/cpudrv/cpudrv_intel.c @@ -19,7 +19,7 @@ * CDDL HEADER END */ /* - * Copyright 2008 Sun Microsystems, Inc. All rights reserved. + * Copyright 2009 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -43,8 +43,9 @@ #define CPUDRV_INTEL_PDC_C1_HALT 0x0002 #define CPUDRV_INTEL_PDC_TS_MSR 0x0004 #define CPUDRV_INTEL_PDC_MP 0x0008 -#define CPUDRV_INTEL_PDC_PSD 0x0020 +#define CPUDRV_INTEL_PDC_SW_PSD 0x0020 #define CPUDRV_INTEL_PDC_TSD 0x0080 +#define CPUDRV_INTEL_PDC_HW_PSD 0x0800 static uint32_t cpudrv_intel_pdccap = 0; @@ -70,7 +71,7 @@ cpudrv_intel_init(cpudrv_devstate_t *cpudsp) mach_state->cpupm_pstate_ops = &speedstep_ops; cpudrv_intel_pdccap = CPUDRV_INTEL_PDC_PS_MSR | CPUDRV_INTEL_PDC_C1_HALT | CPUDRV_INTEL_PDC_MP | - CPUDRV_INTEL_PDC_PSD; + CPUDRV_INTEL_PDC_SW_PSD | CPUDRV_INTEL_PDC_HW_PSD; } else { mach_state->cpupm_pstate_ops = NULL; } |