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-rw-r--r--usr/src/cmd/bhyve/uart_emul.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/usr/src/cmd/bhyve/uart_emul.c b/usr/src/cmd/bhyve/uart_emul.c
index 5a47e2e9ef..40eefa069a 100644
--- a/usr/src/cmd/bhyve/uart_emul.c
+++ b/usr/src/cmd/bhyve/uart_emul.c
@@ -515,6 +515,16 @@ uart_write(struct uart_softc *sc, int offset, uint8_t value)
sc->thre_int_pending = true;
break;
case REG_IER:
+#ifndef __FreeBSD__
+ /*
+ * Assert an interrupt if re-enabling the THRE intr, since we
+ * always report THRE as active in the status register.
+ */
+ if ((sc->ier & IER_ETXRDY) == 0 &&
+ (value & IER_ETXRDY) != 0) {
+ sc->thre_int_pending = true;
+ }
+#endif
/*
* Apply mask so that bits 4-7 are 0
* Also enables bits 0-3 only if they're 1