diff options
| -rw-r--r-- | usr/src/uts/common/io/cpqary3/cpqary3.h | 4 | ||||
| -rw-r--r-- | usr/src/uts/common/io/cpqary3/cpqary3_ciss_simple.c | 10 |
2 files changed, 14 insertions, 0 deletions
diff --git a/usr/src/uts/common/io/cpqary3/cpqary3.h b/usr/src/uts/common/io/cpqary3/cpqary3.h index f36cc8353e..b53d3db272 100644 --- a/usr/src/uts/common/io/cpqary3/cpqary3.h +++ b/usr/src/uts/common/io/cpqary3/cpqary3.h @@ -216,6 +216,8 @@ typedef struct cpqary3_stats { uint64_t cpqs_tran_starts; uint64_t cpqs_ctlr_resets; unsigned cpqs_max_inflight; + uint64_t cpqs_unclaimed_interrupts; + uint64_t cpqs_claimed_interrupts; } cpqary3_stats_t; /* @@ -271,6 +273,8 @@ struct cpqary3 { uint32_t cpq_last_heartbeat; hrtime_t cpq_last_heartbeat_time; + hrtime_t cpq_last_interrupt_claimed; + hrtime_t cpq_last_interrupt_unclaimed; hrtime_t cpq_last_discovery; hrtime_t cpq_last_reset_start; hrtime_t cpq_last_reset_finish; diff --git a/usr/src/uts/common/io/cpqary3/cpqary3_ciss_simple.c b/usr/src/uts/common/io/cpqary3/cpqary3_ciss_simple.c index 578d361367..137ede57d0 100644 --- a/usr/src/uts/common/io/cpqary3/cpqary3_ciss_simple.c +++ b/usr/src/uts/common/io/cpqary3/cpqary3_ciss_simple.c @@ -20,9 +20,13 @@ cpqary3_isr_hw_simple(caddr_t arg1, caddr_t arg2) { cpqary3_t *cpq = (cpqary3_t *)arg1; uint32_t isr = cpqary3_get32(cpq, CISS_I2O_INTERRUPT_STATUS); + hrtime_t now = gethrtime(); mutex_enter(&cpq->cpq_mutex); if (!(cpq->cpq_status & CPQARY3_CTLR_STATUS_RUNNING)) { + cpq->cpq_stats.cpqs_unclaimed_interrupts++; + cpq->cpq_last_interrupt_unclaimed = now; + /* * We should not be receiving interrupts from the controller * while the driver is not running. @@ -35,6 +39,9 @@ cpqary3_isr_hw_simple(caddr_t arg1, caddr_t arg2) * Check to see if this interrupt came from the device: */ if ((isr & cpq->cpq_board->bd_intrpendmask) == 0) { + cpq->cpq_stats.cpqs_unclaimed_interrupts++; + cpq->cpq_last_interrupt_unclaimed = now; + /* * Check to see if the firmware has come to rest. If it has, * this routine will panic the system. @@ -45,6 +52,9 @@ cpqary3_isr_hw_simple(caddr_t arg1, caddr_t arg2) return (DDI_INTR_UNCLAIMED); } + cpq->cpq_stats.cpqs_claimed_interrupts++; + cpq->cpq_last_interrupt_claimed = now; + /* * The interrupt was from our controller, so collect any pending * command completions. |