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-rw-r--r--usr/src/uts/common/io/nxge/npi/npi_fflp.c106
-rw-r--r--usr/src/uts/common/io/nxge/nxge_hio_guest.c2
-rw-r--r--usr/src/uts/common/io/nxge/nxge_hw.c2
-rw-r--r--usr/src/uts/common/io/nxge/nxge_ipp.c2
-rw-r--r--usr/src/uts/common/io/nxge/nxge_mac.c19
-rw-r--r--usr/src/uts/common/io/nxge/nxge_main.c10
-rw-r--r--usr/src/uts/common/io/nxge/nxge_rxdma.c9
-rw-r--r--usr/src/uts/common/io/nxge/nxge_send.c5
-rw-r--r--usr/src/uts/common/io/nxge/nxge_virtual.c8
-rw-r--r--usr/src/uts/common/sys/null.h33
10 files changed, 82 insertions, 114 deletions
diff --git a/usr/src/uts/common/io/nxge/npi/npi_fflp.c b/usr/src/uts/common/io/nxge/npi/npi_fflp.c
index 3f0b543e83..2e58f96fdb 100644
--- a/usr/src/uts/common/io/nxge/npi/npi_fflp.c
+++ b/usr/src/uts/common/io/nxge/npi/npi_fflp.c
@@ -615,7 +615,7 @@ npi_fflp_fcram_entry_write(npi_handle_t handle, part_id_t partid,
switch (format) {
case FCRAM_ENTRY_OPTIM:
if (location % 8) {
- /* need to be 8 byte alligned */
+ /* need to be 8 byte aligned */
NPI_ERROR_MSG((handle.function, NPI_ERR_CTL,
" FCRAM_ENTRY_OOPTIM Write:"
@@ -631,31 +631,31 @@ npi_fflp_fcram_entry_write(npi_handle_t handle, part_id_t partid,
case FCRAM_ENTRY_EX_IP4:
if (location % 32) {
-/* need to be 32 byte alligned */
+ /* need to be 32 byte aligned */
NPI_ERROR_MSG((handle.function, NPI_ERR_CTL,
" FCRAM_ENTRY_EX_IP4 Write:"
" unaligned location %llx \n",
location));
return (NPI_FFLP_FCRAM_LOC_INVALID);
- }
+ }
- num_subareas = 4;
- autoinc = 1;
+ num_subareas = 4;
+ autoinc = 1;
- break;
+ break;
case FCRAM_ENTRY_EX_IP6:
if (location % 64) {
- /* need to be 64 byte alligned */
+ /* need to be 64 byte aligned */
NPI_ERROR_MSG((handle.function, NPI_ERR_CTL,
- " FCRAM_ENTRY_EX_IP6 Write:"
- " unaligned location %llx \n",
- location));
- return (NPI_FFLP_FCRAM_LOC_INVALID);
+ " FCRAM_ENTRY_EX_IP6 Write:"
+ " unaligned location %llx \n",
+ location));
+ return (NPI_FFLP_FCRAM_LOC_INVALID);
}
num_subareas = 7;
autoinc = 1;
- break;
+ break;
default:
NPI_ERROR_MSG((handle.function, NPI_ERR_CTL,
" fcram_entry_write:"
@@ -713,11 +713,11 @@ npi_fflp_fcram_entry_read(npi_handle_t handle, part_id_t partid,
switch (format) {
case FCRAM_ENTRY_OPTIM:
if (location % 8) {
- NPI_ERROR_MSG((handle.function, NPI_ERR_CTL,
- " FCRAM_ENTRY_OOPTIM Read:"
- " unaligned location %llx \n",
- location));
- /* need to be 8 byte alligned */
+ NPI_ERROR_MSG((handle.function, NPI_ERR_CTL,
+ " FCRAM_ENTRY_OOPTIM Read:"
+ " unaligned location %llx \n",
+ location));
+ /* need to be 8 byte aligned */
return (NPI_FFLP_FCRAM_LOC_INVALID);
}
num_subareas = 1;
@@ -725,11 +725,11 @@ npi_fflp_fcram_entry_read(npi_handle_t handle, part_id_t partid,
break;
case FCRAM_ENTRY_EX_IP4:
if (location % 32) {
- /* need to be 32 byte alligned */
- NPI_ERROR_MSG((handle.function, NPI_ERR_CTL,
- " FCRAM_ENTRY_EX_IP4 READ:"
- " unaligned location %llx \n",
- location));
+ /* need to be 32 byte aligned */
+ NPI_ERROR_MSG((handle.function, NPI_ERR_CTL,
+ " FCRAM_ENTRY_EX_IP4 READ:"
+ " unaligned location %llx \n",
+ location));
return (NPI_FFLP_FCRAM_LOC_INVALID);
}
num_subareas = 4;
@@ -738,24 +738,24 @@ npi_fflp_fcram_entry_read(npi_handle_t handle, part_id_t partid,
break;
case FCRAM_ENTRY_EX_IP6:
if (location % 64) {
- /* need to be 64 byte alligned */
- NPI_ERROR_MSG((handle.function, NPI_ERR_CTL,
- " FCRAM_ENTRY_EX_IP6 READ:"
- " unaligned location %llx \n",
- location));
+ /* need to be 64 byte aligned */
+ NPI_ERROR_MSG((handle.function, NPI_ERR_CTL,
+ " FCRAM_ENTRY_EX_IP6 READ:"
+ " unaligned location %llx \n",
+ location));
return (NPI_FFLP_FCRAM_LOC_INVALID);
- }
+ }
num_subareas = 7;
autoinc = 1;
break;
default:
- NPI_ERROR_MSG((handle.function, NPI_ERR_CTL,
- " fcram_entry_read:"
- " unknown format param location %llx\n",
- location));
- return (NPI_FFLP_SW_PARAM_ERROR);
+ NPI_ERROR_MSG((handle.function, NPI_ERR_CTL,
+ " fcram_entry_read:"
+ " unknown format param location %llx\n",
+ location));
+ return (NPI_FFLP_SW_PARAM_ERROR);
}
addr.value = 0;
@@ -867,7 +867,7 @@ npi_fflp_fcram_subarea_write(npi_handle_t handle, part_id_t partid,
" fcram_subarea_write:"
" unaligned location %llx \n",
location));
- /* need to be 8 byte alligned */
+ /* need to be 8 byte aligned */
return (NPI_FFLP_FCRAM_LOC_INVALID);
}
@@ -928,7 +928,7 @@ npi_fflp_fcram_subarea_read(npi_handle_t handle, part_id_t partid,
" fcram_subarea_read:"
" unaligned location %llx \n",
location));
- /* need to be 8 byte alligned */
+ /* need to be 8 byte aligned */
return (NPI_FFLP_FCRAM_LOC_INVALID);
}
@@ -958,19 +958,18 @@ npi_fflp_fcram_subarea_read(npi_handle_t handle, part_id_t partid,
npi_status_t
npi_fflp_cfg_fcram_partition(npi_handle_t handle, part_id_t partid,
uint8_t base_mask, uint8_t base_reloc)
-
{
-/*
- * assumes that the base mask and relocation are computed somewhere
- * and kept in the state data structure. Alternativiely, one can pass
- * a partition size and a starting address and this routine can compute
- * the mask and reloc vlaues.
- */
+ /*
+ * assumes that the base mask and relocation are computed somewhere
+ * and kept in the state data structure. Alternativiely, one can pass
+ * a partition size and a starting address and this routine can compute
+ * the mask and reloc vlaues.
+ */
- flow_prt_sel_t sel;
- uint64_t offset;
+ flow_prt_sel_t sel;
+ uint64_t offset;
- ASSERT(FCRAM_PARTITION_VALID(partid));
+ ASSERT(FCRAM_PARTITION_VALID(partid));
if (!FCRAM_PARTITION_VALID(partid)) {
NPI_ERROR_MSG((handle.function, NPI_ERR_CTL,
" npi_fflp_cfg_fcram_partition:"
@@ -979,14 +978,13 @@ npi_fflp_cfg_fcram_partition(npi_handle_t handle, part_id_t partid,
return (NPI_FFLP_FCRAM_PART_INVALID);
}
- offset = FFLP_PART_OFFSET(partid, FFLP_FLW_PRT_SEL_REG);
- sel.value = 0;
- sel.bits.ldw.mask = base_mask;
- sel.bits.ldw.base = base_reloc;
- sel.bits.ldw.ext = BIT_DISABLE; /* disable */
- REG_PIO_WRITE64(handle, offset, sel.value);
- return (NPI_SUCCESS);
-
+ offset = FFLP_PART_OFFSET(partid, FFLP_FLW_PRT_SEL_REG);
+ sel.value = 0;
+ sel.bits.ldw.mask = base_mask;
+ sel.bits.ldw.base = base_reloc;
+ sel.bits.ldw.ext = BIT_DISABLE; /* disable */
+ REG_PIO_WRITE64(handle, offset, sel.value);
+ return (NPI_SUCCESS);
}
/*
@@ -1572,7 +1570,7 @@ npi_fflp_cfg_enet_vlan_table_assoc(npi_handle_t handle, uint8_t mac_portn,
parity_bit = vlan_parity[cfg.bits.ldw.vlanrdctbln0] +
vlan_parity[cfg.bits.ldw.vlanrdctbln1] +
cfg.bits.ldw.vpr0 + cfg.bits.ldw.vpr1;
- cfg.bits.ldw.parity0 = parity_bit & 0x1;
+ cfg.bits.ldw.parity0 = parity_bit & 0x1;
break;
case 2:
diff --git a/usr/src/uts/common/io/nxge/nxge_hio_guest.c b/usr/src/uts/common/io/nxge/nxge_hio_guest.c
index 176c6a4e09..dc26a0de7a 100644
--- a/usr/src/uts/common/io/nxge/nxge_hio_guest.c
+++ b/usr/src/uts/common/io/nxge/nxge_hio_guest.c
@@ -572,7 +572,7 @@ nxge_hio_vr_release(nxge_t *nxge)
MUTEX_ENTER(&nhd->lock);
for (vr_index = 0; vr_index < FUNC_VIR_MAX; vr_index++) {
if (nhd->vr[vr_index].nxge == (uintptr_t)nxge) {
- nhd->vr[vr_index].nxge = NULL;
+ nhd->vr[vr_index].nxge = (uintptr_t)NULL;
break;
}
}
diff --git a/usr/src/uts/common/io/nxge/nxge_hw.c b/usr/src/uts/common/io/nxge/nxge_hw.c
index 343c7d55ac..449b285639 100644
--- a/usr/src/uts/common/io/nxge/nxge_hw.c
+++ b/usr/src/uts/common/io/nxge/nxge_hw.c
@@ -203,6 +203,8 @@ nxge_intr(void *arg1, void *arg2)
int i, j, nldvs, nintrs = 1;
npi_status_t rs = NPI_SUCCESS;
+ VERIFY(ldvp != NULL);
+
/* DDI interface returns second arg as NULL (n2 niumx driver) !!! */
if (arg2 == NULL || (void *) ldvp->nxgep != arg2) {
nxgep = ldvp->nxgep;
diff --git a/usr/src/uts/common/io/nxge/nxge_ipp.c b/usr/src/uts/common/io/nxge/nxge_ipp.c
index 6b98ce3458..6113806b2e 100644
--- a/usr/src/uts/common/io/nxge/nxge_ipp.c
+++ b/usr/src/uts/common/io/nxge/nxge_ipp.c
@@ -766,7 +766,7 @@ nxge_ipp_eccue_valid_check(p_nxge_t nxgep, boolean_t *valid)
}
}
- if (valid) {
+ if (*valid) {
/*
* Further check to see if the ECCUE is valid. The
* error is real if the LSB of d4 is 1, which
diff --git a/usr/src/uts/common/io/nxge/nxge_mac.c b/usr/src/uts/common/io/nxge/nxge_mac.c
index ea41b54ed1..d08c6d269f 100644
--- a/usr/src/uts/common/io/nxge/nxge_mac.c
+++ b/usr/src/uts/common/io/nxge/nxge_mac.c
@@ -1540,7 +1540,7 @@ nxge_n2_serdes_init(p_nxge_t nxgep)
if ((status = nxge_mdio_write(nxgep, portn,
ESR_N2_DEV_ADDR,
ESR_N2_TEST_CFG_REG, test_cfg.value)) != NXGE_OK)
- goto fail;
+ goto fail;
}
/* Initialize PLL for 10G */
@@ -2002,7 +2002,7 @@ nxge_n2_kt_serdes_init(p_nxge_t nxgep)
NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
"nxge_n2_kt_serdes_init: "
"Serdes/signal for port<%d> not ready", portn));
- goto done;
+ goto done;
}
} else if (portn == 1) {
/* Wait for serdes to be ready */
@@ -2031,7 +2031,7 @@ nxge_n2_kt_serdes_init(p_nxge_t nxgep)
NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
"nxge_n2_kt_serdes_init: "
"Serdes/signal for port<%d> not ready", portn));
- goto done;
+ goto done;
}
}
done:
@@ -2519,7 +2519,7 @@ nxge_1G_serdes_init(p_nxge_t nxgep)
NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
"nxge_neptune_1G_serdes_init: "
"Serdes/signal for port<%d> not ready", portn));
- goto done;
+ goto done;
}
} else if (portn == 1) {
if ((val & ESR_SIG_P1_BITS_MASK_1G) !=
@@ -2533,7 +2533,7 @@ nxge_1G_serdes_init(p_nxge_t nxgep)
NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
"nxge_neptune_1G_serdes_init: "
"Serdes/signal for port<%d> not ready", portn));
- goto done;
+ goto done;
}
}
@@ -4639,11 +4639,11 @@ nxge_rx_mac_reset(p_nxge_t nxgep)
if (nxgep->mac.porttype == PORT_TYPE_XMAC) {
if ((rs = npi_xmac_reset(handle, portn, XRX_MAC_RESET_ALL))
!= NPI_SUCCESS)
- goto fail;
+ goto fail;
} else {
if ((rs = npi_bmac_reset(handle, portn, RX_MAC_RESET))
!= NPI_SUCCESS)
- goto fail;
+ goto fail;
}
NXGE_DEBUG_MSG((nxgep, MAC_CTL, "<== nxge_rx_mac_reset: port<%d>",
@@ -7124,7 +7124,7 @@ nxge_mac_intr(void *arg1, void *arg2)
NXGE_FM_REPORT_ERROR(nxgep, portn, 0,
NXGE_FM_EREPORT_RXMAC_LENGTH_ERRCNT_EXP);
}
- if (status & ICFG_BMAC_RX_VIOL_ERR_CNT_EXP)
+ if (status & ICFG_BMAC_RX_VIOL_ERR_CNT_EXP) {
statsp->bmac_stats.rx_viol_err_cnt +=
BMAC_CD_VIO_CNT_MASK;
NXGE_FM_REPORT_ERROR(nxgep, portn, 0,
@@ -7155,6 +7155,7 @@ nxge_mac_intr(void *arg1, void *arg2)
statsp->bmac_stats.tx_nopause_state++;
}
}
+ }
if (ldgp->nldvs == 1) {
(void) npi_intr_ldg_mgmt_set(handle, ldgp->ldg,
@@ -7515,7 +7516,7 @@ nxge_hswap_phy_present(p_nxge_t nxgep, uint8_t portn)
if (nxge_is_phy_present(nxgep, GOA_CLAUSE45_PORT_ADDR_BASE + portn,
BCM8706_DEV_ID, BCM_PHY_ID_MASK)) {
nxgep->xcvr_addr = GOA_CLAUSE45_PORT_ADDR_BASE + portn;
- goto found_phy;
+ goto found_phy;
}
/*
diff --git a/usr/src/uts/common/io/nxge/nxge_main.c b/usr/src/uts/common/io/nxge/nxge_main.c
index ed0d1db6eb..cea5e125c9 100644
--- a/usr/src/uts/common/io/nxge/nxge_main.c
+++ b/usr/src/uts/common/io/nxge/nxge_main.c
@@ -3526,14 +3526,14 @@ nxge_dma_mem_alloc(p_nxge_t nxgep, dma_method_t method,
dma_p->dma_handle = NULL;
dma_p->acc_handle = NULL;
- dma_p->alength = NULL;
+ dma_p->alength = 0;
dma_p->kaddrp = NULL;
return (NXGE_ERROR | NXGE_DDI_FAILED);
}
if (dma_p->ncookies != 1 ||
- (dma_p->dma_cookie.dmac_laddress == NULL)) {
+ (dma_p->dma_cookie.dmac_laddress == 0)) {
NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
"nxge_dma_mem_alloc:di_dma_addr_bind > 1 "
"cookie or "
@@ -3646,7 +3646,7 @@ nxge_dma_mem_free(p_nxge_dma_common_t dma_p)
dma_p->alength, dma_p->alength));
contig_mem_free(dma_p->orig_kaddrp, dma_p->orig_alength);
- dma_p->orig_alength = NULL;
+ dma_p->orig_alength = 0;
dma_p->orig_kaddrp = NULL;
dma_p->contig_alloc_type = B_FALSE;
}
@@ -3707,11 +3707,11 @@ nxge_dma_free_rx_data_buf(p_nxge_dma_common_t dma_p)
kaddr = (uint64_t)dma_p->orig_kaddrp;
buf_size = dma_p->orig_alength;
nxge_free_buf(CONTIG_MEM_ALLOC, kaddr, buf_size);
- dma_p->orig_alength = NULL;
+ dma_p->orig_alength = 0;
dma_p->orig_kaddrp = NULL;
dma_p->contig_alloc_type = B_FALSE;
dma_p->kaddrp = NULL;
- dma_p->alength = NULL;
+ dma_p->alength = 0;
return;
}
#endif
diff --git a/usr/src/uts/common/io/nxge/nxge_rxdma.c b/usr/src/uts/common/io/nxge/nxge_rxdma.c
index 10ce6773fc..7c06b90705 100644
--- a/usr/src/uts/common/io/nxge/nxge_rxdma.c
+++ b/usr/src/uts/common/io/nxge/nxge_rxdma.c
@@ -3056,10 +3056,11 @@ nxge_rx_err_evnts(p_nxge_t nxgep, int channel, rx_dma_ctl_stat_t cs)
NXGE_FM_REPORT_ERROR(nxgep, portn, channel,
NXGE_FM_EREPORT_RDMC_RCRFULL);
rxchan_fatal = B_TRUE;
- if (rdc_stats->rcrfull < error_disp_cnt)
- NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
- "==> nxge_rx_err_evnts(channel %d): "
- "fatal error: rcrfull error", channel));
+ if (rdc_stats->rcrfull < error_disp_cnt) {
+ NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
+ "==> nxge_rx_err_evnts(channel %d): "
+ "fatal error: rcrfull error", channel));
+ }
}
if (cs.bits.hdw.rbr_empty) {
/*
diff --git a/usr/src/uts/common/io/nxge/nxge_send.c b/usr/src/uts/common/io/nxge/nxge_send.c
index 6f9672c277..ff410e3ba7 100644
--- a/usr/src/uts/common/io/nxge/nxge_send.c
+++ b/usr/src/uts/common/io/nxge/nxge_send.c
@@ -1219,10 +1219,13 @@ nxge_lso_info_get(mblk_t *mp, uint32_t *mss, uint32_t *flags)
{
ASSERT(DB_TYPE(mp) == M_DATA);
+ if (mss == NULL || flags == NULL)
+ return;
+
*mss = 0;
if (flags != NULL) {
*flags = DB_CKSUMFLAGS(mp) & HW_LSO;
- if ((*flags != 0) && (mss != NULL)) {
+ if (*flags != 0) {
*mss = (uint32_t)DB_LSOMSS(mp);
}
NXGE_DEBUG_MSG((NULL, TX_CTL,
diff --git a/usr/src/uts/common/io/nxge/nxge_virtual.c b/usr/src/uts/common/io/nxge/nxge_virtual.c
index 9305cb0d5c..dddca37af4 100644
--- a/usr/src/uts/common/io/nxge/nxge_virtual.c
+++ b/usr/src/uts/common/io/nxge/nxge_virtual.c
@@ -2847,9 +2847,7 @@ nxge_set_hw_vlan_class_config(p_nxge_t nxgep)
vmap = (nxge_param_map_t *)&vlan_cfg_val[i];
if ((vmap->param_id) &&
(vmap->param_id < NXGE_MAX_VLANS) &&
- (vmap->map_to <
- p_cfgp->max_rdc_grpids) &&
- (vmap->map_to >= (uint8_t)0)) {
+ (vmap->map_to < p_cfgp->max_rdc_grpids)) {
NXGE_DEBUG_MSG((nxgep, CFG2_CTL,
" nxge_vlan_config mapping"
" id %d grp %d",
@@ -2909,9 +2907,7 @@ nxge_set_hw_mac_class_config(p_nxge_t nxgep)
for (i = 0; i < mac_cnt; i++) {
mac_map = (nxge_param_map_t *)&mac_cfg_val[i];
if ((mac_map->param_id < p_cfgp->max_macs) &&
- (mac_map->map_to <
- p_cfgp->max_rdc_grpids) &&
- (mac_map->map_to >= (uint8_t)0)) {
+ (mac_map->map_to < p_cfgp->max_rdc_grpids)) {
NXGE_DEBUG_MSG((nxgep, CFG2_CTL,
" nxge_mac_config mapping"
" id %d grp %d",
diff --git a/usr/src/uts/common/sys/null.h b/usr/src/uts/common/sys/null.h
index dc86fe9e8e..4009d3eaaf 100644
--- a/usr/src/uts/common/sys/null.h
+++ b/usr/src/uts/common/sys/null.h
@@ -20,38 +20,6 @@
#ifndef NULL
-#if defined(__sparc)
-/*
- * SPARC code is not yet NULL pointer clean.
- */
-
-/*
- * POSIX.1-2008 requires that the NULL macro be cast to type void *.
- * Historically, this has not been done, so we only enable this in a
- * POSIX.1-2008 compilation environment.
- */
-
-#if defined(_XPG7) && !defined(__cplusplus)
-#define NULL ((void *)0)
-#else
-
-/*
- * ISO C++ requires that the NULL macro be a constant integral type evaluating
- * to zero until C++11, and an integer or pointer literal with value zero from
- * C++11 onwards.
- */
-
-#if defined(__cplusplus) && __cplusplus >= 201103L
-#define NULL nullptr
-#else
-#if defined(_LP64)
-#define NULL 0L
-#else
-#define NULL 0
-#endif /* _LP64 */
-#endif /* C++11 */
-#endif /* _XPG7 */
-#else
/*
* POSIX.1-2008 requires that the NULL macro be cast to type void *.
*/
@@ -76,7 +44,6 @@
#endif /* _LP64 */
#endif /* C++11 */
#endif /* !__cplusplus */
-#endif /* __sparc */
#endif /* NULL */
generated by cgit v1.2.3 (git 2.39.1) at 2025-05-28 16:21:10 +0000