diff options
Diffstat (limited to 'usr/src/uts/intel/pcbe')
| -rw-r--r-- | usr/src/uts/intel/pcbe/opteron_pcbe.c | 16 | ||||
| -rw-r--r-- | usr/src/uts/intel/pcbe/p123_pcbe.c | 10 | ||||
| -rw-r--r-- | usr/src/uts/intel/pcbe/p4_pcbe.c | 2 |
3 files changed, 14 insertions, 14 deletions
diff --git a/usr/src/uts/intel/pcbe/opteron_pcbe.c b/usr/src/uts/intel/pcbe/opteron_pcbe.c index 119cff9bde..0ded1285d5 100644 --- a/usr/src/uts/intel/pcbe/opteron_pcbe.c +++ b/usr/src/uts/intel/pcbe/opteron_pcbe.c @@ -19,7 +19,7 @@ * CDDL HEADER END */ /* - * Copyright 2006 Sun Microsystems, Inc. All rights reserved. + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -279,9 +279,9 @@ opt_pcbe_init(void) } else if X86_CHIPREV_MATCH(rev, X86_CHIPREV_AMD_F_REV_D) { opt_events = opt_events_rev_D; } else if (X86_CHIPREV_MATCH(rev, X86_CHIPREV_AMD_F_REV_E) || - X86_CHIPREV_MATCH(rev, X86_CHIPREV_AMD_F_REV_F) || - X86_CHIPREV_MATCH(rev, X86_CHIPREV_AMD_F_REV_G)) { - opt_events = opt_events_rev_E; + X86_CHIPREV_MATCH(rev, X86_CHIPREV_AMD_F_REV_F) || + X86_CHIPREV_MATCH(rev, X86_CHIPREV_AMD_F_REV_G)) { + opt_events = opt_events_rev_E; }; if (opt_events == NULL) @@ -329,8 +329,8 @@ static const char * opt_pcbe_cpuref(void) { return ("See Chapter 10 of the \"BIOS and Kernel Developer's Guide " - "for the AMD Athlon 64 and AMD Opteron Processors,\" " - "AMD publication #26094"); + "for the AMD Athlon 64 and AMD Opteron Processors,\" " + "AMD publication #26094"); } /*ARGSUSED*/ @@ -465,7 +465,7 @@ opt_pcbe_program(void *token) &nullcfgs[2], &nullcfgs[3] }; opt_pcbe_config_t *pcfg = NULL; int i; - uint32_t curcr4 = getcr4(); + ulong_t curcr4 = getcr4(); /* * Allow nonprivileged code to read the performance counters if desired. @@ -515,7 +515,7 @@ opt_pcbe_allstop(void) /* * Disable non-privileged access to the counter registers. */ - setcr4((uint32_t)getcr4() & ~CR4_PCE); + setcr4(getcr4() & ~CR4_PCE); } static void diff --git a/usr/src/uts/intel/pcbe/p123_pcbe.c b/usr/src/uts/intel/pcbe/p123_pcbe.c index 0d17b1f80f..eaddaa1afa 100644 --- a/usr/src/uts/intel/pcbe/p123_pcbe.c +++ b/usr/src/uts/intel/pcbe/p123_pcbe.c @@ -19,7 +19,7 @@ * CDDL HEADER END */ /* - * Copyright 2006 Sun Microsystems, Inc. All rights reserved. + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -690,7 +690,7 @@ ptm_pcbe_configure(uint_t picnum, char *eventname, uint64_t preset, ptm_flags |= P6_INV; } else if (strncmp(attrs[i].ka_name, "umask", 5) == 0) { if ((attrs[i].ka_val | CPC_P6_PES_UMASK_MASK) != - CPC_P6_PES_UMASK_MASK) { + CPC_P6_PES_UMASK_MASK) { kmem_free(conf, sizeof (ptm_pcbe_config_t)); return (CPC_ATTRIBUTE_OUT_OF_RANGE); @@ -699,7 +699,7 @@ ptm_pcbe_configure(uint_t picnum, char *eventname, uint64_t preset, CPC_P6_PES_UMASK_SHIFT; } else if (strncmp(attrs[i].ka_name, "cmask", 5) == 0) { if ((attrs[i].ka_val | CPC_P6_PES_CMASK_MASK) != - CPC_P6_PES_CMASK_MASK) { + CPC_P6_PES_CMASK_MASK) { kmem_free(conf, sizeof (ptm_pcbe_config_t)); return (CPC_ATTRIBUTE_OUT_OF_RANGE); @@ -769,7 +769,7 @@ ptm_pcbe_program(void *token) ASSERT(pic0->ptm_picno == 0 && pic1->ptm_picno == 1); if (ptm_rdpmc_avail) { - uint32_t curcr4 = getcr4(); + ulong_t curcr4 = getcr4(); if (kcpc_allow_nonpriv(token)) setcr4(curcr4 | CR4_PCE); else @@ -804,7 +804,7 @@ ptm_pcbe_allstop(void) wrmsr(P5_CESR, ALL_STOPPED); else { wrmsr(REG_PERFEVNT0, ALL_STOPPED); - setcr4((uint32_t)getcr4() & ~CR4_PCE); + setcr4(getcr4() & ~CR4_PCE); } } diff --git a/usr/src/uts/intel/pcbe/p4_pcbe.c b/usr/src/uts/intel/pcbe/p4_pcbe.c index bfaa46a0ab..5065e082bc 100644 --- a/usr/src/uts/intel/pcbe/p4_pcbe.c +++ b/usr/src/uts/intel/pcbe/p4_pcbe.c @@ -791,7 +791,7 @@ p4_pcbe_program(void *token) build_cfgs(cfgs, NULL, token); if (p4_rdpmc_avail) { - uint32_t curcr4 = getcr4(); + ulong_t curcr4 = getcr4(); if (kcpc_allow_nonpriv(token)) setcr4(curcr4 | CR4_PCE); else |