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-rw-r--r--usr/src/uts/intel/sys/mc_amd.h7
-rw-r--r--usr/src/uts/intel/sys/mca_amd.h5
2 files changed, 9 insertions, 3 deletions
diff --git a/usr/src/uts/intel/sys/mc_amd.h b/usr/src/uts/intel/sys/mc_amd.h
index 79b03d9e70..5b0315a099 100644
--- a/usr/src/uts/intel/sys/mc_amd.h
+++ b/usr/src/uts/intel/sys/mc_amd.h
@@ -191,14 +191,17 @@ enum mc_funcnum {
#define MC_DC_REG_DRAMMISC 0xa0 /* DRAM Miscellaneous */
/*
- * Function 3 (misc control) offset for NB MCA config, scrubber control
- * and online spare control.
+ * Function 3 (misc control) offset for NB MCA config, scrubber control,
+ * online spare control and NB capabilities.
*/
#define MC_CTL_REG_NBCFG 0x44 /* MCA NB configuration register */
#define MC_CTL_REG_SCRUBCTL 0x58 /* Scrub control register */
#define MC_CTL_REG_SCRUBADDR_LO 0x5c /* DRAM Scrub Address Low */
#define MC_CTL_REG_SCRUBADDR_HI 0x60 /* DRAM Scrub Address High */
#define MC_CTL_REG_SPARECTL 0xb0 /* On-line spare control register */
+#define MC_CTL_REG_NBCAP 0xe8 /* NB Capabilities */
+
+#define MC_NBCAP_L3CAPABLE 0x02000000
/*
* MC4_MISC MSR and MC4_MISCj MSRs
diff --git a/usr/src/uts/intel/sys/mca_amd.h b/usr/src/uts/intel/sys/mca_amd.h
index d583b71221..998ff980bf 100644
--- a/usr/src/uts/intel/sys/mca_amd.h
+++ b/usr/src/uts/intel/sys/mca_amd.h
@@ -374,6 +374,8 @@ extern "C" {
#define AMD_NB_SCRUBCTL_L2_SHIFT 8
#define AMD_NB_SCRUBCTL_DC_MASK 0x001f0000
#define AMD_NB_SCRUBCTL_DC_SHIFT 16
+#define AMD_NB_SCRUBCTL_L3_MASK 0x1f000000
+#define AMD_NB_SCRUBCTL_L3_SHIFT 24
#define AMD_NB_SCRUBCTL_RATE_NONE 0
#define AMD_NB_SCRUBCTL_RATE_MAX 0x16
@@ -389,7 +391,8 @@ extern "C" {
#define AMD_NB_SCRUBADDR_MKHI(addr) \
(((addr) >> 32) & AMD_NB_SCRUBADDR_HI_MASK)
-#define AMD_NB_MKSCRUBCTL(dc, l2, dr) ( \
+#define AMD_NB_MKSCRUBCTL(l3, dc, l2, dr) ( \
+ (((l3) << AMD_NB_SCRUBCTL_L3_SHIFT) & AMD_NB_SCRUBCTL_L3_MASK) | \
(((dc) << AMD_NB_SCRUBCTL_DC_SHIFT) & AMD_NB_SCRUBCTL_DC_MASK) | \
(((l2) << AMD_NB_SCRUBCTL_L2_SHIFT) & AMD_NB_SCRUBCTL_L2_MASK) | \
(((dr) << AMD_NB_SCRUBCTL_DRAM_SHIFT) & AMD_NB_SCRUBCTL_DRAM_MASK))