diff options
Diffstat (limited to 'usr/src/uts/intel/sys')
| -rw-r--r-- | usr/src/uts/intel/sys/Makefile | 4 | ||||
| -rw-r--r-- | usr/src/uts/intel/sys/archsystm.h | 53 | ||||
| -rw-r--r-- | usr/src/uts/intel/sys/bootconf.h | 20 | ||||
| -rw-r--r-- | usr/src/uts/intel/sys/bootinfo.h | 99 | ||||
| -rw-r--r-- | usr/src/uts/intel/sys/controlregs.h | 58 | ||||
| -rw-r--r-- | usr/src/uts/intel/sys/fp.h | 23 | ||||
| -rw-r--r-- | usr/src/uts/intel/sys/immu.h | 55 | ||||
| -rw-r--r-- | usr/src/uts/intel/sys/kdi_machimpl.h | 103 | ||||
| -rw-r--r-- | usr/src/uts/intel/sys/kdi_regs.h | 135 | ||||
| -rw-r--r-- | usr/src/uts/intel/sys/mmu.h | 38 | ||||
| -rw-r--r-- | usr/src/uts/intel/sys/pmem.h | 84 | ||||
| -rw-r--r-- | usr/src/uts/intel/sys/segments.h | 98 | ||||
| -rw-r--r-- | usr/src/uts/intel/sys/x86_archext.h | 78 |
13 files changed, 626 insertions, 222 deletions
diff --git a/usr/src/uts/intel/sys/Makefile b/usr/src/uts/intel/sys/Makefile index 491f4d3224..655ec9b54f 100644 --- a/usr/src/uts/intel/sys/Makefile +++ b/usr/src/uts/intel/sys/Makefile @@ -46,10 +46,10 @@ HDRS = \ fasttrap_isa.h \ fp.h \ frame.h \ - immu.h \ inline.h \ kd.h \ kdi_machimpl.h \ + kdi_regs.h \ machelf.h \ machlock.h \ machsig.h \ @@ -61,11 +61,11 @@ HDRS = \ memtest.h \ mii.h \ miipriv.h \ - mmu.h \ mutex_impl.h \ obpdefs.h \ old_procfs.h \ pcb.h \ + pmem.h \ privregs.h \ procfs_isa.h \ prom_emul.h \ diff --git a/usr/src/uts/intel/sys/archsystm.h b/usr/src/uts/intel/sys/archsystm.h index 1eed79d0ae..f6665f6565 100644 --- a/usr/src/uts/intel/sys/archsystm.h +++ b/usr/src/uts/intel/sys/archsystm.h @@ -19,7 +19,7 @@ * CDDL HEADER END */ /* - * Copyright 2006 Sun Microsystems, Inc. All rights reserved. + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -51,14 +51,22 @@ extern ulong_t getcr2(void); #if defined(__i386) extern uint16_t getgs(void); extern void setgs(uint16_t); + +extern void patch_sse(void); +extern void patch_sse2(void); #endif +extern void cli(void); extern void sti(void); extern void tenmicrosec(void); -extern void restore_int_flag(int); -extern int clear_int_flag(void); +extern void restore_int_flag(ulong_t); +extern void intr_restore(ulong_t); +extern ulong_t clear_int_flag(void); +extern ulong_t intr_clear(void); +extern ulong_t getflags(void); +extern int interrupts_enabled(void); extern void int3(void); extern void int18(void); @@ -72,6 +80,7 @@ extern void sys_syscall_int(); extern void brand_sys_syscall(); extern void brand_sys_syscall32(); extern void brand_sys_syscall_int(); +extern int update_sregs(); #elif defined(__i386) extern void sys_call(); extern void brand_sys_call(); @@ -85,10 +94,8 @@ extern void dosyscall(void); extern void bind_hwcap(void); -extern uint8_t inb(int port); extern uint16_t inw(int port); extern uint32_t inl(int port); -extern void outb(int port, uint8_t value); extern void outw(int port, uint16_t value); extern void outl(int port, uint32_t value); @@ -134,34 +141,52 @@ extern uint_t cpu_hwcap_flags; extern uint_t cpu_freq; extern uint64_t cpu_freq_hz; +extern int use_sse_pagecopy; +extern int use_sse_pagezero; +extern int use_sse_copy; + extern caddr_t i86devmap(pfn_t, pgcnt_t, uint_t); extern page_t *page_numtopp_alloc(pfn_t pfnum); extern void hwblkclr(void *, size_t); extern void hwblkpagecopy(const void *, void *); +extern void page_copy_no_xmm(void *dst, void *src); +extern void block_zero_no_xmm(void *dst, int len); +#define BLOCKZEROALIGN (4 * sizeof (void *)) extern void (*kcpc_hw_enable_cpc_intr)(void); -extern void setup_mca(void); -extern void setup_mtrr(void); extern void patch_tsc(void); +extern void init_desctbls(void); extern user_desc_t *cpu_get_gdt(void); -/* - * Warning: these routines do -not- use normal calling conventions! - */ -extern void setup_121_andcall(void (*)(ulong_t), ulong_t); -extern void enable_big_page_support(ulong_t); -extern void enable_pae(ulong_t); - +extern void switch_sp_and_call(void *, void (*)(uint_t, uint_t), uint_t, + uint_t); extern hrtime_t (*gethrtimef)(void); extern hrtime_t (*gethrtimeunscaledf)(void); extern void (*scalehrtimef)(hrtime_t *); extern void (*gethrestimef)(timestruc_t *); +extern void av_dispatch_softvect(uint_t); +extern void av_dispatch_autovect(uint_t); +extern uint_t atomic_btr32(uint32_t *, uint_t); +extern uint_t bsrw_insn(uint16_t); +extern int sys_rtt_common(struct regs *); +extern void fakesoftint(void); + + +extern void setup_mca(void); +extern void setup_mtrr(void); +#define cpr_dprintf prom_printf + #endif /* _KERNEL */ +#if defined(_KERNEL) || defined(_BOOT) +extern uint8_t inb(int port); +extern void outb(int port, uint8_t value); +#endif + #ifdef __cplusplus } #endif diff --git a/usr/src/uts/intel/sys/bootconf.h b/usr/src/uts/intel/sys/bootconf.h index 2e1ccbf326..0cde010b88 100644 --- a/usr/src/uts/intel/sys/bootconf.h +++ b/usr/src/uts/intel/sys/bootconf.h @@ -19,7 +19,7 @@ * CDDL HEADER END */ /* - * Copyright 2006 Sun Microsystems, Inc. All rights reserved. + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -219,11 +219,29 @@ extern int netboot; extern int swaploaded; extern int modrootloaded; extern char kern_bootargs[]; +extern char *kobj_module_path; extern char *default_path; extern char *dhcack; extern int dhcacklen; extern char *netdev_path; +extern void bop_no_more_mem(void); + +/*PRINTFLIKE2*/ +extern void bop_printf(struct bootops *, char *, ...) + __KPRINTFLIKE(2); +/*PRINTFLIKE1*/ +extern void bop_panic(char *, ...) + __KPRINTFLIKE(1); +extern void boot_prop_finish(void); + +/* + * Back door to fakebop.c to get physical memory allocated. + * 64 bit data types are fixed for 32 bit PAE use. + */ +extern paddr_t do_bop_phys_alloc(uint64_t, uint64_t); + + #endif /* _KERNEL && !_BOOT */ #ifdef __cplusplus diff --git a/usr/src/uts/intel/sys/bootinfo.h b/usr/src/uts/intel/sys/bootinfo.h new file mode 100644 index 0000000000..6c25d8bcab --- /dev/null +++ b/usr/src/uts/intel/sys/bootinfo.h @@ -0,0 +1,99 @@ +/* + * CDDL HEADER START + * + * The contents of this file are subject to the terms of the + * Common Development and Distribution License (the "License"). + * You may not use this file except in compliance with the License. + * + * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE + * or http://www.opensolaris.org/os/licensing. + * See the License for the specific language governing permissions + * and limitations under the License. + * + * When distributing Covered Code, include this CDDL HEADER in each + * file and include the License file at usr/src/OPENSOLARIS.LICENSE. + * If applicable, add the following below this CDDL HEADER, with the + * fields enclosed by brackets "[]" replaced with your own identifying + * information: Portions Copyright [yyyy] [name of copyright owner] + * + * CDDL HEADER END + */ + +/* + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. + */ + +#ifndef _SYS_BOOTINFO_H +#define _SYS_BOOTINFO_H + +#pragma ident "%Z%%M% %I% %E% SMI" + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * The 32-bit kernel loader code needs to build several structures that the + * kernel is expecting. They will contain native sized pointers for the + * target kernel. + */ + +#if defined(_BOOT_TARGET_amd64) + +typedef uint64_t native_ptr_t; + +#elif defined(_BOOT_TARGET_i386) + +typedef uint32_t native_ptr_t; + +#elif defined(_KERNEL) + +typedef void *native_ptr_t; + +#endif + +struct boot_memlist { + uint64_t addr; + uint64_t size; + native_ptr_t next; + native_ptr_t prev; +}; + +/* + * The kernel needs to know how to find its modules. + */ +struct boot_modules { + native_ptr_t bm_addr; + uint32_t bm_size; + uint32_t bm_padding; +}; + +/* + * + */ +#pragma pack(1) +struct xboot_info { + uint64_t bi_next_paddr; /* next physical address not used */ + native_ptr_t bi_next_vaddr; /* next virtual address not used */ + native_ptr_t bi_cmdline; + native_ptr_t bi_phys_install; + native_ptr_t bi_modules; + uint32_t bi_module_cnt; + uint32_t bi_use_largepage; /* MMU uses large pages */ + uint32_t bi_use_pae; /* MMU uses PAE mode (8 byte PTES) */ + uint32_t bi_use_nx; /* MMU uses NX bit in PTEs */ + uint32_t bi_use_pge; /* MMU uses Page Global Enable */ + native_ptr_t bi_pt_window; + native_ptr_t bi_pte_to_pt_window; + native_ptr_t bi_kseg_size; /* size used for kernel nucleus pages */ + uint64_t bi_top_page_table; + native_ptr_t bi_mb_info; +}; +#pragma pack() + +#ifdef __cplusplus +} +#endif + +#endif /* _SYS_BOOTINFO_H */ diff --git a/usr/src/uts/intel/sys/controlregs.h b/usr/src/uts/intel/sys/controlregs.h index cea4e712d9..385a89fe07 100644 --- a/usr/src/uts/intel/sys/controlregs.h +++ b/usr/src/uts/intel/sys/controlregs.h @@ -19,7 +19,7 @@ * CDDL HEADER END */ /* - * Copyright 2006 Sun Microsystems, Inc. All rights reserved. + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -66,6 +66,26 @@ extern "C" { #define FMT_CR0 \ "\20\40pg\37cd\36nw\35am\21wp\6ne\5et\4ts\3em\2mp\1pe" +/* + * Set the FPU-related control bits to explain to the processor that + * we're managing FPU state: + * - set monitor coprocessor (allow TS bit to control FPU) + * - set numeric exception (disable IGNNE# mechanism) + * - set task switch (#nm on first fp instruction) + * - clear emulate math bit (cause we're not emulating!) + */ +#define CR0_ENABLE_FPU_FLAGS(cr) \ + (((cr) | CR0_MP | CR0_NE | CR0_TS) & (uint32_t)~CR0_EM) + +/* + * Set the FPU-related control bits to explain to the processor that + * we're -not- managing FPU state: + * - set emulate (all fp instructions cause #nm) + * - clear monitor coprocessor (so fwait/wait doesn't #nm) + */ +#define CR0_DISABLE_FPU_FLAGS(cr) \ + (((cr) | CR0_EM) & (uint32_t)~CR0_MP) + /* CR3 Register */ #define CR3_PCD 0x00000010 /* cache disable */ @@ -86,9 +106,28 @@ extern "C" { #define CR4_PCE 0x0100 /* perf-monitoring counter enable */ #define CR4_OSFXSR 0x0200 /* OS fxsave/fxrstor support */ #define CR4_OSXMMEXCPT 0x0400 /* OS unmasked exception support */ + /* 0x0800 reserved */ + /* 0x1000 reserved */ +#define CR4_VMXE 0x2000 +#define CR4_SMXE 0x4000 -#define FMT_CR4 \ - "\20\13xmme\12fxsr\11pce\10pge\7mce\6pae\5pse\4de\3tsd\2pvi\1vme" +#define FMT_CR4 \ + "\20\17smxe\16vmxe\13xmme\12fxsr\11pce\10pge" \ + "\7mce\6pae\5pse\4de\3tsd\2pvi\1vme" + +/* + * Enable the SSE-related control bits to explain to the processor that + * we're managing XMM state and exceptions + */ +#define CR4_ENABLE_SSE_FLAGS(cr) \ + ((cr) | CR4_OSFXSR | CR4_OSXMMEXCPT) + +/* + * Disable the SSE-related control bits to explain to the processor + * that we're NOT managing XMM state + */ +#define CR4_DISABLE_SSE_FLAGS(cr) \ + ((cr) & ~(uint32_t)(CR4_OSFXSR | CR4_OSXMMEXCPT)) /* Intel's SYSENTER configuration registers */ @@ -100,13 +139,15 @@ extern "C" { #define MSR_AMD_EFER 0xc0000080 /* extended feature enable MSR */ -#define AMD_EFER_NXE 0x800 /* no-execute enable */ -#define AMD_EFER_LMA 0x400 /* long mode active (read-only) */ -#define AMD_EFER_LME 0x100 /* long mode enable */ -#define AMD_EFER_SCE 0x001 /* system call extensions */ +#define AMD_EFER_FFXSR 0x4000 /* fast fxsave/fxrstor */ +#define AMD_EFER_SVME 0x1000 /* svm enable */ +#define AMD_EFER_NXE 0x0800 /* no-execute enable */ +#define AMD_EFER_LMA 0x0400 /* long mode active (read-only) */ +#define AMD_EFER_LME 0x0100 /* long mode enable */ +#define AMD_EFER_SCE 0x0001 /* system call extensions */ #define FMT_AMD_EFER \ - "\20\14nxe\13lma\11lme\1sce" + "\20\17ffxsr\15svme\14nxe\13lma\11lme\1sce" /* AMD's SYSCFG register */ @@ -132,6 +173,7 @@ extern "C" { #define MSR_AMD_FSBASE 0xc0000100 /* 64-bit base address for %fs */ #define MSR_AMD_GSBASE 0xc0000101 /* 64-bit base address for %gs */ #define MSR_AMD_KGSBASE 0xc0000102 /* swapgs swaps this with gsbase */ +#define MSR_AMD_TSCAUX 0xc0000103 /* %ecx value on rdtscp insn */ /* AMD's configuration MSRs, weakly documented in the revision guide */ diff --git a/usr/src/uts/intel/sys/fp.h b/usr/src/uts/intel/sys/fp.h index 133499a3ae..02fb34fc65 100644 --- a/usr/src/uts/intel/sys/fp.h +++ b/usr/src/uts/intel/sys/fp.h @@ -2,9 +2,8 @@ * CDDL HEADER START * * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. + * Common Development and Distribution License (the "License"). + * You may not use this file except in compliance with the License. * * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE * or http://www.opensolaris.org/os/licensing. @@ -20,7 +19,7 @@ * CDDL HEADER END */ /* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -97,7 +96,7 @@ extern "C" { */ #define FPS_IE 0x00000001 /* invalid operation */ #define FPS_DE 0x00000002 /* denormalized operand */ -#define FPS_ZE 0x00000004 /* zero devide */ +#define FPS_ZE 0x00000004 /* zero divide */ #define FPS_OE 0x00000008 /* overflow */ #define FPS_UE 0x00000010 /* underflow */ #define FPS_PE 0x00000020 /* precision */ @@ -164,14 +163,22 @@ extern int fpu_exists; /* FPU hw exists */ #ifdef _KERNEL +extern int fpu_ignored; +extern int fpu_pentium_fdivbug; + extern uint32_t sse_mxcsr_mask; extern void fpu_probe(void); +extern uint_t fpu_initial_probe(void); +extern int fpu_probe_pentium_fdivbug(void); -extern void fpnsave_begin(void *); -extern void fpxsave_begin(void *); -extern void (*fpsave_begin)(void *); +extern void fpnsave_ctxt(void *); +extern void fpxsave_ctxt(void *); +extern void (*fpsave_ctxt)(void *); +struct fnsave_state; +struct fxsave_state; +extern void fxsave_insn(struct fxsave_state *); extern void fpsave(struct fnsave_state *); extern void fprestore(struct fnsave_state *); extern void fpxsave(struct fxsave_state *); diff --git a/usr/src/uts/intel/sys/immu.h b/usr/src/uts/intel/sys/immu.h deleted file mode 100644 index ac9af15bf6..0000000000 --- a/usr/src/uts/intel/sys/immu.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright (c) 1990-1997,1999 by Sun Microsystems, Inc. - * All rights reserved. - */ - -#ifndef _SYS_IMMU_H -#define _SYS_IMMU_H - -#pragma ident "%Z%%M% %I% %E% SMI" - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * XXX - following stuff from 3b2 immu.h. this really belongs elsewhere. - */ - -/* - * The following variables describe the memory managed by - * the kernel. This includes all memory above the kernel - * itself. - */ - -extern pgcnt_t maxmem; /* Maximum available free memory. */ -extern pgcnt_t freemem; /* Current free memory. */ -extern pgcnt_t availrmem; /* Available resident (not */ - /* swapable) memory in pages. */ - -#ifdef __cplusplus -} -#endif - -#endif /* _SYS_IMMU_H */ diff --git a/usr/src/uts/intel/sys/kdi_machimpl.h b/usr/src/uts/intel/sys/kdi_machimpl.h index f34501385d..5ded8b44c2 100644 --- a/usr/src/uts/intel/sys/kdi_machimpl.h +++ b/usr/src/uts/intel/sys/kdi_machimpl.h @@ -2,9 +2,8 @@ * CDDL HEADER START * * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. + * Common Development and Distribution License (the "License"). + * You may not use this file except in compliance with the License. * * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE * or http://www.opensolaris.org/os/licensing. @@ -20,7 +19,7 @@ * CDDL HEADER END */ /* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -35,61 +34,89 @@ * and are to be used only when the system has been stopped. */ -/* The VA range reserved for the debugger. */ - #include <sys/modctl.h> #include <sys/types.h> +#include <sys/cpuvar.h> +#include <sys/kdi_regs.h> #ifdef __cplusplus extern "C" { #endif +typedef void (*kdi_main_t)(kdi_cpusave_t *); + +typedef struct kdi_memrange { + caddr_t mr_base; + caddr_t mr_lim; +} kdi_memrange_t; + +#define KDI_MEMRANGES_MAX 2 + typedef struct kdi_mach { - int (*mkdi_get_cpuinfo)(uint_t *, uint_t *, uint_t *); + void (*mkdi_activate)(kdi_main_t, kdi_cpusave_t *, uint_t); + void (*mkdi_deactivate)(void); + + void (*mkdi_idt_switch)(kdi_cpusave_t *); - int (*mkdi_xc_initialized)(void); - void (*mkdi_xc_others)(int, void (*)()); + void (*mkdi_update_drreg)(kdi_drreg_t *); + void (*mkdi_set_debug_msrs)(kdi_msr_t *); uintptr_t (*mkdi_get_userlimit)(void); - void (*mkdi_idt_init_gate)(struct gate_desc *, void (*)(void), uint_t, - int); - void (*mkdi_idt_read)(struct gate_desc *, struct gate_desc *, uint_t); - void (*mkdi_idt_write)(struct gate_desc *, struct gate_desc *, uint_t); - struct gate_desc *(*mkdi_cpu2idt)(struct cpu *); + int (*mkdi_get_cpuinfo)(uint_t *, uint_t *, uint_t *); + + void (*mkdi_stop_slaves)(int, int); - void (**mkdi_shutdownp)(int, int); + void (*mkdi_start_slaves)(void); -#if defined(__amd64) - uintptr_t (*mkdi_gdt2gsbase)(uintptr_t); -#endif + void (*mkdi_slave_wait)(void); - /* for use only when the kernel is running */ - void (*mkdi_cpu_iter)(void (*)(struct cpu *, uint_t), - uint_t); + void (*mkdi_memrange_add)(caddr_t, size_t); + + void (*mkdi_reboot)(void); } kdi_mach_t; -#define mkdi_get_cpuinfo kdi_mach.mkdi_get_cpuinfo -#define mkdi_xc_initialized kdi_mach.mkdi_xc_initialized -#define mkdi_xc_others kdi_mach.mkdi_xc_others +#define mkdi_activate kdi_mach.mkdi_activate +#define mkdi_deactivate kdi_mach.mkdi_deactivate +#define mkdi_idt_switch kdi_mach.mkdi_idt_switch +#define mkdi_update_drreg kdi_mach.mkdi_update_drreg +#define mkdi_set_debug_msrs kdi_mach.mkdi_set_debug_msrs #define mkdi_get_userlimit kdi_mach.mkdi_get_userlimit -#define mkdi_idt_init_gate kdi_mach.mkdi_idt_init_gate -#define mkdi_idt_read kdi_mach.mkdi_idt_read -#define mkdi_idt_write kdi_mach.mkdi_idt_write -#define mkdi_cpu2idt kdi_mach.mkdi_cpu2idt -#define mkdi_shutdownp kdi_mach.mkdi_shutdownp -#if defined(__amd64) -#define mkdi_gdt2gsbase kdi_mach.mkdi_gdt2gsbase -#endif -#define mkdi_cpu_iter kdi_mach.mkdi_cpu_iter - -extern int kdi_xc_initialized(void); -extern void kdi_xc_others(int, void (*)()); +#define mkdi_get_cpuinfo kdi_mach.mkdi_get_cpuinfo +#define mkdi_stop_slaves kdi_mach.mkdi_stop_slaves +#define mkdi_start_slaves kdi_mach.mkdi_start_slaves +#define mkdi_slave_wait kdi_mach.mkdi_slave_wait +#define mkdi_memrange_add kdi_mach.mkdi_memrange_add +#define mkdi_reboot kdi_mach.mkdi_reboot extern void hat_kdi_init(void); -extern void hat_kdi_fini(void); -extern uintptr_t kdi_get_userlimit(void); +extern ulong_t kdi_getdr0(void), kdi_getdr1(void), kdi_getdr2(void); +extern ulong_t kdi_getdr3(void), kdi_getdr6(void), kdi_getdr7(void); +extern void kdi_setdr0(ulong_t), kdi_setdr1(ulong_t), kdi_setdr2(ulong_t); +extern void kdi_setdr3(ulong_t), kdi_setdr6(ulong_t), kdi_setdr7(ulong_t); +extern ulong_t kdi_dreg_get(int); +extern void kdi_dreg_set(int, ulong_t); +extern void kdi_update_drreg(kdi_drreg_t *); +extern void kdi_set_debug_msrs(kdi_msr_t *); +extern void kdi_cpu_debug_init(kdi_cpusave_t *); + +extern void kdi_cpu_init(void); +extern void kdi_xc_others(int, void (*)(void)); +extern void kdi_start_slaves(void); +extern void kdi_slave_wait(void); + +extern void kdi_idtr_set(gate_desc_t *, size_t); +extern void kdi_idt_write(struct gate_desc *, uint_t); +extern void kdi_idt_sync(void); +extern void kdi_idt_switch(kdi_cpusave_t *); +#define kdi_idtr_write(idtr) wr_idtr(idtr) + +extern void kdi_activate(kdi_main_t, kdi_cpusave_t *, uint_t); +extern void kdi_deactivate(void); +extern void kdi_stop_slaves(int, int); +extern void kdi_memrange_add(caddr_t, size_t); +extern void kdi_reboot(void); #ifdef __cplusplus } diff --git a/usr/src/uts/intel/sys/kdi_regs.h b/usr/src/uts/intel/sys/kdi_regs.h new file mode 100644 index 0000000000..e896e29a64 --- /dev/null +++ b/usr/src/uts/intel/sys/kdi_regs.h @@ -0,0 +1,135 @@ +/* + * CDDL HEADER START + * + * The contents of this file are subject to the terms of the + * Common Development and Distribution License (the "License"). + * You may not use this file except in compliance with the License. + * + * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE + * or http://www.opensolaris.org/os/licensing. + * See the License for the specific language governing permissions + * and limitations under the License. + * + * When distributing Covered Code, include this CDDL HEADER in each + * file and include the License file at usr/src/OPENSOLARIS.LICENSE. + * If applicable, add the following below this CDDL HEADER, with the + * fields enclosed by brackets "[]" replaced with your own identifying + * information: Portions Copyright [yyyy] [name of copyright owner] + * + * CDDL HEADER END + */ +/* + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. + */ + +#ifndef _SYS_KDI_REGS_H +#define _SYS_KDI_REGS_H + +#pragma ident "%Z%%M% %I% %E% SMI" + +#ifndef _ASM +#include <sys/types.h> +#include <sys/segments.h> +#include <sys/regset.h> +#include <sys/privregs.h> +#endif + +#if defined(__amd64) +#include <amd64/sys/kdi_regs.h> +#elif defined(__i386) +#include <ia32/sys/kdi_regs.h> +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +#define KDI_NCRUMBS 5 + +#define KDI_RESUME 0 +#define KDI_RESUME_PASS_TO_KERNEL 1 + +#define KDI_CPU_STATE_NONE 0 +#define KDI_CPU_STATE_MASTER 1 +#define KDI_CPU_STATE_SLAVE 2 + +#define KDIREG_DRCTL_WPALLEN_MASK 0x000000ff +#define KDIREG_DRSTAT_RESERVED 0xffff0ff0 +#define KDIREG_DRCTL_RESERVED 0x00000700 + +#define KDI_MSR_READ 0x1 /* read during entry (unlimited) */ +#define KDI_MSR_WRITE 0x2 /* write during exit (unlimited) */ +#define KDI_MSR_WRITEDELAY 0x4 /* write after last branch (<= 1) */ +#define KDI_MSR_CLEARENTRY 0x3 /* clear before 1st branch (<= 1) */ + +#ifndef _ASM + +/* + * We maintain a ring buffer of bread crumbs for debugging purposes. The + * current buffer pointer is advanced along the ring with each intercepted + * trap (debugger entry, invalid memory access, fault during step, etc). + */ +typedef struct kdi_crumb { + greg_t krm_cpu_state; /* This CPU's state at last entry */ + greg_t krm_pc; /* Instruction pointer at trap */ + greg_t krm_sp; /* Stack pointer at trap */ + greg_t krm_trapno; /* The last trap number */ + greg_t krm_flag; /* KAIF_CRUMB_F_* */ +} kdi_crumb_t; + +#define KDI_MAXWPIDX 3 + +/* + * Storage for %dr0-3, %dr6, and %dr7. + */ +typedef struct kdi_drreg { + greg_t dr_ctl; + greg_t dr_stat; + greg_t dr_addr[KDI_MAXWPIDX + 1]; +} kdi_drreg_t; + +typedef struct kdi_msr { + uint_t msr_num; + uint_t msr_type; + union { + uint64_t *_msr_valp; + uint64_t _msr_val; + } _u; +} kdi_msr_t; + +#define kdi_msr_val _u._msr_val +#define kdi_msr_valp _u._msr_valp + +/* + * Data structure used to hold all of the state for a given CPU. + */ +typedef struct kdi_cpusave { + greg_t *krs_gregs; /* saved registers */ + + kdi_drreg_t krs_dr; /* saved debug registers */ + + user_desc_t *krs_gdt; /* GDT address */ + gate_desc_t *krs_idt; /* IDT address */ + + greg_t krs_cr0; /* saved %cr0 */ + + kdi_msr_t *krs_msr; /* ptr to MSR save area */ + + uint_t krs_cpu_state; /* KDI_CPU_STATE_* mstr/slv */ + uint_t krs_cpu_flushed; /* Have caches been flushed? */ + uint_t krs_cpu_id; /* this CPU's ID */ + + /* Bread crumb ring buffer */ + ulong_t krs_curcrumbidx; /* Current krs_crumbs idx */ + kdi_crumb_t *krs_curcrumb; /* Pointer to current crumb */ + kdi_crumb_t krs_crumbs[KDI_NCRUMBS]; /* Crumbs */ +} kdi_cpusave_t; + +#endif /* !_ASM */ + +#ifdef __cplusplus +} +#endif + +#endif /* _SYS_KDI_REGS_H */ diff --git a/usr/src/uts/intel/sys/mmu.h b/usr/src/uts/intel/sys/mmu.h deleted file mode 100644 index 167a7ee895..0000000000 --- a/usr/src/uts/intel/sys/mmu.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#ifndef _SYS_MMU_H -#define _SYS_MMU_H - -#pragma ident "%Z%%M% %I% %E% SMI" - -#if defined(__i386) || defined(__amd64) - -#include <ia32/sys/mmu.h> /* XX64 x86/sys/mmu.h */ - -#endif - -#endif /* _SYS_MMU_H */ diff --git a/usr/src/uts/intel/sys/pmem.h b/usr/src/uts/intel/sys/pmem.h new file mode 100644 index 0000000000..068ea349b2 --- /dev/null +++ b/usr/src/uts/intel/sys/pmem.h @@ -0,0 +1,84 @@ +/* + * CDDL HEADER START + * + * The contents of this file are subject to the terms of the + * Common Development and Distribution License, Version 1.0 only + * (the "License"). You may not use this file except in compliance + * with the License. + * + * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE + * or http://www.opensolaris.org/os/licensing. + * See the License for the specific language governing permissions + * and limitations under the License. + * + * When distributing Covered Code, include this CDDL HEADER in each + * file and include the License file at usr/src/OPENSOLARIS.LICENSE. + * If applicable, add the following below this CDDL HEADER, with the + * fields enclosed by brackets "[]" replaced with your own identifying + * information: Portions Copyright [yyyy] [name of copyright owner] + * + * CDDL HEADER END + */ +/* + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. + */ + +#ifndef _SYS_PMEM_H +#define _SYS_PMEM_H + +#pragma ident "%Z%%M% %I% %E% SMI" + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * PMEM - Direct mapping physical memory pages to userland process + * + * Provide consolidation private functions used for directly (w/o occupying + * kernel virtual address space) allocating and exporting physical memory pages + * to userland. + */ + +/* + * Flags to pass to pmem_alloc + */ +#define PMEM_SLEEP 0x1 +#define PMEM_NOSLEEP 0x2 + +/* + * Called by driver devmap routine to pass physical memory mapping info to + * seg_dev framework, used only for physical memory allocated from + * devmap_pmem_alloc(). + */ +int devmap_pmem_setup(devmap_cookie_t, dev_info_t *dip, + struct devmap_callback_ctl *, devmap_pmem_cookie_t, offset_t, + size_t, uint_t, uint_t, ddi_device_acc_attr_t *); + +/* + * Replace existing mapping using a new cookie, mainly gets called when doing + * fork(). Should be called in pertinent devmap_dup(9E). + */ +int devmap_pmem_remap(devmap_cookie_t, dev_info_t *dip, + devmap_pmem_cookie_t, offset_t, size_t, uint_t, uint_t, + ddi_device_acc_attr_t *); + +/* + * Directly (i.e., without occupying kernel virtual address space) allocate + * 'npages' physical memory pages for exporting to user land. The allocated + * page_t pointer will be recorded in cookie. + */ +int devmap_pmem_alloc(size_t, uint_t, devmap_pmem_cookie_t *); + +void devmap_pmem_free(devmap_pmem_cookie_t); + +int devmap_pmem_getpfns(devmap_pmem_cookie_t, uint_t, pgcnt_t, pfn_t *); + +void pmem_init(); + +#ifdef __cplusplus +} +#endif + +#endif /* _SYS_PMEM_H */ diff --git a/usr/src/uts/intel/sys/segments.h b/usr/src/uts/intel/sys/segments.h index fe65db8575..b15131279f 100644 --- a/usr/src/uts/intel/sys/segments.h +++ b/usr/src/uts/intel/sys/segments.h @@ -1,5 +1,5 @@ /* - * Copyright 2006 Sun Microsystems, Inc. All rights reserved. + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -80,7 +80,7 @@ extern "C" { #endif #define SELTOIDX(s) ((s) >> 3) /* selector to index */ -#define SEL_KPL 0 /* kernel priority level */ +#define SEL_KPL 0 /* kernel privilege level */ #define SEL_UPL 3 /* user priority level */ #define SEL_TI_LDT 4 /* local descriptor table */ #define SEL_LDT(s) (IDXTOSEL(s) | SEL_TI_LDT | SEL_UPL) /* local sel */ @@ -126,10 +126,28 @@ extern void wr_gdtr(desctbr_t *); extern void wr_ldtr(selector_t); extern selector_t rd_ldtr(void); extern void wr_tsr(selector_t); +extern void kmdb_enter(void); #if defined(__amd64) extern void clr_ldt_sregs(void); -#endif + +/* + * inlines for update_segregs + */ +extern void __set_ds(selector_t); +extern void __set_es(selector_t); +extern void __set_fs(selector_t); +extern void __set_gs(selector_t); +extern void __swapgs(void); +#endif /* __amd64 */ + +#if defined(__amd64) +extern void load_segment_registers(selector_t, selector_t, selector_t, + selector_t); /* (alphabetical) */ +#elif defined(__i386) +extern void load_segment_registers(selector_t, selector_t, selector_t, + selector_t, selector_t, selector_t); /* (alphabetical) */ +#endif /* __i386 */ #if !defined(__amd64) @@ -329,20 +347,21 @@ typedef struct gate_desc { extern void set_usegd(user_desc_t *, uint_t, void *, size_t, uint_t, uint_t, uint_t, uint_t); -extern void set_gatesegd(gate_desc_t *, void (*)(void), selector_t, uint_t, - uint_t, uint_t); #elif defined(__i386) extern void set_usegd(user_desc_t *, void *, size_t, uint_t, uint_t, uint_t, uint_t); -extern void set_gatesegd(gate_desc_t *, void (*)(void), selector_t, - uint_t, uint_t, uint_t); #endif /* __i386 */ +extern void set_gatesegd(gate_desc_t *, void (*)(void), selector_t, + uint_t, uint_t); + void set_syssegd(system_desc_t *, void *, size_t, uint_t, uint_t); +void init_boot_gdt(user_desc_t *); + #endif /* _ASM */ /* @@ -433,26 +452,31 @@ void set_syssegd(system_desc_t *, void *, size_t, uint_t, uint_t); * in long mode system segment decriptors expand to 128 bits. * * GDT_LWPFS and GDT_LWPGS must be the same for both 32 and 64-bit - * kernels. See setup_context in libc. + * kernels. See setup_context in libc. 64-bit processes must set + * %fs or %gs to null selector to use 64-bit fsbase or gsbase + * respectively. */ +#define GDT_NULL 0 /* null */ +#define GDT_B32DATA 1 /* dboot 32 bit data descriptor */ +#define GDT_B32CODE 2 /* dboot 32 bit code descriptor */ +#define GDT_B16CODE 3 /* bios call 16 bit code descriptor */ +#define GDT_B16DATA 4 /* bios call 16 bit data descriptor */ +#define GDT_B64CODE 5 /* dboot 64 bit code descriptor */ +#define GDT_BGSTMP 7 /* kmdb descriptor only used early in boot */ + #if defined(__amd64) -#define GDT_NULL 0 /* null */ -#define GDT_B32DATA 1 /* copied from boot */ -#define GDT_B32CODE 2 /* copied from boot */ -#define GDT_B64DATA 3 /* copied from boot */ -#define GDT_B64CODE 4 /* copied from boot */ -#define GDT_KCODE 5 /* kernel code seg %cs */ -#define GDT_KDATA 6 /* kernel data seg %ds */ -#define GDT_U32CODE 7 /* 32-bit process on 64-bit kernel %cs */ -#define GDT_UDATA 8 /* user data seg %ds (32 and 64 bit) */ -#define GDT_UCODE 9 /* native user code seg %cs */ -#define GDT_LDT 10 /* LDT for current process */ -#define GDT_KTSS 12 /* kernel tss */ +#define GDT_KCODE 6 /* kernel code seg %cs */ +#define GDT_KDATA 7 /* kernel data seg %ds */ +#define GDT_U32CODE 8 /* 32-bit process on 64-bit kernel %cs */ +#define GDT_UDATA 9 /* user data seg %ds (32 and 64 bit) */ +#define GDT_UCODE 10 /* native user code seg %cs */ +#define GDT_LDT 12 /* LDT for current process */ +#define GDT_KTSS 14 /* kernel tss */ #define GDT_FS GDT_NULL /* kernel %fs segment selector */ #define GDT_GS GDT_NULL /* kernel %gs segment selector */ -#define GDT_LWPFS 55 /* lwp private %fs segment selector */ -#define GDT_LWPGS 56 /* lwp private %gs segment selector */ +#define GDT_LWPFS 55 /* lwp private %fs segment selector (32-bit) */ +#define GDT_LWPGS 56 /* lwp private %gs segment selector (32-bit) */ #define GDT_BRANDMIN 57 /* first entry in GDT for brand usage */ #define GDT_BRANDMAX 61 /* last entry in GDT for brand usage */ #define NGDT 62 /* number of entries in GDT */ @@ -465,11 +489,6 @@ void set_syssegd(system_desc_t *, void *, size_t, uint_t, uint_t); #elif defined(__i386) -#define GDT_NULL 0 /* null */ -#define GDT_BOOTFLAT 1 /* copied from boot */ -#define GDT_BOOTCODE 2 /* copied from boot */ -#define GDT_BOOTCODE16 3 /* copied from boot */ -#define GDT_BOOTDATA 4 /* copied from boot */ #define GDT_LDT 40 /* LDT for current process */ #define GDT_KTSS 42 /* kernel tss */ #define GDT_KCODE 43 /* kernel code seg %cs */ @@ -501,17 +520,32 @@ void set_syssegd(system_desc_t *, void *, size_t, uint_t, uint_t); #define ULDT_SEL SEL_GDT(GDT_LDT, SEL_KPL) #define KTSS_SEL SEL_GDT(GDT_KTSS, SEL_KPL) #define DFTSS_SEL SEL_GDT(GDT_DBFLT, SEL_KPL) -#define KFS_SEL SEL_GDT(GDT_NULL, SEL_KPL) +#define KFS_SEL 0 #define KGS_SEL SEL_GDT(GDT_GS, SEL_KPL) #define LWPFS_SEL SEL_GDT(GDT_LWPFS, SEL_UPL) #define LWPGS_SEL SEL_GDT(GDT_LWPGS, SEL_UPL) #define BRANDMIN_SEL SEL_GDT(GDT_BRANDMIN, SEL_UPL) #define BRANDMAX_SEL SEL_GDT(GDT_BRANDMAX, SEL_UPL) -#if defined(__amd64) + #define B64CODE_SEL SEL_GDT(GDT_B64CODE, SEL_KPL) +#define B32CODE_SEL SEL_GDT(GDT_B32CODE, SEL_KPL) +#define B32DATA_SEL SEL_GDT(GDT_B32DATA, SEL_KPL) +#define B16CODE_SEL SEL_GDT(GDT_B16CODE, SEL_KPL) +#define B16DATA_SEL SEL_GDT(GDT_B16DATA, SEL_KPL) + +/* + * Temporary %gs descriptor used by kmdb with -d option. Only lives + * in boot's GDT and is not copied into kernel's GDT from boot. + */ +#define KMDBGS_SEL SEL_GDT(GDT_BGSTMP, SEL_KPL) + +/* + * Selector used for kdi_idt when kmdb has taken over the IDT. + */ +#if defined(__amd64) +#define KMDBCODE_SEL B64CODE_SEL #else -#define BOOTCODE_SEL SEL_GDT(GDT_BOOTCODE, SEL_KPL) -#define BOOTFLAT_SEL SEL_GDT(GDT_BOOTFLAT, SEL_KPL) +#define KMDBCODE_SEL B32CODE_SEL #endif /* @@ -532,7 +566,7 @@ void set_syssegd(system_desc_t *, void *, size_t, uint_t, uint_t); #pragma align 16(idt0) extern gate_desc_t idt0[NIDT]; extern desctbr_t idt0_default_reg; -extern user_desc_t gdt0[NGDT]; +extern user_desc_t *gdt0; extern user_desc_t zero_udesc; extern system_desc_t zero_sdesc; diff --git a/usr/src/uts/intel/sys/x86_archext.h b/usr/src/uts/intel/sys/x86_archext.h index af06a50a92..d637f9b284 100644 --- a/usr/src/uts/intel/sys/x86_archext.h +++ b/usr/src/uts/intel/sys/x86_archext.h @@ -73,14 +73,14 @@ extern "C" { #define CPUID_INTC_EDX_SS 0x08000000 /* self-snoop */ #define CPUID_INTC_EDX_HTT 0x10000000 /* Hyper Thread Technology */ #define CPUID_INTC_EDX_TM 0x20000000 /* thermal monitoring */ - /* 0x40000000 - reserved */ +#define CPUID_INTC_EDX_IA64 0x40000000 /* Itanium emulating IA32 */ #define CPUID_INTC_EDX_PBE 0x80000000 /* Pending Break Enable */ -#define FMT_CPUID_INTC_EDX \ - "\20" \ - "\40pbe\36tm\35htt\34ss\33sse2\32sse\31fxsr" \ - "\30mmx\27acpi\26ds\24clfsh\23psn\22pse36\21pat"\ - "\20cmov\17mca\16pge\15mtrr\14sep\12apic\11cx8" \ +#define FMT_CPUID_INTC_EDX \ + "\20" \ + "\40pbe\37ia64\36tm\35htt\34ss\33sse2\32sse\31fxsr" \ + "\30mmx\27acpi\26ds\24clfsh\23psn\22pse36\21pat" \ + "\20cmov\17mca\16pge\15mtrr\14sep\12apic\11cx8" \ "\10mce\7pae\6msr\5tsc\4pse\3de\2vme\1fpu" /* @@ -92,22 +92,26 @@ extern "C" { /* 0x00000004 - reserved */ #define CPUID_INTC_ECX_MON 0x00000008 /* MONITOR/MWAIT */ #define CPUID_INTC_ECX_DSCPL 0x00000010 /* CPL-qualified debug store */ - /* 0x00000020 - reserved */ - /* 0x00000040 - reserved */ +#define CPUID_INTC_ECX_VMX 0x00000020 /* Hardware VM extensions */ +#define CPUID_INTC_ECX_SMX 0x00000040 /* Secure mode extensions */ #define CPUID_INTC_ECX_EST 0x00000080 /* enhanced SpeedStep */ #define CPUID_INTC_ECX_TM2 0x00000100 /* thermal monitoring */ - /* 0x00000200 - reserved */ +#define CPUID_INTC_ECX_SSSE3 0x00000200 /* Supplemental SSE3 insns */ #define CPUID_INTC_ECX_CID 0x00000400 /* L1 context ID */ /* 0x00000800 - reserved */ /* 0x00001000 - reserved */ - /* 0x00002000 - reserved */ -#define CPUID_INTC_ECX_CX16 0x00002000 /* CMPXCHG16B */ -#define CPUID_INTC_ECX_XTPR 0x00004000 /* disable task pri messages */ - -#define FMT_CPUID_INTC_ECX \ - "\20" \ - "\20\17xtpr\16cx16\13cid\11tm2" \ - "\10est\5dscpl\4monitor\1sse3" +#define CPUID_INTC_ECX_CX16 0x00002000 /* cmpxchg16 */ +#define CPUID_INTC_ECX_ETPRD 0x00004000 /* extended task pri messages */ + /* 0x00008000 - reserved */ + /* 0x00010000 - reserved */ + /* 0x00020000 - reserved */ +#define CPUID_INTC_ECX_DCA 0x00040000 /* direct cache access */ + +#define FMT_CPUID_INTC_ECX \ + "\20" \ + "\30\23dca" \ + "\20\17etprd\16cx16\13cid\12ssse3\11tm2" \ + "\10est\7smx\6vmx\5dscpl\4mon\1sse3" /* * cpuid instruction feature flags in %edx (extended function 0x80000001) @@ -129,7 +133,8 @@ extern "C" { #define CPUID_AMD_EDX_PGE 0x00002000 /* page global enable */ #define CPUID_AMD_EDX_MCA 0x00004000 /* machine check arch */ #define CPUID_AMD_EDX_CMOV 0x00008000 /* conditional move insns */ -#define CPUID_AMD_EDX_PAT 0x00010000 /* page attribute table */ +#define CPUID_AMD_EDX_PAT 0x00010000 /* K7: page attribute table */ +#define CPUID_AMD_EDX_FCMOV 0x00010000 /* FCMOVcc etc. */ #define CPUID_AMD_EDX_PSE36 0x00020000 /* 36-bit pagesize extension */ /* 0x00040000 - reserved */ /* 0x00080000 - reserved */ @@ -138,9 +143,9 @@ extern "C" { #define CPUID_AMD_EDX_MMXamd 0x00400000 /* AMD: MMX extensions */ #define CPUID_AMD_EDX_MMX 0x00800000 /* MMX instructions */ #define CPUID_AMD_EDX_FXSR 0x01000000 /* fxsave and fxrstor */ - /* 0x02000000 - reserved */ +#define CPUID_AMD_EDX_FFXSR 0x02000000 /* fast fxsave/fxrstor */ /* 0x04000000 - reserved */ - /* 0x08000000 - reserved */ +#define CPUID_AMD_EDX_TSCP 0x08000000 /* rdtscp instruction */ /* 0x10000000 - reserved */ #define CPUID_AMD_EDX_LM 0x20000000 /* AMD: long mode */ #define CPUID_AMD_EDX_3DNowx 0x40000000 /* AMD: extensions to 3DNow! */ @@ -148,16 +153,30 @@ extern "C" { #define FMT_CPUID_AMD_EDX \ "\20" \ - "\40a3d\37a3d+\36lm\31fxsr" \ + "\40a3d\37a3d+\36lm\34tscp\32ffxsr\31fxsr" \ "\30mmx\27mmxext\25nx\22pse\21pat" \ "\20cmov\17mca\16pge\15mtrr\14syscall\12apic\11cx8" \ "\10mce\7pae\6msr\5tsc\4pse\3de\2vme\1fpu" -#define CPUID_AMD_ECX_CMP_LEGACY 0x00000002 /* AMD: multi-core chip */ +#define CPUID_AMD_ECX_AHF64 0x00000001 /* LAHF and SAHF in long mode */ +#define CPUID_AMD_ECX_CMP_LGCY 0x00000002 /* AMD: multicore chip */ +#define CPUID_AMD_ECX_SVM 0x00000004 /* AMD: secure VM */ +#define CPUID_AMD_ECX_EAS 0x00000008 /* extended apic space */ +#define CPUID_AMD_ECX_CR8D 0x00000010 /* AMD: 32-bit mov %cr8 */ #define FMT_CPUID_AMD_ECX \ "\20" \ - "\1htvalid" + "\5cr8d\3svm\2lcmplgcy\1ahf64" + +/* + * Intel now seems to have claimed part of the "extended" function + * space that we previously for non-Intel implementors to use. + * More excitingly still, they've claimed bit 20 to mean LAHF/SAHF + * is available in long mode i.e. what AMD indicate using bit 0. + * On the other hand, everything else is labelled as reserved. + */ +#define CPUID_INTC_ECX_AHF64 0x00100000 /* LAHF and SAHF in long mode */ + #define P5_MCHADDR 0x0 #define P5_CESR 0x11 @@ -329,6 +348,7 @@ typedef struct mtrrvar { #define X86_MSR 0x00000004 #define X86_MTRR 0x00000008 #define X86_PGE 0x00000010 +#define X86_DE 0x00000020 #define X86_CMOV 0x00000040 #define X86_MMX 0x00000080 #define X86_MCA 0x00000100 @@ -344,14 +364,15 @@ typedef struct mtrrvar { #define X86_SSE3 0x00040000 #define X86_CX16 0x00080000 #define X86_CMP 0x00100000 +#define X86_TSCP 0x00200000 #define X86_CPUID 0x01000000 #define FMT_X86_FEATURE \ "\20" \ "\31cpuid" \ - "\25cmp\24cx16\23sse3\22nx\21asysc" \ + "\26tscp\25cmp\24cx16\23sse3\22nx\21asysc" \ "\20htt\17sse2\16sse\15sep\14pat\13cx8\12pae\11mca" \ - "\10mmx\7cmov\5pge\4mtrr\3msr\2tsc\1lgpg" + "\10mmx\7cmov\6de\5pge\4mtrr\3msr\2tsc\1lgpg" /* * x86_type is a legacy concept; this is supplanted @@ -482,7 +503,6 @@ extern uint_t x86_feature; extern uint_t x86_type; extern uint_t x86_vendor; -extern ulong_t cr4_value; extern uint_t pentiumpro_bug4046376; extern uint_t pentiumpro_bug4064495; @@ -509,9 +529,13 @@ extern uint64_t rdmsr(uint_t); extern void wrmsr(uint_t, const uint64_t); extern uint64_t xrdmsr(uint_t); extern void xwrmsr(uint_t, const uint64_t); +extern int checked_rdmsr(uint_t, uint64_t *); +extern int checked_wrmsr(uint_t, uint64_t); + extern void invalidate_cache(void); extern ulong_t getcr4(void); extern void setcr4(ulong_t); + extern void mtrr_sync(void); extern void cpu_fast_syscall_enable(void *); @@ -547,6 +571,8 @@ extern int cpuid_opteron_erratum(struct cpu *, uint_t); struct cpuid_info; extern void setx86isalist(void); +extern void cpuid_alloc_space(struct cpu *); +extern void cpuid_free_space(struct cpu *); extern uint_t cpuid_pass1(struct cpu *); extern void cpuid_pass2(struct cpu *); extern void cpuid_pass3(struct cpu *); |