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path: root/usr/src/uts/intel/pcbe
AgeCommit message (Expand)AuthorFilesLines
2022-08-2414836 extend AMD chiprev mechanism to identify core revsKeith M Wesolowski1-3/+3
2022-02-0114091 Add AMD Cezanne infoRobert Mustacchi1-1/+2
2021-08-0213972 Want support for Zen 3 Ryzen CPC EventsRobert Mustacchi1-2/+5
2021-05-0613688 Want support for AMD Zen 3 Milan CPC EventsRobert Mustacchi1-3/+24
2020-12-2913339 Add support for Hygon Dhyana Family 18h processorPu Wen1-3/+7
2020-04-0712452 Want support for AMD Zen 2 CPC EventsRobert Mustacchi1-8/+30
2019-05-1510951 10895 unfixed 10146John Levon1-1/+2
2019-05-0910896 Want support for AMD Zen CPC eventsRobert Mustacchi2-84/+291
2019-05-0810895 Update cpcgen tools and data for Cascade LakeRobert Mustacchi1-4/+4
2019-03-1410146 core_pcbe_event_coverage() is missing an elseJohn Levon1-2/+3
2019-01-2110212 Autogenerate Intel pcbe values from perfmon dataRobert Mustacchi2-530/+110
2018-03-109251 p123_pcbe is useless and can be removedYuri Pankov1-1091/+0
2017-11-168785 p4_pcbe: 'p4_cccrstop' defined but not usedToomas Soome1-3/+0
2011-03-11783 gcc-built system panics loading pcbe.GenuineIntel.6Richard Lowe1-1/+2
2010-08-116964154 Missing unlock in set_all_zone_usr_proc_sys()Ethindra Ramamurthy1-0/+1
2010-07-146812663 Running out of bits in x86_featureKuriakose Kuruvilla3-9/+7
2010-07-026946100 Add machine check and performance counter support for new member of N...Adrian Frost1-2/+2
2010-02-046875283 Update PCBE implementation for new Intel processorsKuriakose Kuruvilla1-10/+23
2009-12-226764832 Provide user-level processor groups observabilityAlexander Kolbasov2-21/+27
2009-12-226912153 some components of ON are not ss12u1 lint cleanSurya Prakki1-3/+3
2009-12-056750860 core_pcbe back-end needs to support generic eventsKuriakose Kuruvilla1-64/+318
2009-04-296835175 strcmp() passed 0 as second argument on Pentium 4 systemsKuriakose Kuruvilla1-2/+2
2009-04-256672329 New performance counter events in Griffin processorKuriakose Kuruvilla1-213/+227
2009-02-066754549 Performance Counter tools do not work correctly for Intel Family 6 Mo...Kuriakose Kuruvilla1-45/+36
2008-12-226763870 Nehalem: cannot supply umask for named countersKuriakose Kuruvilla1-8/+6
2008-12-206729731 Add PCBE support for Atom processorsKrishnendu Sadhukhan - Sun Microsystems1-27/+166
2008-11-186758542 CPC Core2: recent counter name changes are not in alignment with the PRMKrishnendu Sadhukhan - Sun Microsystems1-16/+52
2008-09-286661753 Add support for performance counters on Intel future processorsKuriakose Kuruvilla1-147/+708
2008-09-19PSARC 2008/334 CPU Performance Counter Generic Event NamesJonathan Haslam5-52/+501
2008-08-016686448 Remove SCCS keyword %I% used in PCBE driverskk2085214-7/+7
2008-06-106537929 CPC support for Intel Woodcrest (Xeon 51xx) is not workingkk2085211-0/+1051
2007-10-186617261 Nevada Opteron performance counter names are inconsistent with Solari...jhaslam1-2/+2
2007-10-126567332 Support for CPC on greyhound/barcelona processorsksadhukh1-61/+163
2007-09-18PSARC 2006/260 Solaris on Xenjohnlev3-14/+14
2007-01-176461311 multi-level CMT scheduling optimizationsesaxe1-6/+5
2006-10-276242048 Several events exported by Opteron pcbe need modifyingjhaslam1-90/+131
2006-09-225033325 x86 CPC backends should accept raw event codesrab2-9/+40
2006-08-166458883 Some Opteron hardware counters not completely implemented even after ...cwb1-5/+13
2005-11-186352844 cpustat always returns same value for all events in single event spec...kucharsk1-1/+1
2005-10-276311933 rdmsr/wrmsr do not need to set/pass values via memory pointerskucharsk3-48/+42
2005-06-14OpenSolaris Launchstevel@tonic-gate3-0/+2411
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