From b51e13bf985efd1ff98249cad2824f2952f13ecb Mon Sep 17 00:00:00 2001 From: Garrett D'Amore Date: Tue, 27 Oct 2009 15:27:51 -0700 Subject: 6741199 Remove cg6 kernel driver [PSARC 2008/488] --- usr/src/uts/sun/Makefile.files | 10 - usr/src/uts/sun/io/bwtwo.conf | 31 - usr/src/uts/sun/io/cgsix.c | 2886 ---------------------------------- usr/src/uts/sun/io/cgsix.conf | 29 - usr/src/uts/sun/io/mem_kern.c | 90 -- usr/src/uts/sun/sys/Makefile | 9 +- usr/src/uts/sun/sys/cg3var.h | 74 - usr/src/uts/sun/sys/cg6fbc.h | 519 ------ usr/src/uts/sun/sys/cg6reg.h | 148 -- usr/src/uts/sun/sys/cg6tec.h | 742 --------- usr/src/uts/sun/sys/cg6thc.h | 334 ---- usr/src/uts/sun/sys/cg6var.h | 167 -- usr/src/uts/sun/sys/memvar.h | 191 --- usr/src/uts/sun/sys/pr_impl_util.h | 224 --- usr/src/uts/sun/sys/pr_planegroups.h | 81 - usr/src/uts/sun/sys/ramdac.h | 94 -- 16 files changed, 2 insertions(+), 5627 deletions(-) delete mode 100644 usr/src/uts/sun/io/bwtwo.conf delete mode 100644 usr/src/uts/sun/io/cgsix.c delete mode 100644 usr/src/uts/sun/io/cgsix.conf delete mode 100644 usr/src/uts/sun/io/mem_kern.c delete mode 100644 usr/src/uts/sun/sys/cg3var.h delete mode 100644 usr/src/uts/sun/sys/cg6fbc.h delete mode 100644 usr/src/uts/sun/sys/cg6reg.h delete mode 100644 usr/src/uts/sun/sys/cg6tec.h delete mode 100644 usr/src/uts/sun/sys/cg6thc.h delete mode 100644 usr/src/uts/sun/sys/cg6var.h delete mode 100644 usr/src/uts/sun/sys/memvar.h delete mode 100644 usr/src/uts/sun/sys/pr_impl_util.h delete mode 100644 usr/src/uts/sun/sys/pr_planegroups.h delete mode 100644 usr/src/uts/sun/sys/ramdac.h (limited to 'usr/src/uts/sun') diff --git a/usr/src/uts/sun/Makefile.files b/usr/src/uts/sun/Makefile.files index 0fc2520c96..42162433cd 100644 --- a/usr/src/uts/sun/Makefile.files +++ b/usr/src/uts/sun/Makefile.files @@ -33,14 +33,6 @@ # # object lists # -# XXX - vuid_* ?, files indicates these should be in the win and -# kbd modules.... What gives? -# -# -# generic-unix module -# -GENUNIX_OBJS += \ - mem_kern.o # # Driver Modules @@ -49,8 +41,6 @@ AUDIOCS_OBJS += audio_4231.o audio_4231_apcdma.o audio_4231_eb2dma.o BPP_OBJS += bpp.o -CGSIX_OBJS += cgsix.o - DAD_OBJS += dad.o DMA_OBJS += dmaga.o diff --git a/usr/src/uts/sun/io/bwtwo.conf b/usr/src/uts/sun/io/bwtwo.conf deleted file mode 100644 index 20996e1569..0000000000 --- a/usr/src/uts/sun/io/bwtwo.conf +++ /dev/null @@ -1,31 +0,0 @@ -# -# CDDL HEADER START -# -# The contents of this file are subject to the terms of the -# Common Development and Distribution License, Version 1.0 only -# (the "License"). You may not use this file except in compliance -# with the License. -# -# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE -# or http://www.opensolaris.org/os/licensing. -# See the License for the specific language governing permissions -# and limitations under the License. -# -# When distributing Covered Code, include this CDDL HEADER in each -# file and include the License file at usr/src/OPENSOLARIS.LICENSE. -# If applicable, add the following below this CDDL HEADER, with the -# fields enclosed by brackets "[]" replaced with your own identifying -# information: Portions Copyright [yyyy] [name of copyright owner] -# -# CDDL HEADER END -# -# -# Copyright (c) 1992, by Sun Microsystems, Inc. -# -#ident "%Z%%M% %I% %E% SMI" - -name="bwtwo" parent="obio" on_cpu=0x21 - reg=0x210,0xfd000000,0x42000 interrupts=8; - -name="bwtwo" parent="obio" on_cpu=0x2f not_on_cpu=0x21 - reg=0x210,0xfb300000,0x42000 interrupts=8; diff --git a/usr/src/uts/sun/io/cgsix.c b/usr/src/uts/sun/io/cgsix.c deleted file mode 100644 index 0d856fd298..0000000000 --- a/usr/src/uts/sun/io/cgsix.c +++ /dev/null @@ -1,2886 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License (the "License"). - * You may not use this file except in compliance with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 2008 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - - -#pragma weak setintrenable -/* - * Cgsix theory of operation: - * - * Most cg6 operations are done by mapping the cg6 components into - * user process memory. User processes that share mappings (typically - * pixrect programs) must cooperate among themselves to prevent damaging - * the state of the cg6. User processes may also acquire private - * mappings (MAP_PRIVATE flag to mmap(2)), in which case the cg6 segment - * driver will preserve device state for each mapping. - * - * Note that the segment driver may go away in the future. - * - * cg6_mmap interprets the device offset as follows: - * - * CG6_VBASE 0x70000000 - * CG6_VADDR_FBC 0x70000000 fbc mapping - * CG6_VADDR_TEC 0x70001000 tec mapping - * CG6_VADDR_CMAP 0x70002000 colormap dacs - * CG6_VADDR_FHC 0x70004000 fhc mapping - * CG6_VADDR_THC 0x70005000 thc mapping - * CG6_VADDR_ROM 0x70006000 eprom mapping - * CG6_VADDR_COLOR 0x70016000 framebuffer mapping - * CG6_VADDR_DHC 0x78000000 dac hardware - * CG6_VADDR_ALT 0x78002000 alternate registers (?) - * CG6_VADDR_UART 0x78004000 uart, if any - * CG6_VADDR_VRT 0x78006000 vertical retrace counter page - * - * The lengths of these mappings should be: - * - * CG6_CMAP_SZ 0x2000 - * CG6_FBCTEC_SZ 0x2000 - * CG6_FHCTHC_SZ 0x2000 - * CG6_ROM_SZ 0x10000 - * CG6_FB_SZ 0x100000 - * CG6_DHC_SZ 0x2000 - * CG6_ALT_SZ 0x2000 - * - * Mappings to the fbc and tec registers may be MAP_PRIVATE, in which case - * the segment driver keeps a per-context copy of the fbc and tec - * registers in local memory. Only one context at a time may have valid - * mappings. If a process tries to access the registers through an - * invalid mapping, the segment driver in invoked to swap register state - * and validate the mappings. - * - * In the case of the buggy LSC revision 2. chip, the framebuffer mapping - * is also considered part of a context. This is to ensure that the - * registers are idle before the framebuffer is touched. - * - * Mappings to FBC, TEC and framebuffer may be made seperately, in which - * case the driver uses heuristics to bind seperate mappings into a single - * context. These heuristics may break down if mappings are done in a - * funny order or in a multi-threaded environment, so seperate mappings - * are not recommended. - * - * Finally, processes have the option of mapping the "vertical retrace - * page". This is a page in shared memory containing a 32-bit integer - * that is incremented each time a vertical retrace interrupt occurs. It - * is used so that programs may synchronize themselves with vertical - * retrace. - */ - -/* - * SBus accelerated 8 bit color frame buffer driver - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include -#include /* for CG3_MMAP_OFFSET */ -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include - -#define KIOIP KSTAT_INTR_PTR(softc->intrstats) - -#define CG6DEBUG 0 - -/* configuration options */ -#define CG6DELAY(c, n) \ -{ \ - register int N = n; \ - while (--N > 0) { \ - if (c) \ - break; \ - drv_usecwait(1); \ - } \ -} - -#if CG6DEBUG >= 2 -int cg6_debug = 0; - -#define DEBUGF(level, args) \ - { if (cg6_debug >= (level)) cmn_err args; } -#define DUMP_SEGS(level, s, c) \ - { if (cg6_debug >= (level)) dump_segs(s, c); } -#else -#define DEBUGF(level, args) /* nothing */ -#define DUMP_SEGS(level, s, c) /* nothing */ -#endif - -#define getprop(devi, name, def) \ - ddi_getprop(DDI_DEV_T_ANY, (devi), \ - DDI_PROP_DONTPASS, (name), (def)) - -/* config info */ - -static int cg6_open(dev_t *, int, int, cred_t *); -static int cg6_close(dev_t, int, int, cred_t *); -static int cg6_ioctl(dev_t, int, intptr_t, int, cred_t *, int *); -static int cg6_mmap(dev_t, off_t, int); -static int cg6_devmap(dev_t, devmap_cookie_t, offset_t, size_t, - size_t *, uint_t); -static int cg6_segmap(dev_t, off_t, - struct as *, caddr_t *, off_t, uint_t, - uint_t, uint_t, cred_t *); - -static struct vis_identifier cg6_ident = { "SUNWcg6" }; - -static struct cb_ops cg6_cb_ops = { - cg6_open, /* open */ - cg6_close, /* close */ - nodev, /* strategy */ - nodev, /* print */ - nodev, /* dump */ - nodev, /* read */ - nodev, /* write */ - cg6_ioctl, /* ioctl */ - cg6_devmap, /* devmap */ - cg6_mmap, /* mmap */ - cg6_segmap, /* segmap */ - nochpoll, /* poll */ - ddi_prop_op, /* cb_prop_op */ - 0, /* streamtab */ - D_NEW|D_MP|D_DEVMAP|D_HOTPLUG, /* Driver compatibility flag */ - CB_REV, /* rev */ - nodev, /* int (*cb_aread)() */ - nodev /* int (*cb_awrite)() */ -}; - -static int cg6_info(dev_info_t *dip, ddi_info_cmd_t infocmd, - void *arg, void **result); -static int cg6_attach(dev_info_t *, ddi_attach_cmd_t); -static int cg6_detach(dev_info_t *, ddi_detach_cmd_t); -static int cg6_power(dev_info_t *, int, int); - -struct dev_ops cgsix_ops = { - DEVO_REV, /* devo_rev, */ - 0, /* refcnt */ - cg6_info, /* info */ - nulldev, /* identify */ - nulldev, /* probe */ - cg6_attach, /* attach */ - cg6_detach, /* detach */ - nodev, /* reset */ - &cg6_cb_ops, /* driver operations */ - (struct bus_ops *)0, /* bus operations */ - cg6_power, - ddi_quiesce_not_supported, /* devo_quiesce */ -}; - -/* - * This stucture is used to contain the driver - * private mapping data (one for each requested - * device mapping). A pointer to this data is - * passed into each mapping callback routine. - */ -struct cg6map_pvt { - struct cg6_softc *softc; - devmap_cookie_t dhp; /* handle of devmap object */ - uint_t type; /* mapping type */ - off_t offset; /* starting offset of this map */ - size_t len; /* length of this map */ - struct cg6_cntxt *context; /* associated context */ - struct cg6map_pvt *next; /* List of associated pvt's for */ - /* this context */ -}; - -static struct ddi_device_acc_attr endian_attr = { - DDI_DEVICE_ATTR_V0, - DDI_NEVERSWAP_ACC, - DDI_STRICTORDER_ACC -}; - -/* how much to map */ -#define CG6MAPSIZE MMAPSIZE(0) - -/* vertical retrace counter page */ -#ifndef CG6_VRT_SZ -#define CG6_VRT_SZ 8192 -#endif - -/* boardrev bits */ -#define BRDRV_SETRES 0x01 /* board supports set resolution */ -#define BRDRV_TYPE 0x78 /* board type: */ -#define BRDRV_GX 0x00 -#define BRDRV_LSC 0x08 -#define BRDRV_DUPLO 0x10 -#define BRDRV_LEGOHR 0x18 -#define BRDRV_QAUDRO 0x20 -#define BRDRV_HIRES 0x80 /* hires dacs (junior vs. senior) */ - -#define CG6_FBC_WAIT 500000 /* .5 seconds */ - -/* enable/disable interrupt */ -#define TEC_EN_VBLANK_IRQ 0x20 -#define TEC_HCMISC_IRQBIT 0x10 - -/* position value to use to disable HW cursor */ -#define CG6_CURSOR_OFFPOS ((uint_t)0xffe0ffe0) - -/* - * Per-context info: - * many registers in the tec and fbc do - * not need to be saved/restored. - */ - -struct cg6_cntxt { - struct cg6_cntxt *link; /* link to next (private) context if any */ - struct cg6map_pvt *pvt; /* List of associated pvt's for this context */ - pid_t pid; /* "owner" of this context */ - int flag; - - struct { - uint_t mv; - uint_t clip; - uint_t vdc; - uint_t data[64][2]; - } tec; - - struct { - uint_t status; - uint_t clipcheck; - struct l_fbc_misc misc; - uint_t x0, y0, x1, y1, x2, y2, x3, y3; - uint_t rasteroffx, rasteroffy; - uint_t autoincx, autoincy; - uint_t clipminx, clipminy, clipmaxx, clipmaxy; - uint_t fcolor, bcolor; - struct l_fbc_rasterop rasterop; - uint_t planemask, pixelmask; - union l_fbc_pattalign pattalign; - uint_t pattern0, pattern1, pattern2, pattern3, pattern4, pattern5, - pattern6, pattern7; - } fbc; -}; - -/* per-unit data */ -struct cg6_softc { - Pixrect pr; /* kernel pixrect */ - struct mprp_data prd; /* pixrect private data */ -#define _w pr.pr_size.x -#define _h pr.pr_size.y -#define _fb prd.mpr.md_image -#define _linebytes prd.mpr.md_linebytes - size_t size; /* total size of frame buffer */ - size_t ndvramsz; /* size of non-display Video RAM */ - caddr_t ndvram; /* Storage for nd-VRAM, while suspended */ - size_t dummysize; /* total size of overlay plane */ - kmutex_t interlock; /* interrupt locking */ - off_t addr_rom; /* varies between p4 & sbus */ - caddr_t fbctec; /* fbc&tec kernel map addr. */ - caddr_t cmap; /* colormap kernel map addr. */ - caddr_t fhcthc; /* fhc&thc kernel map addr. */ - caddr_t rom; /* rom kernel map addr. */ - caddr_t dhc; /* dac hardware */ - caddr_t alt; /* alt registers */ - caddr_t uart; /* uart registers */ - pfn_t fbpfnum; /* pfn of fb for mmap() */ - - struct softcur { - short enable; /* cursor enable */ - short pad1; - struct fbcurpos pos; /* cursor position */ - struct fbcurpos hot; /* cursor hot spot */ - struct fbcurpos size; /* cursor bitmap size */ - uint32_t image[32]; /* cursor image bitmap */ - uint32_t mask[32]; /* cursor mask bitmap */ - } cur; - - union { /* shadow overlay color map */ - uint32_t omap_int[2]; /* cheating here to save space */ - uchar_t omap_char[3][2]; - } omap_image; -#define omap_rgb omap_image.omap_char[0] - ushort_t omap_update; /* overlay colormap update flag */ - uint32_t cmap_index; /* colormap update index */ - uint32_t cmap_count; /* colormap update count */ - union { /* shadow color map */ - uint32_t cmap_int[CG6_CMAP_ENTRIES * 3 / sizeof (uint32_t)]; - uchar_t cmap_char[3][CG6_CMAP_ENTRIES]; - } cmap_image; -#define cmap_rgb cmap_image.cmap_char[0] - -#define CG6VRTIOCTL 1 /* FBIOVERTICAL in effect */ -#define CG6VRTCTR 2 /* OWGX vertical retrace counter */ - size_t fbmappable; /* bytes mappable */ - int *vrtpage; /* pointer to VRT page */ - ddi_umem_cookie_t vrtcookie; /* pointer to VRT allocation */ - int vrtmaps; /* number of VRT page maps */ - int vrtflag; /* vrt interrupt flag */ - struct cg6_info cg6info; /* info about this cg6 */ - struct mon_info moninfo; /* info about this monitor */ - struct cg6_cntxt *curctx; /* context switching */ - struct cg6_cntxt shared_ctx; /* shared context */ - struct cg6_cntxt *pvt_ctx; /* list of non-shared contexts */ - int chiprev; /* fbc chip revision # */ - int emulation; /* emulation type, normally cgsix */ - dev_info_t *devi; /* back pointer */ - ddi_iblock_cookie_t iblock_cookie; /* block interrupts */ - kmutex_t mutex; /* mutex locking */ - kcondvar_t vrtsleep; /* for waiting on vertical retrace */ - int mapped_by_prom; /* $#!@ SVr4 */ - off_t mapped_by_driver; - int waiting; - int cg6_suspended; /* true if driver is suspended */ - int vidon; /* video enable state */ - int intr_flag; - kstat_t *intrstats; /* interrupt statistics */ -}; - -static int cg6map_map(devmap_cookie_t, dev_t, uint_t, offset_t, size_t, - void **); -static int cg6map_contextmgt(devmap_cookie_t, void *, offset_t, size_t, - uint_t, uint_t); -static int cg6map_dup(devmap_cookie_t, void *, devmap_cookie_t, void **); -static void cg6map_unmap(devmap_cookie_t, void *, offset_t, size_t, - devmap_cookie_t, void **, devmap_cookie_t, void **); -static int cg6map_access(devmap_cookie_t, void *, offset_t, size_t, - uint_t, uint_t); -static -struct devmap_callback_ctl cg6map_ops = { - DEVMAP_OPS_REV, /* devmap_ops version number */ - cg6map_map, /* devmap_ops map routine */ - cg6map_access, /* devmap_ops access routine */ - cg6map_dup, /* devmap_ops dup routine */ - cg6map_unmap, /* devmap_ops unmap routine */ -}; - -static size_t pagesize; -static void *cg6_softc_head; -clock_t cg6_ctxholdval = 1; - -/* default structure for FBIOGATTR ioctl */ -static struct fbgattr cg6_attr = { -/* real_type owner */ - FBTYPE_SUNFAST_COLOR, 0, -/* fbtype: type h w depth cms size */ - {FBTYPE_SUNFAST_COLOR, 0, 0, CG6_DEPTH, CG6_CMAP_ENTRIES, 0}, -/* fbsattr: flags emu_type dev_specific */ - {0, FBTYPE_SUN4COLOR, {0}}, -/* emu_types */ - {FBTYPE_SUNFAST_COLOR, FBTYPE_SUN3COLOR, FBTYPE_SUN4COLOR, -1} -}; - - -/* - * handy macros - */ -#define getsoftc(instance) \ - ((struct cg6_softc *)ddi_get_soft_state(cg6_softc_head, (instance))) - -#define btob(n) ptob(btopr(n)) /* TODO, change this? */ - - - -/* convert softc to data pointers */ - -#define S_FBC(softc) ((struct fbc *)(softc)->fbctec) -#define S_TEC(softc) ((struct tec *)((softc)->fbctec + CG6_TEC_POFF)) -#define S_FHC(softc) ((uint_t *)(softc)->fhcthc) -#define S_THC(softc) ((struct thc *)((softc)->fhcthc + CG6_TEC_POFF)) -#define S_CMAP(softc) ((struct cg6_cmap *)(softc)->cmap) - -#define cg6_set_video(softc, on) thc_set_video(S_THC(softc), (on)) -#define cg6_get_video(softc) thc_get_video(S_THC(softc)) - -#define cg6_int_enable(softc) \ - {\ - thc_int_enable(S_THC(softc)); } - -#define cg6_int_disable_intr(softc) \ - {\ - thc_int_disable(S_THC(softc)); } - -#define cg6_int_disable(softc) \ - {\ - mutex_enter(&(softc)->interlock); \ - softc->intr_flag = 1; \ - cg6_int_disable_intr(softc); \ - mutex_exit(&(softc)->interlock); } - -#define cg6_int_pending(softc) thc_int_pending(S_THC(softc)) - -/* check if color map update is pending */ -#define cg6_update_pending(softc) \ - ((softc)->cmap_count || (softc)->omap_update) - -/* - * forward references - */ -static uint_t cg6_intr(caddr_t); -static void cg6_reset_cmap(volatile uchar_t *, uint_t); -static void cg6_update_cmap(struct cg6_softc *, uint_t, uint_t); -static void cg6_cmap_bcopy(uchar_t *, uchar_t *, uint_t); -static void cg6_restore_prom_cmap(struct cg6_softc *, volatile uchar_t *, - uint_t); - -static void cg6_setcurpos(struct cg6_softc *); -static void cg6_setcurshape(struct cg6_softc *); -static void cg6_reset(struct cg6_softc *); -static int cg6_cntxsave(volatile struct fbc *, volatile struct tec *, - struct cg6_cntxt *); -static int cg6_cntxrestore(volatile struct fbc *, volatile struct tec *, - struct cg6_cntxt *); -static struct cg6_cntxt *ctx_map_insert(struct cg6_softc *, int); -static pid_t getpid(void); - -/* Loadable Driver stuff */ - -static struct modldrv modldrv = { - &mod_driverops, /* Type of module. This one is a driver */ - "cgsix driver", /* Name of the module. */ - &cgsix_ops, /* driver ops */ -}; - -static struct modlinkage modlinkage = { - MODREV_1, (void *) &modldrv, NULL -}; - -int -_init(void) -{ - register int e; - - if ((e = ddi_soft_state_init(&cg6_softc_head, - sizeof (struct cg6_softc), 1)) != 0) { - DEBUGF(1, (CE_CONT, "done\n")); - return (e); - } - - e = mod_install(&modlinkage); - - if (e) { - ddi_soft_state_fini(&cg6_softc_head); - DEBUGF(1, (CE_CONT, "done\n")); - } - DEBUGF(1, (CE_CONT, "cgsix: _init done rtn=%d\n", e)); - return (e); -} - -int -_fini(void) -{ - register int e; - - DEBUGF(1, (CE_CONT, "cgsix: _fini, mem used=%d\n", total_memory)); - - if ((e = mod_remove(&modlinkage)) != 0) - return (e); - - ddi_soft_state_fini(&cg6_softc_head); - - return (0); -} - -int -_info(struct modinfo *modinfop) -{ - return (mod_info(&modlinkage, modinfop)); -} - -static int -cg6_attach(dev_info_t *devi, ddi_attach_cmd_t cmd) -{ - register struct cg6_softc *softc; - caddr_t reg; - int w, h, bytes; - char *tmp; - char name[16]; - int unit = ddi_get_instance(devi); - int proplen; - caddr_t fb_ndvram; - - DEBUGF(1, (CE_CONT, "cg6_attach unit=%d cmd=%d\n", unit, (int)cmd)); - - switch (cmd) { - case DDI_ATTACH: - break; - - case DDI_RESUME: - if ((softc = ddi_get_driver_private(devi)) == NULL) - return (DDI_FAILURE); - if (!softc->cg6_suspended) - return (DDI_SUCCESS); - mutex_enter(&softc->mutex); - cg6_reset(softc); - if (softc->curctx) { - /* Restore the video state */ - cg6_set_video(softc, softc->vidon); - - /* Restore non display RAM */ - if (ddi_map_regs(devi, 0, (caddr_t *)&fb_ndvram, - CG6_ADDR_COLOR + softc->_w * softc->_h, - softc->ndvramsz) == -1) { - mutex_exit(&softc->mutex); - return (DDI_FAILURE); - } - bcopy(softc->ndvram, fb_ndvram, softc->ndvramsz); - ddi_unmap_regs(devi, 0, (caddr_t *)&fb_ndvram, - CG6_ADDR_COLOR + softc->_w * softc->_h, - softc->ndvramsz); - kmem_free(softc->ndvram, softc->ndvramsz); - - /* Restore other frame buffer state */ - (void) cg6_cntxrestore(S_FBC(softc), S_TEC(softc), - softc->curctx); - cg6_setcurpos(softc); - cg6_setcurshape(softc); - cg6_update_cmap(softc, (uint_t)_ZERO_, - CG6_CMAP_ENTRIES); - cg6_int_enable(softc); /* Schedule the update */ - } - softc->cg6_suspended = 0; - mutex_exit(&softc->mutex); - return (DDI_SUCCESS); - - default: - return (DDI_FAILURE); - } - - DEBUGF(1, (CE_CONT, "cg6_attach unit=%d\n", unit)); - - pagesize = (size_t)ddi_ptob(devi, 1); - - /* Allocate softc struct */ - if (ddi_soft_state_zalloc(cg6_softc_head, unit) != 0) { - return (DDI_FAILURE); - } - - softc = getsoftc(unit); - - /* link it in */ - softc->devi = devi; - DEBUGF(1, (CE_CONT, "cg6_attach devi=0x%x unit=%d\n", devi, unit)); - ddi_set_driver_private(devi, softc); - - /* Grab properties from PROM */ - /* TODO don't really want default w, h */ - if (ddi_prop_op(DDI_DEV_T_ANY, devi, PROP_LEN_AND_VAL_ALLOC, - DDI_PROP_DONTPASS, "emulation", (caddr_t)&tmp, &proplen) == - DDI_PROP_SUCCESS) { - if (strcmp(tmp, "cgthree+") == 0) - softc->emulation = FBTYPE_SUN3COLOR; - else if (strcmp(tmp, "cgfour+") == 0) - softc->emulation = FBTYPE_SUN4COLOR; - else if (strcmp(tmp, "bwtwo+") == 0) - softc->emulation = FBTYPE_SUN2BW; - else - softc->emulation = FBTYPE_SUNFAST_COLOR; - kmem_free(tmp, proplen); - } else - softc->emulation = FBTYPE_SUNFAST_COLOR; - - softc->_w = w = getprop(devi, "width", 1152); - softc->_h = h = getprop(devi, "height", 900); - bytes = getprop(devi, "linebytes", mpr_linebytes(w, 8)); - - softc->_linebytes = bytes; - - /* Compute size of color frame buffer */ - bytes = btob(bytes * h); - softc->size = (size_t)ddi_ptob(devi, ddi_btopr(devi, bytes)); - - softc->cg6info.vmsize = getprop(devi, "vmsize", 1); - if (softc->cg6info.vmsize > 1) { - softc->size = (size_t)ddi_ptob(devi, - ddi_btopr(devi, 8 * 1024 * 1024)); - softc->fbmappable = 8 * 1024 * 1024; - } else - softc->fbmappable = 1024 * 1024; - - /* Compute size of dummy overlay/enable planes */ - softc->dummysize = btob(mpr_linebytes(w, 1) * h) * 2; - - /* - * only use address property if we are console fb NOTE: if the prom has - * already mapped the fb *and* it has mapped all of fbmappable, then we - * don't need a new mapping - */ - if (reg = (caddr_t)(uintptr_t)getprop(devi, "address", 0)) { - softc->_fb = (MPR_T *) reg; - softc->mapped_by_prom = 1; - if (ddi_ptob(devi, ddi_btopr(devi, w * h)) <= - getprop(devi, "fbmapped", w * h)) - bytes = 0; - DEBUGF(2, (CE_CONT, "cg6 mapped by PROM\n")); - } - - softc->cg6info.line_bytes = softc->_linebytes; - softc->cg6info.accessible_width = getprop(devi, "awidth", 1152); - softc->cg6info.accessible_height = (uint_t) - (softc->cg6info.vmsize * 1024 * 1024) / - softc->cg6info.accessible_width; - softc->cg6info.hdb_capable = getprop(devi, "dblbuf", 0); - softc->cg6info.boardrev = getprop(devi, "boardrev", 0); - softc->vrtpage = NULL; - softc->vrtmaps = 0; - softc->vrtflag = 0; - -#ifdef DEBUG - softc->cg6info.pad1 = CG6_VADDR_COLOR + CG6_FB_SZ; -#endif - - /* - * get monitor attributes - */ - softc->moninfo.mon_type = getprop(devi, "montype", 0); - softc->moninfo.pixfreq = getprop(devi, "pixfreq", 929405); - softc->moninfo.hfreq = getprop(devi, "hfreq", 61795); - softc->moninfo.vfreq = getprop(devi, "vfreq", 66); - softc->moninfo.hfporch = getprop(devi, "hfporch", 32); - softc->moninfo.vfporch = getprop(devi, "vfporch", 2); - softc->moninfo.hbporch = getprop(devi, "hbporch", 192); - softc->moninfo.vbporch = getprop(devi, "vbporch", 31); - softc->moninfo.hsync = getprop(devi, "hsync", 128); - softc->moninfo.vsync = getprop(devi, "vsync", 4); - - /* - * map in the registers. Map fbc&tec together. Likewise for fhc&thc. - */ - softc->addr_rom = CG6_ADDR_ROM_SBUS; - - if (ddi_map_regs(devi, 0, &softc->fbctec, CG6_ADDR_FBC, - (off_t)CG6_FBCTEC_SZ) != 0) { - (void) cg6_detach(devi, DDI_DETACH); - return (DDI_FAILURE); - } - if (ddi_map_regs(devi, 0, &softc->cmap, CG6_ADDR_CMAP, - (off_t)CG6_CMAP_SZ) != 0) { - (void) cg6_detach(devi, DDI_DETACH); - return (DDI_FAILURE); - } - if (ddi_map_regs(devi, 0, &softc->fhcthc, CG6_ADDR_FHC, - (off_t)CG6_FHCTHC_SZ) != 0) { - (void) cg6_detach(devi, DDI_DETACH); - return (DDI_FAILURE); - } - - softc->chiprev = - *S_FHC(softc) >> FHC_CONFIG_REV_SHIFT & FHC_CONFIG_REV_MASK; - - cg6_reset(softc); - - if (ddi_get_iblock_cookie(devi, 0, &softc->iblock_cookie) - != DDI_SUCCESS) { - DEBUGF(2, (CE_CONT, - "cg6_attach%d ddi_get_iblock_cookie failed\n", unit)); - (void) cg6_detach(devi, DDI_DETACH); - return (DDI_FAILURE); - } - - mutex_init(&softc->interlock, NULL, MUTEX_DRIVER, softc->iblock_cookie); - mutex_init(&softc->mutex, NULL, MUTEX_DRIVER, softc->iblock_cookie); - cv_init(&softc->vrtsleep, NULL, CV_DRIVER, NULL); - - if (ddi_add_intr(devi, 0, &softc->iblock_cookie, 0, - cg6_intr, (caddr_t)softc) != DDI_SUCCESS) { - DEBUGF(2, (CE_CONT, - "cg6_attach%d add_intr failed\n", unit)); - (void) cg6_detach(devi, DDI_DETACH); - return (DDI_FAILURE); - } - - /* - * Initialize hardware colormap and software colormap images. It might - * make sense to read the hardware colormap here. - */ - cg6_reset_cmap(softc->cmap_rgb, CG6_CMAP_ENTRIES); - cg6_reset_cmap(softc->omap_rgb, 2); - cg6_update_cmap(softc, (uint_t)_ZERO_, CG6_CMAP_ENTRIES); - cg6_update_cmap(softc, (uint_t)_ZERO_, (uint_t)_ZERO_); - - DEBUGF(2, (CE_CONT, - "cg6_attach%d just before create_minor node\n", unit)); - (void) sprintf(name, "cgsix%d", unit); - if (ddi_create_minor_node(devi, name, S_IFCHR, - unit, DDI_NT_DISPLAY, NULL) == DDI_FAILURE) { - ddi_remove_minor_node(devi, NULL); - DEBUGF(2, (CE_CONT, - "cg6_attach%d create_minor node failed\n", unit)); - return (DDI_FAILURE); - } - ddi_report_dev(devi); - - if (softc->chiprev == 0) - cmn_err(CE_CONT, "?Revision 0 FBC\n"); - - cmn_err(CE_CONT, - "?cgsix%d: screen %dx%d, %s buffered, %dM mappable, rev %d\n", - unit, w, h, softc->cg6info.hdb_capable ? "double" : "single", - softc->cg6info.vmsize, softc->chiprev); - - softc->pvt_ctx = NULL; - - /* - * Initialize power management bookkeeping; components are created idle - */ - if (pm_create_components(devi, 2) == DDI_SUCCESS) { - (void) pm_busy_component(devi, 0); - pm_set_normal_power(devi, 0, 1); - pm_set_normal_power(devi, 1, 1); - - (void) sprintf(name, "cgsixc%d", unit); - softc->intrstats = kstat_create("cgsix", unit, name, - "controller", KSTAT_TYPE_INTR, - 1, KSTAT_FLAG_PERSISTENT); - if (softc->intrstats) { - kstat_install(softc->intrstats); - } - - return (DDI_SUCCESS); - } else { - return (DDI_FAILURE); - } -} - -static int -cg6_detach(dev_info_t *devi, ddi_detach_cmd_t cmd) -{ - int instance = ddi_get_instance(devi); - register struct cg6_softc *softc = getsoftc(instance); - caddr_t fb_ndvram; - - DEBUGF(1, (CE_CONT, "cg6_detach softc=%x, devi=0x%x\n", softc, devi)); - - switch (cmd) { - case DDI_DETACH: - break; - - case DDI_SUSPEND: - if (softc == NULL) - return (DDI_FAILURE); - if (softc->cg6_suspended) - return (DDI_FAILURE); - - mutex_enter(&softc->mutex); - - if (softc->curctx) { - struct fbc *fbc0 = S_FBC(softc); - - /* Save the video state */ - softc->vidon = cg6_get_video(softc); - - /* Save non display RAM */ - softc->ndvramsz = (softc->cg6info.vmsize * 1024 * 1024) - - (softc->_w * softc->_h); - if ((softc->ndvram = kmem_alloc(softc->ndvramsz, - KM_NOSLEEP)) == NULL) { - mutex_exit(&softc->mutex); - return (DDI_FAILURE); - } - - /* - * If FBC is busy, wait for maximum of 2 seconds for it - * to be idle - */ - CG6DELAY(!(fbc0->l_fbc_status & L_FBC_BUSY), - 4*CG6_FBC_WAIT); - - if (fbc0->l_fbc_status & L_FBC_BUSY) { - - /* - * if still busy, try another 2 seconds before - * giving up - */ - CG6DELAY(!(fbc0->l_fbc_status & L_FBC_BUSY), - 4*CG6_FBC_WAIT); - if (fbc0->l_fbc_status & L_FBC_BUSY) - cmn_err(CE_WARN, "cg6_detach: FBC still busy"); - } - - if (ddi_map_regs(devi, 0, &fb_ndvram, CG6_ADDR_COLOR + - softc->_w * softc->_h, softc->ndvramsz) == -1) { - kmem_free(softc->ndvram, softc->ndvramsz); - mutex_exit(&softc->mutex); - return (DDI_FAILURE); - } - bcopy(fb_ndvram, softc->ndvram, softc->ndvramsz); - ddi_unmap_regs(devi, 0, &fb_ndvram, CG6_ADDR_COLOR + - softc->_w * softc->_h, softc->ndvramsz); - - /* Save other frame buffer state */ - (void) cg6_cntxsave(S_FBC(softc), S_TEC(softc), - softc->curctx); - } - softc->cg6_suspended = 1; - mutex_exit(&softc->mutex); - return (DDI_SUCCESS); - - default: - return (DDI_FAILURE); - } - - /* shut off video if not console */ - - if (!softc->mapped_by_prom) - cg6_set_video(softc, 0); - - mutex_enter(&softc->mutex); - cg6_int_disable(softc); - mutex_exit(&softc->mutex); - - ddi_remove_intr(devi, 0, softc->iblock_cookie); - - if (softc->fbctec) - ddi_unmap_regs(devi, 0, - &softc->fbctec, CG6_ADDR_FBC, CG6_FBCTEC_SZ); - if (softc->cmap) - ddi_unmap_regs(devi, 0, &softc->cmap, CG6_ADDR_CMAP, - CG6_CMAP_SZ); - if (softc->fhcthc) - ddi_unmap_regs(devi, 0, - &softc->fhcthc, CG6_ADDR_FHC, CG6_FHCTHC_SZ); - if (softc->intrstats) { - kstat_delete(softc->intrstats); - } - softc->intrstats = NULL; - - if (softc->vrtpage != NULL) - ddi_umem_free(softc->vrtcookie); - - mutex_destroy(&softc->mutex); - - cv_destroy(&softc->vrtsleep); - - ASSERT(softc->curctx == NULL); - - /* free softc struct */ - (void) ddi_soft_state_free(cg6_softc_head, instance); - pm_destroy_components(devi); - - return (DDI_SUCCESS); -} - -static int -cg6_power(dev_info_t *dip, int cmpt, int level) -{ - struct cg6_softc *softc; - - /* - * Framebuffer is represented by cmpt 0. In cg6, no power - * management is done on the framebuffer itself. Only the - * monitor (cmpt 1) is being power managed. - */ - if (cmpt == 0) - return (DDI_SUCCESS); - - if (cmpt != 1 || 0 > level || level > 1 || - (softc = ddi_get_driver_private(dip)) == NULL) - return (DDI_FAILURE); - - if (level) { - /* Turn on sync and video. */ - mutex_enter(&softc->mutex); - S_THC(softc)->l_thc_hcmisc |= THC_HCMISC_RESET; - drv_usecwait(500); - S_THC(softc)->l_thc_hcmisc |= - (THC_HCMISC_SYNCEN | THC_HCMISC_VIDEO); - S_THC(softc)->l_thc_hcmisc &= ~THC_HCMISC_RESET; - cg6_update_cmap(softc, (uint_t)_ZERO_, CG6_CMAP_ENTRIES); - cg6_int_enable(softc); - mutex_exit(&softc->mutex); - } else { - /* Turn off sync and video. */ - mutex_enter(&softc->mutex); - S_THC(softc)->l_thc_hcmisc |= THC_HCMISC_RESET; - drv_usecwait(500); - S_THC(softc)->l_thc_hcmisc &= - ~(THC_HCMISC_VIDEO | THC_HCMISC_SYNCEN); - S_THC(softc)->l_thc_hcmisc &= ~THC_HCMISC_RESET; - mutex_exit(&softc->mutex); - } - return (DDI_SUCCESS); -} - -/* ARGSUSED */ -static int -cg6_info(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg, void **result) -{ - int error = DDI_SUCCESS; - minor_t instance; - struct cg6_softc *softc; - - instance = getminor((dev_t)arg); - - switch (infocmd) { - case DDI_INFO_DEVT2DEVINFO: - if ((softc = getsoftc(instance)) == NULL) { - error = DDI_FAILURE; - } else { - *result = (void *) softc->devi; - error = DDI_SUCCESS; - } - break; - case DDI_INFO_DEVT2INSTANCE: - *result = (void *) (uintptr_t)instance; - error = DDI_SUCCESS; - break; - default: - error = DDI_FAILURE; - } - return (error); -} - -/*ARGSUSED*/ -static int -cg6_open(dev_t *devp, int flag, int otyp, cred_t *cred) -{ - int unit = getminor(*devp); - struct cg6_softc *softc = getsoftc(unit); - int error = 0; - - DEBUGF(2, (CE_CONT, "cg6_open(%d), mem used=%d\n", unit, total_memory)); - - /* - * is this gorp necessary? - */ - if (otyp != OTYP_CHR) { - error = EINVAL; - } else - if (softc == NULL) { - error = ENXIO; - } - - return (error); -} - -/*ARGSUSED*/ -static -int -cg6_close(dev_t dev, int flag, int otyp, cred_t *cred) -{ - int unit = getminor(dev); - struct cg6_softc *softc = getsoftc(unit); - int error = 0; - - DEBUGF(2, (CE_CONT, "cg6_close(%d, %d, %d), mem used=%d\n", - unit, flag, otyp, total_memory)); - - if (otyp != OTYP_CHR) { - error = EINVAL; - } else if (softc == NULL) { - error = ENXIO; - } else { - mutex_enter(&softc->mutex); - cg6_reset_cmap(softc->cmap_rgb, CG6_CMAP_ENTRIES); - cg6_restore_prom_cmap(softc, softc->cmap_rgb, CG6_CMAP_ENTRIES); - softc->cur.enable = 0; - softc->curctx = NULL; - cg6_reset(softc); - mutex_exit(&softc->mutex); - } - - return (error); -} - -/*ARGSUSED*/ -static int -cg6_mmap(dev_t dev, off_t off, int prot) -{ - struct cg6_softc *softc = getsoftc(getminor(dev)); - ssize_t diff; - caddr_t page; - intptr_t rval = 0; - - DEBUGF(off ? 5 : 1, (CE_CONT, "cg6_mmap(%d, 0x%x)\n", - getminor(dev), (uint_t)off)); - - if ((diff = off - CG6_VADDR_COLOR) >= 0 && diff < softc->fbmappable) - rval = softc->fbpfnum + diff / pagesize; - else if ((diff = off - CG6_VADDR_FBC) >= 0 && diff < CG6_FBCTEC_SZ) - page = softc->fbctec + diff; - else if ((diff = off - CG6_VADDR_CMAP) >= 0 && diff < CG6_CMAP_SZ) - page = softc->cmap + diff; - else if ((diff = off - CG6_VADDR_FHC) >= 0 && diff < CG6_FHCTHC_SZ) - page = softc->fhcthc + diff; - else if ((diff = off - CG6_VADDR_ROM) >= 0 && diff < CG6_ROM_SZ) - page = softc->rom + diff; - else if ((diff = off - CG6_VADDR_DHC) >= 0 && diff < CG6_DHC_SZ) - page = softc->dhc + diff; - else if ((diff = off - CG6_VADDR_ALT) >= 0 && diff < CG6_ALT_SZ) - page = softc->alt + diff; - else if ((diff = off - CG6_VADDR_VRT) >= 0 && diff < CG6_VRT_SZ) - page = softc->vrtpage ? - (caddr_t)softc->vrtpage + diff : (caddr_t)-1; - else if ((diff = off - CG3_MMAP_OFFSET) >= 0 && - diff < softc->fbmappable) - rval = softc->fbpfnum + diff / pagesize; - else if (off < CG6_VBASE) { - - /* - * getting more and more complicated; what we return depends on what - * we're emulating - */ - - if (softc->emulation == FBTYPE_SUN3COLOR) { - if (off >= 0 && off < softc->fbmappable) - rval = softc->fbpfnum + diff / pagesize; - else - page = (caddr_t)-1; - } else { /* softc->emulation == FBTYPE_SUN4COLOR */ - if (off >= 0 && off < softc->dummysize) - page = softc->rom; - else if ((diff = off - softc->dummysize) < softc->fbmappable) - rval = softc->fbpfnum + diff / pagesize; - } - /* TODO: bw2? */ - } else - page = (caddr_t)-1; - - if (rval == 0) - if (page != (caddr_t)-1) - rval = hat_getkpfnum(page); - else - rval = -1; - - DEBUGF(5, (CE_CONT, "cg6_mmap returning 0x%x\n", rval)); - - return ((int)rval); /* XXX64 */ -} - -/*ARGSUSED*/ -static int -cg6_ioctl(dev_t dev, int cmd, intptr_t data, int mode, cred_t *cred, int *rval) -{ - struct cg6_softc *softc = getsoftc(getminor(dev)); - int cursor_cmap; - int i; - - uchar_t *iobuf_cmap_red; - uchar_t *iobuf_cmap_green; - uchar_t *iobuf_cmap_blue; - uchar_t *stack_cmap; - - STRUCT_DECL(fbcmap, fbcmap); - STRUCT_DECL(fbcursor, fbcursor); - - uint_t index; - uint_t count; - uchar_t *map; - uint_t entries; - - DEBUGF(3, (CE_CONT, "cg6_ioctl(%d, 0x%x)\n", getminor(dev), cmd)); - - /* default to updating normal colormap */ - cursor_cmap = 0; - - - switch (cmd) { - - case VIS_GETIDENTIFIER: - - if (ddi_copyout((caddr_t)&cg6_ident, - (caddr_t)data, - sizeof (struct vis_identifier), - mode)) - return (EFAULT); - break; - - case FBIOPUTCMAP: - case FBIOGETCMAP: - - - cmap_ioctl: - - if (cursor_cmap == 0) { - STRUCT_INIT(fbcmap, mode); - if (ddi_copyin((caddr_t)data, - STRUCT_BUF(fbcmap), STRUCT_SIZE(fbcmap), mode)) - return (EFAULT); - } - index = STRUCT_FGET(fbcmap, index); - count = STRUCT_FGET(fbcmap, count); - - if (count == 0) { - return (0); - } - if (cursor_cmap == 0) { - switch (PIX_ATTRGROUP(index)) { - - case 0: - case PIXPG_8BIT_COLOR: - map = softc->cmap_rgb; - entries = CG6_CMAP_ENTRIES; - break; - default: - return (EINVAL); - } - } else { - map = softc->omap_rgb; - entries = 2; - } - - if ((index &= PIX_ALL_PLANES) >= entries || - index + count > entries) { - return (EINVAL); - } - /* - * Allocate memory for color map RGB entries. - */ - stack_cmap = kmem_alloc((CG6_CMAP_ENTRIES * 3), KM_SLEEP); - - iobuf_cmap_red = stack_cmap; - iobuf_cmap_green = stack_cmap + CG6_CMAP_ENTRIES; - iobuf_cmap_blue = stack_cmap + (CG6_CMAP_ENTRIES * 2); - - if (cmd == FBIOPUTCMAP) { - int error; - - DEBUGF(3, (CE_CONT, "FBIOPUTCMAP\n")); - - if (error = ddi_copyin( - STRUCT_FGETP(fbcmap, red), - iobuf_cmap_red, count, mode)) { - kmem_free(stack_cmap, (CG6_CMAP_ENTRIES * 3)); - return (error); - } - - if (error = ddi_copyin( - STRUCT_FGETP(fbcmap, green), - iobuf_cmap_green, count, mode)) { - kmem_free(stack_cmap, (CG6_CMAP_ENTRIES * 3)); - return (error); - } - if (error = ddi_copyin( - STRUCT_FGETP(fbcmap, blue), - iobuf_cmap_blue, count, mode)) { - kmem_free(stack_cmap, (CG6_CMAP_ENTRIES * 3)); - return (error); - } - - mutex_enter(&softc->mutex); - map += index * 3; - if (cg6_update_pending(softc)) - cg6_int_disable(softc); - - /* - * Copy color map entries from stack to the color map - * table in the softc area. - */ - - cg6_cmap_bcopy(iobuf_cmap_red, map++, count); - cg6_cmap_bcopy(iobuf_cmap_green, map++, count); - cg6_cmap_bcopy(iobuf_cmap_blue, map, count); - - /* cursor colormap update */ - if (entries < CG6_CMAP_ENTRIES) - count = 0; - cg6_update_cmap(softc, index, count); - cg6_int_enable(softc); - mutex_exit(&softc->mutex); - - } else { - /* FBIOGETCMAP */ - DEBUGF(3, (CE_CONT, "FBIOGETCMAP\n")); - - mutex_enter(&softc->mutex); - map += index * 3; - - /* - * Copy color map entries from soft area to - * local storage and prepare for a copyout - */ - - cg6_cmap_bcopy(iobuf_cmap_red, map++, -count); - cg6_cmap_bcopy(iobuf_cmap_green, map++, -count); - cg6_cmap_bcopy(iobuf_cmap_blue, map, -count); - - mutex_exit(&softc->mutex); - - if (ddi_copyout(iobuf_cmap_red, - STRUCT_FGETP(fbcmap, red), count, - mode)) { - kmem_free(stack_cmap, (CG6_CMAP_ENTRIES * 3)); - return (EFAULT); - } - if (ddi_copyout(iobuf_cmap_green, - STRUCT_FGETP(fbcmap, green), count, - mode)) { - kmem_free(stack_cmap, (CG6_CMAP_ENTRIES * 3)); - return (EFAULT); - } - if (ddi_copyout(iobuf_cmap_blue, - STRUCT_FGETP(fbcmap, blue), count, - mode)) { - kmem_free(stack_cmap, (CG6_CMAP_ENTRIES * 3)); - return (EFAULT); - } - } - kmem_free(stack_cmap, (CG6_CMAP_ENTRIES * 3)); - break; - - case FBIOSATTR: { - struct fbsattr attr; - - if (ddi_copyin((caddr_t)data, - (caddr_t)&attr, - sizeof (attr), - mode)) - return (EFAULT); - DEBUGF(3, (CE_CONT, "FBIOSATTR, type=%d\n", attr.emu_type)); - if (attr.emu_type != -1) - switch (attr.emu_type) { - - case FBTYPE_SUN3COLOR: - case FBTYPE_SUN4COLOR: - case FBTYPE_SUN2BW: - case FBTYPE_SUNFAST_COLOR: - mutex_enter(&softc->mutex); - softc->emulation = attr.emu_type; - mutex_exit(&softc->mutex); - break; - default: - return (EINVAL); - } - /* ignore device-dependent stuff */ - } - break; - - case FBIOGATTR: { - struct fbgattr attr; - - DEBUGF(3, (CE_CONT, "FBIOGATTR, emu_type=%d\n", - softc->emulation)); - bcopy((caddr_t)&cg6_attr, (caddr_t)&attr, sizeof (attr)); - mutex_enter(&softc->mutex); - attr.fbtype.fb_type = softc->emulation; - attr.fbtype.fb_width = softc->_w; - attr.fbtype.fb_height = softc->_h; - /* XXX not quite like a cg4 */ - attr.fbtype.fb_size = (int)softc->size; - attr.sattr.emu_type = softc->emulation; - mutex_exit(&softc->mutex); - - if (ddi_copyout((caddr_t)&attr, - (caddr_t)data, - sizeof (struct fbgattr), - mode)) - return (EFAULT); - } - break; - - /* - * always claim to be a cg4 if they call this ioctl. This is to - * support older software which was staticly-linked before cg6 was - * invented, and to support newer software which has come to expect - * this behavior. - */ - case FBIOGTYPE: { - struct fbtype fb; - - mutex_enter(&softc->mutex); - - bcopy(&cg6_attr.fbtype, &fb, sizeof (struct fbtype)); - DEBUGF(3, (CE_CONT, "FBIOGTYPE\n")); - fb.fb_type = FBTYPE_SUN4COLOR; - fb.fb_width = softc->_w; - fb.fb_height = softc->_h; - /* XXX not quite like a cg4 */ - fb.fb_size = (int)softc->size; - - mutex_exit(&softc->mutex); - - if (ddi_copyout((caddr_t)&fb, - (caddr_t)data, - sizeof (struct fbtype), - mode)) - return (EFAULT); - } - break; - case FBIOSVIDEO: - - DEBUGF(3, (CE_CONT, "FBIOSVIDEO\n")); - if (ddi_copyin((caddr_t)data, - (caddr_t)&i, - sizeof (int), - mode)) - return (EFAULT); - mutex_enter(&softc->mutex); - cg6_set_video(softc, i & FBVIDEO_ON); - mutex_exit(&softc->mutex); - break; - - case FBIOGVIDEO: - - DEBUGF(3, (CE_CONT, "FBIOGVIDEO\n")); - mutex_enter(&softc->mutex); - i = cg6_get_video(softc) ? FBVIDEO_ON : FBVIDEO_OFF; - mutex_exit(&softc->mutex); - - if (ddi_copyout((caddr_t)&i, - (caddr_t)data, - sizeof (int), - mode)) - return (EFAULT); - break; - - /* informational ioctls */ - - case FBIOGXINFO: - if (ddi_copyout((caddr_t)&softc->cg6info, - (caddr_t)data, - sizeof (struct cg6_info), - mode)) - return (EFAULT); - return (0); - - case FBIOMONINFO: - if (ddi_copyout((caddr_t)&softc->moninfo, - (caddr_t)data, - sizeof (struct mon_info), - mode)) - return (EFAULT); - return (0); - - /* vertical retrace interrupt */ - - case FBIOVERTICAL: - - mutex_enter(&softc->mutex); - softc->vrtflag |= CG6VRTIOCTL; - cg6_int_enable(softc); - cv_wait(&softc->vrtsleep, &softc->mutex); - mutex_exit(&softc->mutex); - return (0); - - case FBIOVRTOFFSET: - - i = CG6_VADDR_VRT; - - if (ddi_copyout((caddr_t)&i, - (caddr_t)data, - sizeof (int), - mode)) - return (EFAULT); - return (0); - - /* HW cursor control */ - case FBIOSCURSOR: { - - int set; - ssize_t cbytes; - uint32_t stack_image[32], stack_mask[32]; - - STRUCT_INIT(fbcursor, mode); - if (ddi_copyin((void *)data, STRUCT_BUF(fbcursor), - STRUCT_SIZE(fbcursor), mode)) - return (EFAULT); - - set = STRUCT_FGET(fbcursor, set); - - /* Compute cursor bitmap bytes */ - cbytes = STRUCT_FGET(fbcursor, size.y) * - sizeof (softc->cur.image[0]); - if (set & FB_CUR_SETSHAPE) { - if (STRUCT_FGET(fbcursor, size.x) > 32 || - STRUCT_FGET(fbcursor, size.y) > 32) { - return (EINVAL); - } - - - /* copy cursor image into softc */ - if (STRUCT_FGETP(fbcursor, image) && - ddi_copyin(STRUCT_FGETP(fbcursor, image), - &stack_image, cbytes, mode)) - return (EFAULT); - - if (STRUCT_FGETP(fbcursor, mask) && - ddi_copyin(STRUCT_FGETP(fbcursor, mask), - &stack_mask, cbytes, mode)) - return (EFAULT); - } - - mutex_enter(&softc->mutex); - if (set & FB_CUR_SETCUR) - softc->cur.enable = STRUCT_FGET(fbcursor, enable); - - if (set & FB_CUR_SETPOS) - softc->cur.pos = STRUCT_FGET(fbcursor, pos); - - if (set & FB_CUR_SETHOT) - softc->cur.hot = STRUCT_FGET(fbcursor, hot); - - /* update hardware */ - - cg6_setcurpos(softc); - - if (set & FB_CUR_SETSHAPE) { - - if (STRUCT_FGETP(fbcursor, image)) { - bzero((caddr_t)softc->cur.image, - sizeof (softc->cur.image)); - bcopy((caddr_t)&stack_image, - (caddr_t)softc->cur.image, - cbytes); - } - if (STRUCT_FGETP(fbcursor, mask)) { - bzero((caddr_t)softc->cur.mask, - sizeof (softc->cur.mask)); - bcopy((caddr_t)&stack_mask, - (caddr_t)softc->cur.mask, - cbytes); - } - /* load into hardware */ - softc->cur.size = STRUCT_FGET(fbcursor, size); - cg6_setcurshape(softc); - } - mutex_exit(&softc->mutex); - /* load colormap */ - if (set & FB_CUR_SETCMAP) { - cursor_cmap = 1; - cmd = FBIOPUTCMAP; - STRUCT_SET_HANDLE(fbcmap, mode, - STRUCT_FADDR(fbcursor, cmap)); - goto cmap_ioctl; - } - } - break; - - case FBIOGCURSOR: { - ssize_t cbytes; - uint32_t stack_image[32], stack_mask[32]; - - STRUCT_INIT(fbcursor, mode); - if (ddi_copyin((void *)data, STRUCT_BUF(fbcursor), - STRUCT_SIZE(fbcursor), mode)) - return (EFAULT); - - mutex_enter(&softc->mutex); - - STRUCT_FSET(fbcursor, set, 0); - STRUCT_FSET(fbcursor, enable, softc->cur.enable); - STRUCT_FSET(fbcursor, pos, softc->cur.pos); - STRUCT_FSET(fbcursor, hot, softc->cur.hot); - STRUCT_FSET(fbcursor, size, softc->cur.size); - STRUCT_FSET(fbcursor, cmap.index, 0); - STRUCT_FSET(fbcursor, cmap.count, 2); - - /* compute cursor bitmap bytes */ - cbytes = softc->cur.size.y * sizeof (softc->cur.image[0]); - - bcopy(softc->cur.image, &stack_image, cbytes); - bcopy(softc->cur.mask, &stack_mask, cbytes); - - mutex_exit(&softc->mutex); - - if (ddi_copyout(STRUCT_BUF(fbcursor), (void *)data, - STRUCT_SIZE(fbcursor), mode)) - return (EFAULT); - - /* if image pointer is non-null copy both bitmaps */ - if (STRUCT_FGETP(fbcursor, image)) { - if (ddi_copyout(&stack_image, - STRUCT_FGETP(fbcursor, image), - cbytes, mode)) - return (EFAULT); - - if (ddi_copyout(&stack_mask, - STRUCT_FGETP(fbcursor, mask), - cbytes, mode)) - return (EFAULT); - } - - /* if red pointer is non-null copy colormap */ - if (STRUCT_FGETP(fbcursor, cmap.red)) { - cursor_cmap = 1; - cmd = FBIOGETCMAP; - /* - * XX64 The code used to do this: - * - * data = (int)&((struct fbcursor *)data)->cmap; - * - * However the cmap_ioctl handler doesn't look - * at 'data' so this assignment doesn't do anything. - * Instead we made it set the correct field in the - * fbcurpos structure we were passed in from - * userland. - */ - STRUCT_SET_HANDLE(fbcmap, mode, - STRUCT_FADDR(fbcursor, cmap)); - goto cmap_ioctl; - } - } - break; - - case FBIOSCURPOS: { - - struct fbcurpos stack_curpos; /* cursor position */ - - if (ddi_copyin((caddr_t)data, - (caddr_t)&stack_curpos, - sizeof (struct fbcurpos), - mode)) - return (EFAULT); - - mutex_enter(&softc->mutex); - bcopy((caddr_t)&stack_curpos, (caddr_t)&softc->cur.pos, - sizeof (struct fbcurpos)); - cg6_setcurpos(softc); - mutex_exit(&softc->mutex); - } - break; - - case FBIOGCURPOS: { - struct fbcurpos stack_curpos; /* cursor position */ - - mutex_enter(&softc->mutex); - bcopy((caddr_t)&softc->cur.pos, (caddr_t)&stack_curpos, - sizeof (struct fbcurpos)); - mutex_exit(&softc->mutex); - - if (ddi_copyout((caddr_t)&stack_curpos, - (caddr_t)data, - sizeof (struct fbcurpos), - mode)) - return (EFAULT); - } - break; - - case FBIOGCURMAX: { - static struct fbcurpos curmax = {32, 32}; - - if (ddi_copyout((caddr_t)&curmax, - (caddr_t)data, - sizeof (struct fbcurpos), - mode)) - return (EFAULT); - } - break; - -#if CG6DEBUG >= 3 - case 255: - cg6_debug = (int)data; - if (cg6_debug == -1) - cg6_debug = CG6DEBUG; - cmn_err(CE_CONT, "cg6_debug is now %d\n", cg6_debug); - break; -#endif - - default: - return (ENOTTY); - } /* switch(cmd) */ - - return (0); -} - -static uint_t -cg6_intr(caddr_t arg) -{ - struct cg6_softc *softc = (struct cg6_softc *)arg; - volatile uint32_t *in; - volatile uint32_t *out; - volatile uint32_t tmp; - - DEBUGF(7, (CE_CONT, - "cg6_intr: softc=%x, vrtflag=%x\n", softc, softc->vrtflag)); - - mutex_enter(&softc->mutex); - mutex_enter(&softc->interlock); - - if (!cg6_int_pending(softc)) { - if (softc->intr_flag) { - softc->intr_flag = 0; - } else { - if (softc->intrstats) { - KIOIP->intrs[KSTAT_INTR_SPURIOUS]++; - } - mutex_exit(&softc->interlock); - mutex_exit(&softc->mutex); - return (DDI_INTR_UNCLAIMED); /* nope, not mine */ - } - } - - if (!(cg6_update_pending(softc) || (softc)->vrtflag)) { - /* TODO catch stray interrupts? */ - cg6_int_disable_intr(softc); - if (softc->intrstats) { - KIOIP->intrs[KSTAT_INTR_HARD]++; - } - mutex_exit(&softc->interlock); - mutex_exit(&softc->mutex); - return (DDI_INTR_CLAIMED); - } - if (softc->vrtflag & CG6VRTCTR) { - if (softc->vrtmaps == 0) { - softc->vrtflag &= ~CG6VRTCTR; - } else - *softc->vrtpage += 1; - } - if (softc->vrtflag & CG6VRTIOCTL) { - softc->vrtflag &= ~CG6VRTIOCTL; - cv_broadcast(&softc->vrtsleep); - } - if (cg6_update_pending(softc)) { - volatile struct cg6_cmap *cmap = S_CMAP(softc); - LOOP_T count = softc->cmap_count; - - /* load cursor color map */ - if (softc->omap_update) { - in = &softc->omap_image.omap_int[0]; - out = (uint32_t *)& cmap->omap; - - /* background color */ - cmap->addr = 1 << 24; - tmp = in[0]; - *out = tmp; - *out = tmp <<= 8; - *out = tmp <<= 8; - - /* foreground color */ - cmap->addr = 3 << 24; - *out = tmp <<= 8; - tmp = in[1]; - *out = tmp; - *out = tmp <<= 8; - } - /* load main color map */ - if (count) { - LOOP_T index = softc->cmap_index; - - in = &softc->cmap_image.cmap_int[0]; - out = (uint32_t *)& cmap->cmap; - - /* count multiples of 4 RGB entries */ - count = (count + (index & 3) + 3) >> 2; - - /* round index to 4 entry boundary */ - index &= ~3; - - cmap->addr = index << 24; - PTR_INCR(uint32_t *, in, index * 3); - - /* copy 4 bytes (4/3 RGB entries) per loop iteration */ - count *= 3; - /* CSTYLED */ - PR_LOOPV(count, tmp = *in++; - *out = tmp; - *out = tmp <<= 8; - *out = tmp <<= 8; - /* CSTYLED */ - *out = tmp <<= 8); - - softc->cmap_count = 0; - } - softc->omap_update = 0; - } - cg6_int_disable_intr(softc); - if (softc->vrtflag) - cg6_int_enable(softc); - if (softc->intrstats) { - KIOIP->intrs[KSTAT_INTR_HARD]++; - } - mutex_exit(&softc->interlock); - mutex_exit(&softc->mutex); - return (DDI_INTR_CLAIMED); -} - -/* - * Initialize a colormap: background = white, all others = black - */ -static void -cg6_reset_cmap(volatile uchar_t *cmap, uint_t entries) -{ - bzero((char *)cmap, entries * 3); - cmap[0] = 255; - cmap[1] = 255; - cmap[2] = 255; -} - -/* - * Compute color map update parameters: starting index and count. - * If count is already nonzero, adjust values as necessary. - * Zero count argument indicates cursor color map update desired. - */ -static void -cg6_update_cmap(struct cg6_softc *softc, uint_t index, uint_t count) -{ - uint_t high, low; - - if (count == 0) { - softc->omap_update = 1; - return; - } - - high = softc->cmap_count; - - if (high != 0) { - high += (low = softc->cmap_index); - - if (index < low) - softc->cmap_index = low = index; - - if (index + count > high) - high = index + count; - - softc->cmap_count = high - low; - } else { - softc->cmap_index = index; - softc->cmap_count = count; - } -} - -/* - * Copy colormap entries between red, green, or blue array and - * interspersed rgb array. - * - * count > 0 : copy count bytes from buf to rgb - * count < 0 : copy -count bytes from rgb to buf - */ -static void -cg6_cmap_bcopy(uchar_t *bufp, uchar_t *rgb, uint_t count) -{ - LOOP_T rcount = count; - - if (--rcount >= 0) - PR_LOOPVP(rcount, - /* CSTYLED */ - *rgb = *bufp++; - /* CSTYLED */ - rgb += 3); - else { - rcount = -rcount - 2; - PR_LOOPVP(rcount, - /* CSTYLED */ - *bufp++ = *rgb; - /* CSTYLED */ - rgb += 3); - } -} - -/* - * This routine restores the color map to it's post-attach time values. - */ -static void -cg6_restore_prom_cmap(struct cg6_softc *softc, - volatile uchar_t *cmap, - uint_t entries) -{ - volatile struct cg6_cmap *hwcmap = S_CMAP(softc); - volatile uint32_t *in, *out, tmp; - LOOP_T count; - - out = (uint32_t *)&hwcmap->cmap; - in = (uint32_t *)cmap; - - if (entries != 0) { - hwcmap->addr = 0; - - count = ((entries + 3) >> 2) * 3; - /* CSTYLED */ - PR_LOOPV(count, tmp = *in++; - *out = tmp; - *out = tmp <<= 8; - *out = tmp <<= 8; - /* CSTYLED */ - *out = tmp <<= 8); - } -} - -/* - * enable/disable/update HW cursor - */ -static void -cg6_setcurpos(struct cg6_softc *softc) -{ - volatile struct thc *thc = S_THC(softc); - - thc->l_thc_cursor = softc->cur.enable ? - (((softc->cur.pos.x - softc->cur.hot.x) << 16) | - ((softc->cur.pos.y - softc->cur.hot.y) & 0xffff)) : - CG6_CURSOR_OFFPOS; -} - -/* - * load HW cursor bitmaps - */ -static void -cg6_setcurshape(struct cg6_softc *softc) -{ - uint_t tmp, edge = 0; - volatile uint_t *image, *mask, *hw; - volatile struct thc *thc = S_THC(softc); - int i; - - /* compute right edge mask */ - if (softc->cur.size.x) - edge = (uint_t)~ 0 << (32 - softc->cur.size.x); - - image = softc->cur.image; - mask = softc->cur.mask; - hw = (uint_t *)&thc->l_thc_cursora00; - - for (i = 0; i < 32; i++) { - hw[i] = (tmp = mask[i] & edge); - hw[i + 32] = tmp & image[i]; - } -} - -static void -cg6_reset(struct cg6_softc *softc) -{ - volatile struct thc *thc = S_THC(softc); - - /* disable HW cursor */ - thc->l_thc_cursor = CG6_CURSOR_OFFPOS; - - /* reinitialize TEC */ - { - volatile struct tec *tec = S_TEC(softc); - - tec->l_tec_mv = 0; - tec->l_tec_clip = 0; - tec->l_tec_vdc = 0; - } - - /* reinitialize FBC config register */ - { - volatile uint_t *fhc = S_FHC(softc); - uint_t rev, conf; - - rev = *fhc >> FHC_CONFIG_REV_SHIFT & FHC_CONFIG_REV_MASK; - if (rev <= 4) { - - /* PROM knows how to deal with LSC and above */ - /* rev == 0 : FBC 0 (not available to customers) */ - /* rev == 1 : FBC 1 */ - /* rev == 2 : FBC 2 */ - /* rev == 3 : Toshiba (never built) */ - /* rev == 4 : Standard Cell (not built yet) */ - /* rev == 5 : LSC rev 2 (buggy) */ - /* rev == 6 : LSC rev 3 */ - conf = *fhc & FHC_CONFIG_RES_MASK | - FHC_CONFIG_CPU_68020; - -#if FBC_REV0 - /* FBC0: test window = 0, disable fast rops */ - if (rev == 0) - conf |= FHC_CONFIG_TEST | - FHC_CONFIG_FROP_DISABLE; - else -#endif /* FBC_REV0 */ - - /* test window = 1K x 1K */ - conf |= FHC_CONFIG_TEST | - (10 + 1) << FHC_CONFIG_TESTX_SHIFT | - (10 + 1) << FHC_CONFIG_TESTY_SHIFT; - - /* FBC[01]: disable destination cache */ - if (rev <= 1) - conf |= FHC_CONFIG_DST_DISABLE; - - *fhc = conf; - } - } - - /* reprogram DAC to enable HW cursor use */ - { - volatile struct cg6_cmap *cmap = S_CMAP(softc); - - /* command register */ - cmap->addr = 6 << 24; - - /* turn on CR1:0, overlay enable */ - cmap->ctrl = cmap->ctrl | (0x3 << 24); - } -} - - /* - * This code is no longer used, since OBP proms now do all device - * initialization. Nevertheless, it is instructive and I'm going to - * keep it in as a comment, should anyone ever want to know how to - * do minimal device initialization. Note the c++ style embedded - * comments. - * - * cg6_init(softc) - * struct cg6_softc *softc; - * { - * // Initialize DAC - * { - * register struct cg6_cmap *cmap = S_CMAP(softc); - * register char *p; - * - * static char dacval[] = { - * 4, 0xff, - * 5, 0, - * 6, 0x73, - * 7, 0, - * 0 - * }; - * - * // initialize DAC - * for (p = dacval; *p; p += 2) { - * cmap->addr = p[0] << 24; - * cmap->ctrl = p[1] << 24; - * } - * } - * - * // Initialize THC - * { - * register struct thc *thc = S_THC(softc); - * int vidon; - * - * vidon = thc_get_video(thc); - * thc->l_thc_hcmisc = THC_HCMISC_RESET | THC_HCMISC_INIT; - * thc->l_thc_hcmisc = THC_HCMISC_INIT; - * - * thc->l_thc_hchs = 0x010009; - * thc->l_thc_hchsdvs = 0x570000; - * thc->l_thc_hchd = 0x15005d; - * thc->l_thc_hcvs = 0x010005; - * thc->l_thc_hcvd = 0x2403a8; - * thc->l_thc_hcr = 0x00016b; - * - * thc->l_thc_hcmisc = THC_HCMISC_RESET | THC_HCMISC_INIT; - * thc->l_thc_hcmisc = THC_HCMISC_INIT; - * - * if (vidon) - * thc_set_video(thc, _ONE_); - * - * DEBUGF(1, (CE_CONT, "TEC rev %d\n", - * thc->l_thc_hcmisc >> THC_HCMISC_REV_SHIFT & - * THC_HCMISC_REV_MASK)); - * } - * - * // - * // Initialize FHC for 1152 X 900 screen - * // - * { - * volatile uint_t *fhc = S_FHC(softc), rev; - * - * rev = *fhc >> FHC_CONFIG_REV_SHIFT & FHC_CONFIG_REV_MASK; - * DEBUGF(1, (CE_CONT, "cg6_init: FBC rev %d\n", rev)); - * - * // - * // FBC0: disable fast rops FBC[01]: disable destination cache - * // - * *fhc = FHC_CONFIG_1152 | - * FHC_CONFIG_CPU_68020 | - * FHC_CONFIG_TEST | - * - * #if FBC_REV0 - * (rev == 0 ? FHC_CONFIG_FROP_DISABLE : 0) | - * #endif - * - * (rev <= 1 ? FHC_CONFIG_DST_DISABLE : 0); - * } - * } - */ - -/* - * from here on down, is the lego segment driver. this virtualizes the - * lego register file by associating a register save area with each - * mapping of the lego device (each lego segment). only one of these - * mappings is valid at any time; a page fault on one of the invalid - * mappings saves off the current lego context, invalidates the current - * valid mapping, restores the former register contents appropriate to - * the faulting mapping, and then validates it. - * - * this implements a graphical context switch that is transparent to the user. - * - * the TEC and FBC contain the interesting context registers. - * - */ - -/* - * Per-segment info: - * Some, but not all, segments are part of a context. - * Any segment that is a MAP_PRIVATE mapping to the TEC or FBC - * will be part of a unique context. MAP_SHARED mappings are part - * of the shared context and all such programs must arbitrate among - * themselves to keep from stepping on each other's register settings. - * Mappings to the framebuffer may or may not be part of a context, - * depending on exact hardware type. - */ - -#define CG6MAP_SHARED 0x02 /* shared context */ -#define CG6MAP_VRT 0x04 /* vrt page */ -#define CG6MAP_FBCTEC 0X08 /* mapping includes fbc and/or tec */ -#define CG6MAP_FB 0X10 /* mapping includes framebuffer */ - -#define CG6MAP_CTX (CG6MAP_FBCTEC | CG6MAP_FB) /* needs context */ - -static struct cg6map_pvt * -cg6_pvt_alloc(struct cg6_cntxt *ctx, - uint_t type, - offset_t off, - size_t len, - struct cg6_softc *softc) -{ - struct cg6map_pvt *pvt; - - /* - * create the private data portion of the devmap object - */ - pvt = kmem_zalloc(sizeof (struct cg6map_pvt), KM_SLEEP); - pvt->type = type; - pvt->offset = off; - pvt->len = len; - pvt->context = ctx; - pvt->softc = softc; - - /* - * Link this pvt into the list of associated pvt's for this - * context - */ - pvt->next = ctx->pvt; - ctx->pvt = pvt; - - return (pvt); -} - -/* - * This routine is called through the cb_ops table to handle - * the creation of lego (cg6) segments. - */ -/*ARGSUSED*/ -static int -cg6_segmap(dev_t dev, - off_t off, - struct as *as, - caddr_t *addrp, - off_t len, - uint_t prot, - uint_t maxprot, - uint_t flags, - cred_t *cred) -{ - struct cg6_softc *softc = getsoftc(getminor(dev)); - int error; - - DEBUGF(3, (CE_CONT, "segmap: off=%x, len=%x\n", off, len)); - mutex_enter(&softc->mutex); - - /* - * check to see if this is a VRT page - */ - if (off == CG6_VADDR_VRT) { - if (len != pagesize) { - mutex_exit(&softc->mutex); - DEBUGF(3, (CE_CONT, - "rejecting because off=vrt and len=%x\n", len)) - return (EINVAL); - } - if (softc->vrtmaps++ == 0) { - if (softc->vrtpage == NULL) { - softc->vrtpage = (int *)ddi_umem_alloc( - pagesize, KM_SLEEP, - (void **)&softc->vrtcookie); - } - *softc->vrtpage = 0; - softc->vrtflag |= CG6VRTCTR; - cg6_int_enable(softc); - } - } - - /* - * use the devmap framework for setting up the user mapping. - */ - error = devmap_setup(dev, (offset_t)off, as, addrp, (size_t)len, prot, - maxprot, flags, cred); - - mutex_exit(&softc->mutex); - - return (error); -} - -/* ARGSUSED */ -static int -cg6map_map(devmap_cookie_t dhp, dev_t dev, uint_t flags, offset_t off, - size_t len, void **pvtp) -{ - struct cg6_softc *softc = getsoftc(getminor(dev)); - struct cg6_cntxt *ctx = (struct cg6_cntxt *)NULL; - struct cg6_cntxt *shared_ctx = &softc->shared_ctx; - struct cg6map_pvt *pvt; - uint_t maptype = 0; - - DEBUGF(3, (CE_CONT, "cg6map_map: off = %x, len = %x\n", - (uint_t)off, (uint_t)len)); - - /* - * LSC DFB BUG KLUDGE: DFB must always be mapped private on the buggy - * (chip rev. 5) LSC chip. This is done to ensure that nobody ever - * touches the framebuffer without the segment driver getting involved - * to make sure the registers are idle. This involves taking a page - * fault, invalidating all other process's mappings to the fb, (and - * performing a context switch?) - * - * Under pixrects, which maps the chips and the FB all at once, the - * entire mapping becomes a context. This won't hurt pixrects but - * entails unnecessary context switching. Under other libraries such - * as XGL, which maps the chips private and the FB shared, the FB - * becomes part of the context. Programs which only map the FB will - * also become contexts, but since they don't map the chips, there's - * no context to switch. - */ - if (off + len > CG6_VADDR_FBC && off < CG6_VADDR_FBC + CG6_FBCTEC_SZ) - maptype |= CG6MAP_FBCTEC; - if (off + len > CG6_VADDR_COLOR && off < CG6_VADDR_COLOR + CG6_FB_SZ) - maptype |= CG6MAP_FB; - - /* - * we now support MAP_SHARED and MAP_PRIVATE: - * - * MAP_SHARED means you get the shared context which is the traditional - * mapping method. - * - * MAP_PRIVATE means you get your very own LEGO context. - * - * Note that you can't get to here without asking for one or the other, - * but not both. - */ - if (softc->chiprev == 5 && (maptype & CG6MAP_FB)) - flags = (flags & ~MAP_TYPE) | MAP_PRIVATE; - - if (flags & MAP_SHARED) { /* shared mapping */ - ctx = shared_ctx; - ctx->flag = CG6MAP_CTX; - } else { - ctx = ctx_map_insert(softc, maptype); - ctx->flag |= maptype; - DEBUGF(2, (CE_CONT, "cg6map_map: ** MAP_PRIVATE **. ctx = %x\n", - ctx)); - } - - pvt = cg6_pvt_alloc(ctx, maptype, off, len, softc); - pvt->dhp = dhp; - - *pvtp = pvt; - - devmap_set_ctx_timeout(dhp, cg6_ctxholdval); - return (DDI_SUCCESS); -} - -/* - * An access has been made to a context other than the current one - */ -/* ARGSUSED */ -static int -cg6map_access(devmap_cookie_t dhp, void *pvt, offset_t offset, size_t len, - uint_t type, uint_t rw) -{ - return (devmap_do_ctxmgt(dhp, pvt, offset, len, type, rw, - cg6map_contextmgt)); -} - -/* - * called by the devmap framework to perform context switching. - */ -/* ARGSUSED */ -static int -cg6map_contextmgt(devmap_cookie_t dhp, void *pvt, offset_t offset, - size_t len, uint_t type, uint_t rw) -{ - struct cg6map_pvt *p = (struct cg6map_pvt *)pvt; - struct cg6map_pvt *pvts; - struct cg6_softc *softc = p->softc; - volatile struct fbc *fbc; - int err = 0; - - ASSERT(pvt); - - mutex_enter(&softc->mutex); - - DEBUGF(6, (CE_CONT, "cg6map_contextmgt: pvt = %x, dhp = %x, \ -curctx = %x, context = %x\n", - p, dhp, softc->curctx, p->context)); - /* - * Do we need to switch contexts? - */ - if (softc->curctx != p->context) { - - fbc = S_FBC(softc); - - /* - * If there's a current context, save it - */ - if (softc->curctx != (struct cg6_cntxt *)NULL) { - /* - * Set segdev for current context and all associated - * handles to intercept references to their addresses - */ - ASSERT(softc->curctx->pvt); - for (pvts = softc->curctx->pvt; pvts != NULL; - pvts = pvts->next) { - err = devmap_unload(pvts->dhp, pvts->offset, - pvts->len); - if (err) { - mutex_exit(&softc->mutex); - return (err); - } - } - - if (cg6_cntxsave(fbc, S_TEC(softc), - softc->curctx) == 0) { - DEBUGF(1, (CE_CONT, - "cgsix: context save failed\n")); - /* - * At this point we have no current context. - */ - softc->curctx = NULL; - mutex_exit(&softc->mutex); - return (-1); - } - } - - /* - * Idle the chips - */ - CG6DELAY(!(fbc->l_fbc_status & L_FBC_BUSY), CG6_FBC_WAIT); - if (fbc->l_fbc_status & L_FBC_BUSY) { - DEBUGF(1, (CE_CONT, "cgsix: idle_cg6: status = %x\n", - fbc->l_fbc_status)); - /* - * At this point we have no current context. - */ - softc->curctx = NULL; - mutex_exit(&softc->mutex); - return (-1); - } - - DEBUGF(4, (CE_CONT, "loading context %x\n", p->context)); - - if (p->context->flag & CG6MAP_FBCTEC) - if (cg6_cntxrestore(fbc, S_TEC(softc), - p->context) == 0) { - DEBUGF(1, (CE_CONT, - "cgsix: context restore failed\n")); - /* - * At this point we have no current context. - */ - softc->curctx = NULL; - mutex_exit(&softc->mutex); - return (-1); - } - - /* - * switch software "context" - */ - softc->curctx = p->context; - } - - ASSERT(p->context->pvt); - if ((type == DEVMAP_LOCK) || (type == DEVMAP_UNLOCK)) { - if ((err = devmap_load(p->dhp, offset, len, type, rw)) != 0) { - mutex_exit(&softc->mutex); - return (err); - } - } else { - if ((err = devmap_load(p->dhp, p->offset, p->len, type, - rw)) != 0) { - mutex_exit(&softc->mutex); - return (err); - } - } - - mutex_exit(&softc->mutex); - - return (err); -} - -/* ARGSUSED */ -static void -cg6map_unmap(devmap_cookie_t dhp, void *pvtp, offset_t off, size_t len, - devmap_cookie_t new_dhp1, void **pvtp1, - devmap_cookie_t new_dhp2, void **pvtp2) -{ - struct cg6map_pvt *p = (struct cg6map_pvt *)pvtp; - struct cg6_softc *softc = p->softc; - struct cg6_cntxt *ctx = p->context; - struct cg6map_pvt *ptmp; - struct cg6map_pvt *ppvts; - struct cg6_cntxt *shared_ctx = &softc->shared_ctx; - size_t length; - - DEBUGF(3, (CE_CONT, "cg6map_unmap: pvt = %x, dhp = %x, \ -off = %x, len = %x, dhp1 = %x, dhp2 = %x\n", - pvtp, dhp, (uint_t)off, len, new_dhp1, new_dhp2)); - - mutex_enter(&softc->mutex); - - /* - * We are unmapping at the end of the mapping, if - * new_dhp1 is not NULL. - */ - if (new_dhp1 != NULL) { - ptmp = cg6_pvt_alloc(ctx, p->type, - p->offset, - (off - p->offset), - softc); - ptmp->dhp = new_dhp1; - *pvtp1 = ptmp; - } - - /* - * We are unmapping at the beginning of the mapping, if - * new_dhp2 is not NULL. - */ - if (new_dhp2 != NULL) { - length = p->len - len - (off - p->offset); - ptmp = cg6_pvt_alloc(ctx, p->type, (off + len), length, softc); - ptmp->dhp = new_dhp2; - - *pvtp2 = ptmp; - } - - /* - * Remove the original pvt data - */ - ppvts = NULL; - for (ptmp = ctx->pvt; ptmp != NULL; ptmp = ptmp->next) { - if (ptmp == pvtp) { - if (ppvts == NULL) { - ctx->pvt = ptmp->next; - } else { - ppvts->next = ptmp->next; - } - kmem_free(pvtp, sizeof (struct cg6map_pvt)); - break; - } - ppvts = ptmp; - } - - /* - * We want to remove the conext if both new_dhp1 and new_dhp2 are NULL. - */ - if (new_dhp1 == NULL && new_dhp2 == NULL) { - /* - * Remove the context if this is not the shared context - * xand there are no more associated pvt's - */ - if ((ctx != shared_ctx) && (ctx->pvt == NULL)) { - struct cg6_cntxt *ctxptr; - - if (ctx == softc->curctx) - softc->curctx = NULL; - - /* - * Scan private context list for entry to remove. - * Check first to see if it's the head of our list. - */ - if (softc->pvt_ctx == ctx) { - softc->pvt_ctx = ctx->link; - kmem_free(ctx, sizeof (struct cg6_cntxt)); - } else { - for (ctxptr = softc->pvt_ctx; ctxptr != NULL; - ctxptr = ctxptr->link) { - if (ctxptr->link == ctx) { - ctxptr->link = ctx->link; - kmem_free(ctx, - sizeof (struct cg6_cntxt)); - } - } - } - } - - /* - * If the curctx is the shared context, and there are no - * more pvt's for the shared context, set the curctx to - * NULL to force a context switch on the next device access. - */ - if ((softc->curctx == shared_ctx) && (softc->curctx->pvt == - NULL)) { - softc->curctx = NULL; - } - } - - mutex_exit(&softc->mutex); -} - -/* ARGSUSED */ -static int -cg6map_dup(devmap_cookie_t dhp, void *oldpvt, devmap_cookie_t new_dhp, - void **newpvt) -{ - struct cg6map_pvt *p = (struct cg6map_pvt *)oldpvt; - struct cg6_softc *softc = p->softc; - struct cg6map_pvt *pvt; - struct cg6_cntxt *ctx; - uint_t maptype; - - DEBUGF(3, (CE_CONT, "cg6map_dup: pvt=%x, dhp=%x, newdhp=%x\n", - oldpvt, dhp, new_dhp)); - - mutex_enter(&softc->mutex); - if (p->context != &softc->shared_ctx) { - maptype = p->type; - ctx = ctx_map_insert(softc, maptype); - } else - ctx = &softc->shared_ctx; - - pvt = cg6_pvt_alloc(ctx, p->type, p->offset, p->len, softc); - - pvt->dhp = new_dhp; - *newpvt = pvt; - - if (p->context && (p->context->flag & CG6MAP_VRT)) { - softc->vrtflag |= CG6VRTCTR; - if (softc->vrtmaps == 0) - cg6_int_enable(softc); - softc->vrtmaps++; - } - - mutex_exit(&softc->mutex); - return (0); -} - -/* - * please don't mess with these defines... they may look like - * a strange place for defines, but the context management code - * wants them as they are. JMP - * - */ -#undef L_TEC_VDC_INTRNL0 -#define L_TEC_VDC_INTRNL0 0x8000 -#undef L_TEC_VDC_INTRNL1 -#define L_TEC_VDC_INTRNL1 0xa000 - -static int -cg6_cntxsave(fbc, tec, saved) - volatile struct fbc *fbc; - volatile struct tec *tec; - struct cg6_cntxt *saved; -{ - int dreg; /* counts through the data registers */ - uint_t *dp; /* points to a tec data register */ - - DEBUGF(5, (CE_CONT, "saving registers for %d\n", saved->pid)); - - CDELAY(!(fbc->l_fbc_status & L_FBC_BUSY), CG6_FBC_WAIT); - if (fbc->l_fbc_status & L_FBC_BUSY) { - DEBUGF(1, (CE_CONT, "cgsix: idle_cg6: status = %x\n", - fbc->l_fbc_status)); - return (0); - } - - /* - * start dumping stuff out. - */ - saved->fbc.status = fbc->l_fbc_status; - saved->fbc.clipcheck = fbc->l_fbc_clipcheck; - saved->fbc.misc = fbc->l_fbc_misc; - saved->fbc.x0 = fbc->l_fbc_x0; - saved->fbc.y0 = fbc->l_fbc_y0; - saved->fbc.x1 = fbc->l_fbc_x1; - saved->fbc.y1 = fbc->l_fbc_y1; - saved->fbc.x2 = fbc->l_fbc_x2; - saved->fbc.y2 = fbc->l_fbc_y2; - saved->fbc.x3 = fbc->l_fbc_x3; - saved->fbc.y3 = fbc->l_fbc_y3; - saved->fbc.rasteroffx = fbc->l_fbc_rasteroffx; - saved->fbc.rasteroffy = fbc->l_fbc_rasteroffy; - saved->fbc.autoincx = fbc->l_fbc_autoincx; - saved->fbc.autoincy = fbc->l_fbc_autoincy; - saved->fbc.clipminx = fbc->l_fbc_clipminx; - saved->fbc.clipminy = fbc->l_fbc_clipminy; - saved->fbc.clipmaxx = fbc->l_fbc_clipmaxx; - saved->fbc.clipmaxy = fbc->l_fbc_clipmaxy; - saved->fbc.fcolor = fbc->l_fbc_fcolor; - saved->fbc.bcolor = fbc->l_fbc_bcolor; - saved->fbc.rasterop = fbc->l_fbc_rasterop; - saved->fbc.planemask = fbc->l_fbc_planemask; - saved->fbc.pixelmask = fbc->l_fbc_pixelmask; - saved->fbc.pattalign = fbc->l_fbc_pattalign; - saved->fbc.pattern0 = fbc->l_fbc_pattern0; - saved->fbc.pattern1 = fbc->l_fbc_pattern1; - saved->fbc.pattern2 = fbc->l_fbc_pattern2; - saved->fbc.pattern3 = fbc->l_fbc_pattern3; - saved->fbc.pattern4 = fbc->l_fbc_pattern4; - saved->fbc.pattern5 = fbc->l_fbc_pattern5; - saved->fbc.pattern6 = fbc->l_fbc_pattern6; - saved->fbc.pattern7 = fbc->l_fbc_pattern7; - - /* - * the tec matrix and clipping registers are easy. - */ - saved->tec.mv = tec->l_tec_mv; - saved->tec.clip = tec->l_tec_clip; - saved->tec.vdc = tec->l_tec_vdc; - - /* - * the tec data registers are a little more non-obvious. - * internally, they are 36 bits. what we see in the register - * file is a 32-bit window onto the underlying data register. - * changing the data-type in the VDC gets us either of two parts - * of the data register. the internal format is opaque to us. - */ - tec->l_tec_vdc = (uint_t)L_TEC_VDC_INTRNL0; - for (dreg = 0, dp = (uint_t *)&tec->l_tec_data00; dreg < 64; - dreg++, dp++) { - saved->tec.data[dreg][0] = *dp; - } - tec->l_tec_vdc = (uint_t)L_TEC_VDC_INTRNL1; - for (dreg = 0, dp = (uint_t *)&tec->l_tec_data00; dreg < 64; - dreg++, dp++) { - saved->tec.data[dreg][1] = *dp; - } - - return (1); -} - -static int -cg6_cntxrestore(fbc, tec, saved) - volatile struct fbc *fbc; - volatile struct tec *tec; - struct cg6_cntxt *saved; -{ - int dreg; - uint_t *dp; - - DEBUGF(5, (CE_CONT, "restoring registers for %d\n", saved->pid)); - - /* - * reload the tec data registers. see above for "how do they get - * 36 bits in that itty-bitty int" - */ - tec->l_tec_vdc = (uint_t)L_TEC_VDC_INTRNL0; - for (dreg = 0, dp = (uint_t *)&tec->l_tec_data00; - dreg < 64; dreg++, dp++) { - *dp = saved->tec.data[dreg][0]; - } - tec->l_tec_vdc = (uint_t)L_TEC_VDC_INTRNL1; - for (dreg = 0, dp = (uint_t *)&tec->l_tec_data00; - dreg < 64; dreg++, dp++) { - *dp = saved->tec.data[dreg][1]; - } - - /* - * the tec matrix and clipping registers are next. - */ - tec->l_tec_mv = saved->tec.mv; - tec->l_tec_clip = saved->tec.clip; - tec->l_tec_vdc = saved->tec.vdc; - - /* - * now the FBC vertex and address registers - */ - fbc->l_fbc_x0 = saved->fbc.x0; - fbc->l_fbc_y0 = saved->fbc.y0; - fbc->l_fbc_x1 = saved->fbc.x1; - fbc->l_fbc_y1 = saved->fbc.y1; - fbc->l_fbc_x2 = saved->fbc.x2; - fbc->l_fbc_y2 = saved->fbc.y2; - fbc->l_fbc_x3 = saved->fbc.x3; - fbc->l_fbc_y3 = saved->fbc.y3; - fbc->l_fbc_rasteroffx = saved->fbc.rasteroffx; - fbc->l_fbc_rasteroffy = saved->fbc.rasteroffy; - fbc->l_fbc_autoincx = saved->fbc.autoincx; - fbc->l_fbc_autoincy = saved->fbc.autoincy; - fbc->l_fbc_clipminx = saved->fbc.clipminx; - fbc->l_fbc_clipminy = saved->fbc.clipminy; - fbc->l_fbc_clipmaxx = saved->fbc.clipmaxx; - fbc->l_fbc_clipmaxy = saved->fbc.clipmaxy; - - /* - * restoring the attribute registers - */ - fbc->l_fbc_fcolor = saved->fbc.fcolor; - fbc->l_fbc_bcolor = saved->fbc.bcolor; - fbc->l_fbc_rasterop = saved->fbc.rasterop; - fbc->l_fbc_planemask = saved->fbc.planemask; - fbc->l_fbc_pixelmask = saved->fbc.pixelmask; - fbc->l_fbc_pattalign = saved->fbc.pattalign; - fbc->l_fbc_pattern0 = saved->fbc.pattern0; - fbc->l_fbc_pattern1 = saved->fbc.pattern1; - fbc->l_fbc_pattern2 = saved->fbc.pattern2; - fbc->l_fbc_pattern3 = saved->fbc.pattern3; - fbc->l_fbc_pattern4 = saved->fbc.pattern4; - fbc->l_fbc_pattern5 = saved->fbc.pattern5; - fbc->l_fbc_pattern6 = saved->fbc.pattern6; - fbc->l_fbc_pattern7 = saved->fbc.pattern7; - - fbc->l_fbc_clipcheck = saved->fbc.clipcheck; - fbc->l_fbc_misc = saved->fbc.misc; - - /* - * lastly, let's restore the status - */ - fbc->l_fbc_status = saved->fbc.status; - - return (1); -} - -/* - * ctx_map_insert() - * - * Insert a mapping into the mapping list of a private context. First - * determine if there's an existing context (e.g. one with the same PID - * as the current one and that does not already have a mapping of this - * type yet). If not, allocate a new one. Then insert mapping into this - * context's list. - * - * The softc mutex must be held across calls to this routine. - */ -static -struct cg6_cntxt * -ctx_map_insert(struct cg6_softc *softc, int maptype) -{ - struct cg6_cntxt *ctx; - pid_t curpid = getpid(); - - DEBUGF(4, (CE_CONT, "ctx_map_insert: maptype=0x%x curpid=%d\n", - maptype, curpid)); - - /* - * If this is the first time we're here, then alloc space - * for new context and depart. - */ - if (softc->pvt_ctx == NULL) { - ctx = (struct cg6_cntxt *) - kmem_zalloc(sizeof (struct cg6_cntxt), KM_SLEEP); - ctx->pid = curpid; - ctx->link = NULL; - softc->pvt_ctx = ctx; - return (ctx); - } - - /* - * Find existing context if one exists. We have a match if - * we're the same process *and* there's not already a - * mapping of this type assigned. - */ - for (ctx = softc->pvt_ctx; ctx != NULL; ctx = ctx->link) { - if (ctx->pid == curpid && - (maptype & ctx->flag & (CG6MAP_FBCTEC|CG6MAP_FB)) == 0) - break; - } - - - /* no match, create a new one and add to softc list */ - if (ctx == NULL) { - ctx = (struct cg6_cntxt *) - kmem_zalloc(sizeof (struct cg6_cntxt), KM_SLEEP); - ctx->pid = curpid; - ctx->link = softc->pvt_ctx; - softc->pvt_ctx = ctx; - } - - DEBUGF(4, (CE_CONT, "ctx_map_insert: returning ctx=0x%x\n", ctx)); - - return (ctx); -} - -/* - * getpid() - * - * Simple wrapper around process ID call to drv_getparm(9f). - */ -static pid_t -getpid() -{ - pid_t mypid; - - if (drv_getparm(PPID, &mypid) == -1) - return (0); - return (mypid); -} - -#define DEVMEMORY 1 -#define KERNELMEMORY 2 - -/*ARGSUSED*/ -static int -cg6_devmap(dev_t dev, devmap_cookie_t dhp, offset_t off, size_t len, - size_t *maplen, uint_t model) -{ - struct cg6_softc *softc = getsoftc(getminor(dev)); - dev_info_t *dip = softc->devi; - ssize_t diff; - int err = 0; - caddr_t kvaddr = NULL; - ddi_umem_cookie_t cookie = NULL; - offset_t offset = 0; - uint_t rnumber = 0; - uint_t type = DEVMEMORY; - size_t length = len; - uint_t map_type = 0; - uint_t ctxmap = 0; - struct devmap_callback_ctl *callbackops = &cg6map_ops; - - DEBUGF(2, (CE_CONT, "cg6_devmap(%d), off=0x%x, len=%x, dhp=%x\n", - getminor(dev), (uint_t)off, len, dhp)); - - if ((diff = off - CG6_VADDR_COLOR) >= 0 && diff < softc->fbmappable) { - if ((len + off) > (CG6_VADDR_COLOR + softc->fbmappable)) - length = CG6_VADDR_COLOR + softc->fbmappable - off; - offset = CG6_ADDR_COLOR + diff; - map_type = CG6MAP_FB; - } else if ((diff = off - CG6_VADDR_FBC) >= 0 && diff < CG6_FBCTEC_SZ) { - if ((len + off) > (CG6_VADDR_FBC + CG6_FBCTEC_SZ)) - length = (CG6_VADDR_FBC + CG6_FBCTEC_SZ) - off; - offset = CG6_ADDR_FBC + diff; - map_type = CG6MAP_FBCTEC; - } else if ((diff = off - CG6_VADDR_CMAP) >= 0 && diff < CG6_CMAP_SZ) { - if ((len + off) > (CG6_VADDR_CMAP + CG6_CMAP_SZ)) - length = (CG6_VADDR_CMAP + CG6_CMAP_SZ) - off; - offset = CG6_ADDR_CMAP + diff; - } else if ((diff = off - CG6_VADDR_FHC) >= 0 && diff < CG6_FHCTHC_SZ) { - if ((len + off) > (CG6_VADDR_FHC + CG6_FHCTHC_SZ)) - length = (CG6_VADDR_FHC + CG6_FHCTHC_SZ) - off; - offset = CG6_ADDR_FHC + diff; - } else if ((diff = off - CG6_VADDR_ROM) >= 0 && diff < CG6_ROM_SZ) { - if ((len + off) > (CG6_VADDR_ROM + CG6_ROM_SZ)) - length = (CG6_VADDR_ROM + CG6_ROM_SZ) - off; - offset = softc->addr_rom + diff; - } else if ((diff = off - CG6_VADDR_DHC) >= 0 && diff < CG6_DHC_SZ) { - if ((len + off) > (CG6_VADDR_DHC + CG6_DHC_SZ)) - length = (CG6_VADDR_DHC + CG6_DHC_SZ) - off; - offset = CG6_ADDR_DHC + diff; - } else if ((diff = off - CG6_VADDR_ALT) >= 0 && diff < CG6_ALT_SZ) { - if ((len + off) > (CG6_VADDR_ALT + CG6_ALT_SZ)) - length = (CG6_VADDR_ALT + CG6_ALT_SZ) - off; - offset = CG6_ADDR_ALT + diff; - } else if ((diff = off - CG6_VADDR_VRT) >= 0 && diff < CG6_VRT_SZ) { - if ((len + off) > (CG6_VADDR_VRT + CG6_VRT_SZ)) - length = (CG6_VADDR_VRT + CG6_VRT_SZ) - off; - type = KERNELMEMORY; - if (softc->vrtpage != NULL) - offset = diff; - else - kvaddr = (caddr_t)-1; - cookie = softc->vrtcookie; - } else if ((diff = off - CG3_MMAP_OFFSET) >= 0 && - diff < softc->fbmappable) { - if ((len + off) > (CG3_MMAP_OFFSET + softc->fbmappable)) - length = CG3_MMAP_OFFSET + softc->fbmappable - off; - offset = CG6_ADDR_COLOR + diff; - } else if (off < CG6_VBASE) { - if (softc->emulation == FBTYPE_SUN3COLOR) { - if (off >= 0 && off < softc->fbmappable) { - if ((len + off) > softc->fbmappable) - length = softc->fbmappable - off; - offset = CG6_ADDR_COLOR + diff; - } else - kvaddr = (caddr_t)-1; - } else { /* softc->emulation == FBTYPE_SUN4COLOR */ - if (off >= 0 && off < softc->dummysize) { - if ((len + off) > softc->dummysize) - length = softc->dummysize - off; - offset = CG6_ADDR_COLOR + diff; - } else if ((diff = off - softc->dummysize) < - softc->fbmappable) { - if ((len + off) > - (softc->dummysize + softc->fbmappable)) - length = softc->fbmappable - off; - offset = CG6_ADDR_COLOR + diff; - } - } - } else - kvaddr = (caddr_t)-1; - - if (kvaddr == (caddr_t)-1) { - DEBUGF(1, (CE_CONT, "cg6_devmap: no mapping off=0x%x, len=%x\n", - (uint_t)off, len)); - return (-1); - } - - DEBUGF(2, (CE_CONT, "cg6_devmap: offset=0x%x, kvaddr=%x, length=%x\n", - (uint_t)offset, kvaddr, length)); - - /* - * LSC DFB BUG KLUDGE: DFB must always be mapped private on the buggy - * (chip rev. 5) LSC chip. This is done to ensure that nobody ever - * touches the framebuffer without the segment driver getting involved - * to make sure the registers are idle. This involves taking a page - * fault, invalidating all other process's mappings to the fb, (and - * performing a context switch?) - * - * Under pixrects, which maps the chips and the FB all at once, the - * entire mapping becomes a context. This won't hurt pixrects but - * entails unnecessary context switching. Under other libraries such - * as XGL, which maps the chips private and the FB shared, the FB - * becomes part of the context. Programs which only map the FB will - * also become contexts, but since they don't map the chips, there's - * no context to switch. - */ - ctxmap = (softc->chiprev == 5) ? - (CG6MAP_FBCTEC|CG6MAP_FB) : CG6MAP_FBCTEC; - - /* - * do context switching on the TEC and FBC registers. - */ - if (map_type & ctxmap) - callbackops = &cg6map_ops; - else - callbackops = NULL; - - if (type == DEVMEMORY) { - if ((err = devmap_devmem_setup(dhp, dip, callbackops, rnumber, - offset, length, PROT_ALL, DEVMAP_DEFAULTS, - &endian_attr)) < 0) - return (err); - } else { - if ((err = devmap_umem_setup(dhp, dip, callbackops, cookie, - offset, length, PROT_ALL, DEVMAP_DEFAULTS, - &endian_attr)) < 0) - return (err); - } - - *maplen = roundup(length, PAGESIZE); - return (0); -} diff --git a/usr/src/uts/sun/io/cgsix.conf b/usr/src/uts/sun/io/cgsix.conf deleted file mode 100644 index 307a14d7e4..0000000000 --- a/usr/src/uts/sun/io/cgsix.conf +++ /dev/null @@ -1,29 +0,0 @@ -# -# CDDL HEADER START -# -# The contents of this file are subject to the terms of the -# Common Development and Distribution License, Version 1.0 only -# (the "License"). You may not use this file except in compliance -# with the License. -# -# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE -# or http://www.opensolaris.org/os/licensing. -# See the License for the specific language governing permissions -# and limitations under the License. -# -# When distributing Covered Code, include this CDDL HEADER in each -# file and include the License file at usr/src/OPENSOLARIS.LICENSE. -# If applicable, add the following below this CDDL HEADER, with the -# fields enclosed by brackets "[]" replaced with your own identifying -# information: Portions Copyright [yyyy] [name of copyright owner] -# -# CDDL HEADER END -# -# -# Copyright (c) 1991-1994, by Sun Microsystems, Inc. -# -#ident "%Z%%M% %I% %E% SMI" - -name="cgsix" parent="obio" - reg=0x0210,0xfb000000,0x2000 - interrupts=8; diff --git a/usr/src/uts/sun/io/mem_kern.c b/usr/src/uts/sun/io/mem_kern.c deleted file mode 100644 index b0d89dc50f..0000000000 --- a/usr/src/uts/sun/io/mem_kern.c +++ /dev/null @@ -1,90 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 1990 by Sun Microsystems, Inc. - */ - -#ident "%Z%%M% %I% %E% SMI" - -/* - * Memory pixrect (non)creation in kernel - */ - -#include -#include -#include -/* #include "/usr/include/pixrect/pixrect.h" */ - -int mem_rop(); -int mem_putcolormap(); -int mem_putattributes(); - -struct pixrectops mem_ops = { - mem_rop, - mem_putcolormap, - mem_putattributes, -#ifdef _PR_IOCTL_KERNEL_DEFINED - 0 -#endif -}; - -/*ARGSUSED*/ -int -mem_rop(dpr, dx, dy, dw, dh, op, spr, sx, sy) -Pixrect *dpr; -int dx, dy, dw, dh; -int op; -Pixrect *spr; -int sx, sy; -{ -#ifdef DEBUG - cmn_err(CE_PANIC, "mem_rop: pixrects not supported."); -#endif - return (PIX_ERR); /* fail */ -} - -/*ARGSUSED*/ -int -mem_putcolormap(pr, index, count, red, green, blue) -Pixrect *pr; -int index, count; -u_char red[], green[], blue[]; -{ -#ifdef DEBUG - cmn_err(CE_PANIC, - "mem_putcolormap: pixrects not supported."); -#endif - return (PIX_ERR); /* fail */ -} - -/*ARGSUSED*/ -int -mem_putattributes(pr, planes) -Pixrect *pr; -int *planes; -{ -#ifdef DEBUG - cmn_err(CE_PANIC, - "mem_putattributes: pixrects not supported."); -#endif - return (PIX_ERR); -} diff --git a/usr/src/uts/sun/sys/Makefile b/usr/src/uts/sun/sys/Makefile index 6b25f3c934..941abb0d76 100644 --- a/usr/src/uts/sun/sys/Makefile +++ b/usr/src/uts/sun/sys/Makefile @@ -30,16 +30,11 @@ HDRS= \ avintr.h \ bootconf.h bpp_reg.h \ bpp_var.h \ -cg3var.h \ -cg6fbc.h cg6reg.h cg6tec.h \ -cg6thc.h cg6var.h \ dkmpio.h dmaga.h \ fdreg.h fdvar.h \ -memvar.h \ -obpdefs.h pixrect.h \ -pr_impl_util.h pr_planegroups.h \ +obpdefs.h \ promif.h promimpl.h \ -ramdac.h ser_async.h ser_zscc.h \ +ser_async.h ser_zscc.h \ socalio.h socalreg.h \ socal_cq_defs.h socalmap.h socalvar.h \ stp4020_reg.h stp4020_var.h \ diff --git a/usr/src/uts/sun/sys/cg3var.h b/usr/src/uts/sun/sys/cg3var.h deleted file mode 100644 index 16b4fde797..0000000000 --- a/usr/src/uts/sun/sys/cg3var.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 1989 by Sun Microsystems, Inc. - */ - -#ifndef _SYS_CG3VAR_H -#define _SYS_CG3VAR_H - -#pragma ident "%Z%%M% %I% %E% SMI" - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * cg3 -- color memory frame buffer - */ - -/* - * On architectures where cg4s have been implemented we need a nice big - * mmap offset to avoid the cg4 compatible simulated overlay/enable planes. - */ -#define CG3_MMAP_OFFSET 0x04000000 /* 8K x 8K */ - -/* - * In the kernel we just use a memory pixrect so we don't - * need any of this stuff. - */ -#ifndef _KERNEL -#include - -/* pixrect private data */ -struct cg3_data { - struct mprp_data mprp; /* memory pixrect simulator */ - int fd; /* file descriptor */ -}; - -#define cg3_d(pr) ((struct cg3_data *) (pr)->pr_data) - -/* pixrect ops vector */ -extern struct pixrectops cg3_ops; - -Pixrect *cg3_make(); -int cg3_destroy(); -Pixrect *cg3_region(); -int cg3_putcolormap(); -int cg3_getcolormap(); -#endif /* !_KERNEL */ - -#ifdef __cplusplus -} -#endif - -#endif /* _SYS_CG3VAR_H */ diff --git a/usr/src/uts/sun/sys/cg6fbc.h b/usr/src/uts/sun/sys/cg6fbc.h deleted file mode 100644 index 604589cc07..0000000000 --- a/usr/src/uts/sun/sys/cg6fbc.h +++ /dev/null @@ -1,519 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 1988-1989, Sun Microsystems, Inc. - */ - -#ifndef _SYS_CG6FBC_H -#define _SYS_CG6FBC_H - -#pragma ident "%Z%%M% %I% %E% SMI" - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * CG6 register definitions, common to all environments. - */ - -/* - * FBC MISC register bits - */ -typedef enum { - L_FBC_MISC_BLIT_IGNORE, L_FBC_MISC_BLIT_NOSRC, L_FBC_MISC_BLIT_SRC, - L_FBC_MISC_BLIT_ILLEGAL -} l_fbc_misc_blit_t; - -typedef enum { - L_FBC_MISC_DATA_IGNORE, L_FBC_MISC_DATA_COLOR8, L_FBC_MISC_DATA_COLOR1, - L_FBC_MISC_DATA_HRMONO -} l_fbc_misc_data_t; - -typedef enum { - L_FBC_MISC_DRAW_IGNORE, L_FBC_MISC_DRAW_RENDER, L_FBC_MISC_DRAW_PICK, - L_FBC_MISC_DRAW_ILLEGAL -} l_fbc_misc_draw_t; - -typedef enum { - L_FBC_MISC_BWRITE0_IGNORE, L_FBC_MISC_BWRITE0_ENABLE, - L_FBC_MISC_BWRITE0_DISABLE, L_FBC_MISC_BWRITE0_ILLEGAL -} l_fbc_misc_bwrite0_t; - -typedef enum { - L_FBC_MISC_BWRITE1_IGNORE, L_FBC_MISC_BWRITE1_ENABLE, - L_FBC_MISC_BWRITE1_DISABLE, L_FBC_MISC_BWRITE1_ILLEGAL -} l_fbc_misc_bwrite1_t; - -typedef enum { - L_FBC_MISC_BREAD_IGNORE, L_FBC_MISC_BREAD_0, L_FBC_MISC_BREAD_1, - L_FBC_MISC_BREAD_ILLEGAL -} l_fbc_misc_bread_t; - -typedef enum { - L_FBC_MISC_BDISP_IGNORE, L_FBC_MISC_BDISP_0, L_FBC_MISC_BDISP_1, - L_FBC_MISC_BDISP_ILLEGAL -} l_fbc_misc_bdisp_t; - -struct l_fbc_misc { - uint32_t : 10; /* not used */ - l_fbc_misc_blit_t l_fbc_misc_blit : 2; /* blit src check */ - uint32_t l_fbc_misc_vblank : 1; /* 1 == VBLANK has occured */ - l_fbc_misc_data_t l_fbc_misc_data : 2; /* Color mode select */ - l_fbc_misc_draw_t l_fbc_misc_draw : 2; /* Render/Pick mode */ - l_fbc_misc_bwrite0_t l_fbc_misc_bwrite0 : 2; /* buffer 0 write */ - l_fbc_misc_bwrite1_t l_fbc_misc_bwrite1 : 2; /* buffer 1 write */ - l_fbc_misc_bread_t l_fbc_misc_bread : 2; /* read enable */ - l_fbc_misc_bdisp_t l_fbc_misc_bdisp : 2; /* display enable */ - uint32_t l_fbc_misc_index_mod : 1; /* modify index */ - uint32_t l_fbc_misc_index : 2; /* index */ - uint32_t : 4; /* not used */ -}; - -/* - * FBC RASTEROP register bits - */ -typedef enum { - L_FBC_RASTEROP_PLANE_IGNORE, L_FBC_RASTEROP_PLANE_ZEROES, - L_FBC_RASTEROP_PLANE_ONES, L_FBC_RASTEROP_PLANE_MASK -} l_fbc_rasterop_plane_t; - -typedef enum { - L_FBC_RASTEROP_PIXEL_IGNORE, L_FBC_RASTEROP_PIXEL_ZEROES, - L_FBC_RASTEROP_PIXEL_ONES, L_FBC_RASTEROP_PIXEL_MASK -} l_fbc_rasterop_pixel_t; - -typedef enum { - L_FBC_RASTEROP_PATTERN_IGNORE, L_FBC_RASTEROP_PATTERN_ZEROES, - L_FBC_RASTEROP_PATTERN_ONES, L_FBC_RASTEROP_PATTERN_MASK -} l_fbc_rasterop_patt_t; - -typedef enum { - L_FBC_RASTEROP_POLYG_IGNORE, L_FBC_RASTEROP_POLYG_OVERLAP, - L_FBC_RASTEROP_POLYG_NONOVERLAP, L_FBC_RASTEROP_POLYG_ILLEGAL -} l_fbc_rasterop_polyg_t; - -typedef enum { - L_FBC_RASTEROP_ATTR_IGNORE, L_FBC_RASTEROP_ATTR_UNSUPP, - L_FBC_RASTEROP_ATTR_SUPP, L_FBC_RASTEROP_ATTR_ILLEGAL -} l_fbc_rasterop_attr_t; - -typedef enum { - L_FBC_RASTEROP_RAST_BOOL, L_FBC_RASTEROP_RAST_LINEAR -} l_fbc_rasterop_rast_t; - -typedef enum { - L_FBC_RASTEROP_PLOT_PLOT, L_FBC_RASTEROP_PLOT_UNPLOT -} l_fbc_rasterop_plot_t; - -struct l_fbc_rasterop { - l_fbc_rasterop_plane_t l_fbc_rasterop_plane : 2; /* plane mask */ - l_fbc_rasterop_pixel_t l_fbc_rasterop_pixel : 2; /* pixel mask */ - l_fbc_rasterop_patt_t l_fbc_rasterop_patt : 2; /* pattern mask */ - l_fbc_rasterop_polyg_t l_fbc_rasterop_polyg : 2; /* polygon draw */ - l_fbc_rasterop_attr_t l_fbc_rasterop_attr : 2; /* attribute select */ - uint32_t : 4; /* not used */ - l_fbc_rasterop_rast_t l_fbc_rasterop_rast : 1; /* rasterop mode */ - l_fbc_rasterop_plot_t l_fbc_rasterop_plot : 1; /* plot/unplot mode */ - uint32_t l_fbc_rasterop_rop11: 4; /* rasterop for f==1, b==1 */ - uint32_t l_fbc_rasterop_rop10: 4; /* rasterop for f==1, b==0 */ - uint32_t l_fbc_rasterop_rop01: 4; /* rasterop for f==0, b==1 */ - uint32_t l_fbc_rasterop_rop00: 4; /* rasterop for f==0, b==0 */ -}; - -/* - * FBC PATTALIGN register bits - */ -union l_fbc_pattalign { - uint32_t word; - uint16_t l_fbc_pattalign_array[2]; -#define l_fbc_pattalign_alignx l_fbc_pattalign_array[0] -#define l_fbc_pattalign_aligny l_fbc_pattalign_array[1] -}; - -/* - * FBC offsets & structure definition - */ -struct fbc { - -/* miscellaneous & clipcheck registers */ - - uint8_t fil0[ 0x4 ]; - - struct l_fbc_misc l_fbc_misc; - uint32_t l_fbc_clipcheck; - -#define L_FBC_MISC (0x004 / sizeof (uint32_t)) -#define L_FBC_CLIPCHECK (0x008 / sizeof (uint32_t)) - - uint8_t fill00[ 0x10 - 0x08 - 4 ]; - - uint32_t l_fbc_status; - uint32_t l_fbc_drawstatus; - uint32_t l_fbc_blitstatus; - uint32_t l_fbc_font; - -/* status and command registers */ -#define L_FBC_STATUS (0x010 / sizeof (uint32_t)) -#define L_FBC_DRAWSTATUS (0x014 / sizeof (uint32_t)) -#define L_FBC_BLITSTATUS (0x018 / sizeof (uint32_t)) -#define L_FBC_FONT (0x01C / sizeof (uint32_t)) - - uint8_t fill01[ 0x80 - 0x1C - 4 ]; - - uint32_t l_fbc_x0; - uint32_t l_fbc_y0; - uint32_t l_fbc_z0; - uint32_t l_fbc_color0; - uint32_t l_fbc_x1; - uint32_t l_fbc_y1; - uint32_t l_fbc_z1; - uint32_t l_fbc_color1; - uint32_t l_fbc_x2; - uint32_t l_fbc_y2; - uint32_t l_fbc_z2; - uint32_t l_fbc_color2; - uint32_t l_fbc_x3; - uint32_t l_fbc_y3; - uint32_t l_fbc_z3; - uint32_t l_fbc_color3; - -/* address registers */ -/* writing a z-register just sets the corresponding z clip status bits */ -#define L_FBC_X0 (0x080 / sizeof (uint32_t)) -#define L_FBC_Y0 (0x084 / sizeof (uint32_t)) -#define L_FBC_Z0 (0x088 / sizeof (uint32_t)) -#define L_FBC_COLOR0 (0x08C / sizeof (uint32_t)) -#define L_FBC_X1 (0x090 / sizeof (uint32_t)) -#define L_FBC_Y1 (0x094 / sizeof (uint32_t)) -#define L_FBC_Z1 (0x098 / sizeof (uint32_t)) -#define L_FBC_COLOR1 (0x09C / sizeof (uint32_t)) -#define L_FBC_X2 (0x0A0 / sizeof (uint32_t)) -#define L_FBC_Y2 (0x0A4 / sizeof (uint32_t)) -#define L_FBC_Z2 (0x0A8 / sizeof (uint32_t)) -#define L_FBC_COLOR2 (0x0AC / sizeof (uint32_t)) -#define L_FBC_X3 (0x0B0 / sizeof (uint32_t)) -#define L_FBC_Y3 (0x0B4 / sizeof (uint32_t)) -#define L_FBC_Z3 (0x0B8 / sizeof (uint32_t)) -#define L_FBC_COLOR3 (0x0BC / sizeof (uint32_t)) - -/* raster offset registers */ - - uint32_t l_fbc_rasteroffx; - uint32_t l_fbc_rasteroffy; - -#define L_FBC_RASTEROFFX (0x0C0 / sizeof (uint32_t)) -#define L_FBC_RASTEROFFY (0x0C4 / sizeof (uint32_t)) - - uint8_t fill02[ 0xD0 - 0xC4 - 4 ]; - - uint32_t l_fbc_autoincx; - uint32_t l_fbc_autoincy; - -/* autoincrement registers */ -#define L_FBC_AUTOINCX (0x0D0 / sizeof (uint32_t)) -#define L_FBC_AUTOINCY (0x0D4 / sizeof (uint32_t)) - - -/* window registers */ - - uint8_t fill03[ 0xE0 - 0xD4 - 4 ]; - - uint32_t l_fbc_clipminx; - uint32_t l_fbc_clipminy; - -#define L_FBC_CLIPMINX (0x0E0 / sizeof (uint32_t)) -#define L_FBC_CLIPMINY (0x0E4 / sizeof (uint32_t)) - - uint8_t fill04[ 0xF0 - 0xE4 - 4 ]; - - uint32_t l_fbc_clipmaxx; - uint32_t l_fbc_clipmaxy; - -#define L_FBC_CLIPMAXX (0x0F0 / sizeof (uint32_t)) -#define L_FBC_CLIPMAXY (0x0F4 / sizeof (uint32_t)) - - uint8_t fill05[ 0x100 - 0x0F4 - 4 ]; - - uint32_t l_fbc_fcolor; - uint32_t l_fbc_bcolor; - struct l_fbc_rasterop l_fbc_rasterop; - uint32_t l_fbc_planemask; - uint32_t l_fbc_pixelmask; - -/* attribute registers */ -#define L_FBC_FCOLOR (0x100 / sizeof (uint32_t)) -#define L_FBC_BCOLOR (0x104 / sizeof (uint32_t)) -#define L_FBC_RASTEROP (0x108 / sizeof (uint32_t)) -#define L_FBC_PLANEMASK (0x10C / sizeof (uint32_t)) -#define L_FBC_PIXELMASK (0x110 / sizeof (uint32_t)) - - uint8_t fill06[ 0x11C - 0x110 - 4 ]; - - union l_fbc_pattalign l_fbc_pattalign; - -#define L_FBC_PATTALIGN (0x11C / sizeof (uint32_t)) - - uint32_t l_fbc_pattern0; - uint32_t l_fbc_pattern1; - uint32_t l_fbc_pattern2; - uint32_t l_fbc_pattern3; - uint32_t l_fbc_pattern4; - uint32_t l_fbc_pattern5; - uint32_t l_fbc_pattern6; - uint32_t l_fbc_pattern7; - -#define L_FBC_PATTERN0 (0x120 / sizeof (uint32_t)) -#define L_FBC_PATTERN1 (0x124 / sizeof (uint32_t)) -#define L_FBC_PATTERN2 (0x128 / sizeof (uint32_t)) -#define L_FBC_PATTERN3 (0x12C / sizeof (uint32_t)) -#define L_FBC_PATTERN4 (0x130 / sizeof (uint32_t)) -#define L_FBC_PATTERN5 (0x134 / sizeof (uint32_t)) -#define L_FBC_PATTERN6 (0x138 / sizeof (uint32_t)) -#define L_FBC_PATTERN7 (0x13C / sizeof (uint32_t)) - -/* indexed address registers */ - - uint8_t fill07[ 0x800 - 0x13C - 4 ]; - - uint32_t l_fbc_ipointabsx; - uint32_t l_fbc_ipointabsy; - uint32_t l_fbc_ipointabsz; - -#define L_FBC_IPOINTABSX (0x800 / sizeof (uint32_t)) -#define L_FBC_IPOINTABSY (0x804 / sizeof (uint32_t)) -#define L_FBC_IPOINTABSZ (0x808 / sizeof (uint32_t)) - - uint8_t fill08[ 0x810 - 0x808 - 4 ]; - - uint32_t l_fbc_ipointrelx; - uint32_t l_fbc_ipointrely; - uint32_t l_fbc_ipointrelz; - -#define L_FBC_IPOINTRELX (0x810 / sizeof (uint32_t)) -#define L_FBC_IPOINTRELY (0x814 / sizeof (uint32_t)) -#define L_FBC_IPOINTRELZ (0x818 / sizeof (uint32_t)) - - uint8_t fill09[ 0x830 - 0x818 - 4 ]; - - uint32_t l_fbc_ipointcolr; - uint32_t l_fbc_ipointcolg; - uint32_t l_fbc_ipointcolb; - uint32_t l_fbc_ipointcola; - uint32_t l_fbc_ilineabsx; - uint32_t l_fbc_ilineabsy; - uint32_t l_fbc_ilineabsz; - -#define L_FBC_IPOINTCOLR (0x830 / sizeof (uint32_t)) -#define L_FBC_IPOINTCOLG (0x834 / sizeof (uint32_t)) -#define L_FBC_IPOINTCOLB (0x838 / sizeof (uint32_t)) -#define L_FBC_IPOINTCOLA (0x83C / sizeof (uint32_t)) -#define L_FBC_ILINEABSX (0x840 / sizeof (uint32_t)) -#define L_FBC_ILINEABSY (0x844 / sizeof (uint32_t)) -#define L_FBC_ILINEABSZ (0x848 / sizeof (uint32_t)) - - uint8_t fill10[ 0x850 - 0x848 - 4 ]; - - uint32_t l_fbc_ilinerelx; - uint32_t l_fbc_ilinerely; - uint32_t l_fbc_ilinerelz; - -#define L_FBC_ILINERELX (0x850 / sizeof (uint32_t)) -#define L_FBC_ILINERELY (0x854 / sizeof (uint32_t)) -#define L_FBC_ILINERELZ (0x858 / sizeof (uint32_t)) - - uint8_t fill11[ 0x870 - 0x858 - 4 ]; - - uint32_t l_fbc_ilinecolr; - uint32_t l_fbc_ilinecolg; - uint32_t l_fbc_ilinecolb; - uint32_t l_fbc_ilinecola; - -#define L_FBC_ILINECOLR (0x870 / sizeof (uint32_t)) -#define L_FBC_ILINECOLG (0x874 / sizeof (uint32_t)) -#define L_FBC_ILINECOLB (0x878 / sizeof (uint32_t)) -#define L_FBC_ILINECOLA (0x87C / sizeof (uint32_t)) - - uint32_t l_fbc_itriabsx; - uint32_t l_fbc_itriabsy; - uint32_t l_fbc_itriabsz; - -#define L_FBC_ITRIABSX (0x880 / sizeof (uint32_t)) -#define L_FBC_ITRIABSY (0x884 / sizeof (uint32_t)) -#define L_FBC_ITRIABSZ (0x888 / sizeof (uint32_t)) - - uint8_t fill12[ 0x890 - 0x888 - 4 ]; - - uint32_t l_fbc_itrirelx; - uint32_t l_fbc_itrirely; - uint32_t l_fbc_itrirelz; - -#define L_FBC_ITRIRELX (0x890 / sizeof (uint32_t)) -#define L_FBC_ITRIRELY (0x894 / sizeof (uint32_t)) -#define L_FBC_ITRIRELZ (0x898 / sizeof (uint32_t)) - - uint8_t fill13[ 0x8B0 - 0x898 - 4 ]; - - uint32_t l_fbc_itricolr; - uint32_t l_fbc_itricolg; - uint32_t l_fbc_itricolb; - uint32_t l_fbc_itricola; - uint32_t l_fbc_iquadabsx; - uint32_t l_fbc_iquadabsy; - uint32_t l_fbc_iquadabsz; - -#define L_FBC_ITRICOLR (0x8B0 / sizeof (uint32_t)) -#define L_FBC_ITRICOLG (0x8B4 / sizeof (uint32_t)) -#define L_FBC_ITRICOLB (0x8B8 / sizeof (uint32_t)) -#define L_FBC_ITRICOLA (0x8BC / sizeof (uint32_t)) -#define L_FBC_IQUADABSX (0x8C0 / sizeof (uint32_t)) -#define L_FBC_IQUADABSY (0x8C4 / sizeof (uint32_t)) -#define L_FBC_IQUADABSZ (0x8C8 / sizeof (uint32_t)) - - uint8_t fill14[ 0x8D0 - 0x8C8 - 4 ]; - - uint32_t l_fbc_iquadrelx; - uint32_t l_fbc_iquadrely; - uint32_t l_fbc_iquadrelz; - -#define L_FBC_IQUADRELX (0x8D0 / sizeof (uint32_t)) -#define L_FBC_IQUADRELY (0x8D4 / sizeof (uint32_t)) -#define L_FBC_IQUADRELZ (0x8D8 / sizeof (uint32_t)) - - uint8_t fill15[ 0x8F0 - 0x8D8 - 4 ]; - - uint32_t l_fbc_iquadcolr; - uint32_t l_fbc_iquadcolg; - uint32_t l_fbc_iquadcolb; - uint32_t l_fbc_iquadcola; - uint32_t l_fbc_irectabsx; - uint32_t l_fbc_irectabsy; - uint32_t l_fbc_irectabsz; - -#define L_FBC_IQUADCOLR (0x8F0 / sizeof (uint32_t)) -#define L_FBC_IQUADCOLG (0x8F4 / sizeof (uint32_t)) -#define L_FBC_IQUADCOLB (0x8F8 / sizeof (uint32_t)) -#define L_FBC_IQUADCOLA (0x8FC / sizeof (uint32_t)) -#define L_FBC_IRECTABSX (0x900 / sizeof (uint32_t)) -#define L_FBC_IRECTABSY (0x904 / sizeof (uint32_t)) -#define L_FBC_IRECTABSZ (0x908 / sizeof (uint32_t)) - - uint8_t fill17[ 0x910 - 0x908 - 4 ]; - - uint32_t l_fbc_irectrelx; - uint32_t l_fbc_irectrely; - uint32_t l_fbc_irectrelz; - -#define L_FBC_IRECTRELX (0x910 / sizeof (uint32_t)) -#define L_FBC_IRECTRELY (0x914 / sizeof (uint32_t)) -#define L_FBC_IRECTRELZ (0x918 / sizeof (uint32_t)) - - uint8_t fill18[ 0x930 - 0x918 - 4 ]; - - uint32_t l_fbc_irectcolr; - uint32_t l_fbc_irectcolg; - uint32_t l_fbc_irectcolb; - uint32_t l_fbc_irectcola; - -#define L_FBC_IRECTCOLR (0x930 / sizeof (uint32_t)) -#define L_FBC_IRECTCOLG (0x934 / sizeof (uint32_t)) -#define L_FBC_IRECTCOLB (0x938 / sizeof (uint32_t)) -#define L_FBC_IRECTCOLA (0x93C / sizeof (uint32_t)) - -}; - -/* - * FBC CLIPCHECK register bits. - */ -#define CLIP_MASK 0x3 -#define CLIP_IN 0x0 -#define CLIP_LT 0x1 -#define CLIP_GT 0x2 -#define CLIP_BACK 0x3 - -#define CLIP_X(bits, reg_num) ((bits) << (0+(2*(reg_num)))) -#define CLIP_Y(bits, reg_num) ((bits) << (8+(2*(reg_num)))) -#define CLIP_Z(bits, reg_num) ((bits) << (16+(2*(reg_num)))) - -/* - * FBC STATUS, DRAWSTATUS, and BLITSTATUS register bits. - */ -#define L_FBC_ACC_CLEAR 0x80000000 /* when writing STATUS */ -#define L_FBC_DRAW_EXCEPTION 0x80000000 /* when reading DRAWSTATUS */ -#define L_FBC_BLIT_EXCEPTION 0x80000000 /* when reading BLITSTATUS */ -#define L_FBC_TEC_EXCEPTION 0x40000000 -#define L_FBC_FULL 0x20000000 -#define L_FBC_BUSY 0x10000000 -#define L_FBC_UNSUPPORTED_ATTR 0x02000000 -#define L_FBC_HRMONO 0x01000000 -#define L_FBC_ACC_OVERFLOW 0x00200000 -#define L_FBC_ACC_PICK 0x00100000 -#define L_FBC_TEC_HIDDEN 0x00040000 -#define L_FBC_TEC_INTERSECT 0x00020000 -#define L_FBC_TEC_VISIBLE 0x00010000 -#define L_FBC_BLIT_HARDWARE 0x00008000 -#define L_FBC_BLIT_SOFTWARE 0x00004000 -#define L_FBC_BLIT_SRC_HID 0x00002000 -#define L_FBC_BLIT_SRC_INT 0x00001000 -#define L_FBC_BLIT_SRC_VIS 0x00000800 -#define L_FBC_BLIT_DST_HID 0x00000400 -#define L_FBC_BLIT_DST_INT 0x00000200 -#define L_FBC_BLIT_DST_VIS 0x00000100 -#define L_FBC_DRAW_HARDWARE 0x00000010 -#define L_FBC_DRAW_SOFTWARE 0x00000008 -#define L_FBC_DRAW_HIDDEN 0x00000004 -#define L_FBC_DRAW_INTERSECT 0x00000002 -#define L_FBC_DRAW_VISIBLE 0x00000001 - -/* - * FBC/FHC CONFIG register - */ -#define FHC_CONFIG_FBID_SHIFT 24 -#define FHC_CONFIG_FBID_MASK 255 -#define FHC_CONFIG_REV_SHIFT 20 -#define FHC_CONFIG_REV_MASK 15 -#define FHC_CONFIG_FROP_DISABLE (1 << 19) -#define FHC_CONFIG_ROW_DISABLE (1 << 18) -#define FHC_CONFIG_SRC_DISABLE (1 << 17) -#define FHC_CONFIG_DST_DISABLE (1 << 16) -#define FHC_CONFIG_RESET (1 << 15) -#define FHC_CONFIG_LITTLE_ENDIAN (1 << 13) -#define FHC_CONFIG_RES_MASK (3 << 11) -#define FHC_CONFIG_1024 (0 << 11) -#define FHC_CONFIG_1152 (1 << 11) -#define FHC_CONFIG_1280 (2 << 11) -#define FHC_CONFIG_1600 (3 << 11) -#define FHC_CONFIG_CPU_MASK (3 << 9) -#define FHC_CONFIG_CPU_SPARC (0 << 9) -#define FHC_CONFIG_CPU_68020 (1 << 9) -#define FHC_CONFIG_CPU_386 (2 << 9) -#define FHC_CONFIG_TEST (1 << 8) -#define FHC_CONFIG_TESTX_SHIFT 4 -#define FHC_CONFIG_TESTX_MASK (15 << 4) -#define FHC_CONFIG_TESTY_SHIFT 0 -#define FHC_CONFIG_TESTY_MASK 15 - -#ifdef __cplusplus -} -#endif - -#endif /* _SYS_CG6FBC_H */ diff --git a/usr/src/uts/sun/sys/cg6reg.h b/usr/src/uts/sun/sys/cg6reg.h deleted file mode 100644 index 2e1321b256..0000000000 --- a/usr/src/uts/sun/sys/cg6reg.h +++ /dev/null @@ -1,148 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright (c) 1988-1989,1997-1998 by Sun Microsystems, Inc. - * All rights reserved. - */ - -#ifndef _SYS_CG6REG_H -#define _SYS_CG6REG_H - -#pragma ident "%Z%%M% %I% %E% SMI" - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * CG6 frame buffer hardware definitions. - */ - - -/* Physical frame buffer and color map addresses */ -/* - * The base address is defined in the configuration file, e.g. GENERIC. - * These constants are the offset from that address. - */ - -#define CG6_P4BASE 0xFB000000L - -#define CG6_ADDR_ROM_SBUS 0L -#define CG6_ADDR_ROM_P4 0x380000L - - -#define CG6_ADDR_CMAP 0x200000L -#define CG6_ADDR_DHC 0x240000L -#define CG6_ADDR_ALT 0x280000L -#define CG6_ADDR_FBC 0x700000L -#define CG6_ADDR_TEC 0x701000L -#define CG6_ADDR_P4REG 0x300000L -#define CG6_ADDR_OVERLAY 0x400000L /* FAKE */ -#define CG6_ADDR_FHC 0x300000L -#define CG6_ADDR_THC 0x301000L -#define CG6_ADDR_ENABLE 0x600000L -#define CG6_ADDR_COLOR 0x800000L - -#define CG6_ADDR_FBCTEC CG6_ADDR_FBC -#define CG6_ADDR_FHCTHC CG6_ADDR_FHC - -#define CG6_CMAP_SZ 8192 -#define CG6_FBCTEC_SZ 8192 -#define CG6_FHCTHC_SZ 8192 -#define CG6_ROM_SZ (64*1024) -#define CG6_FB_SZ (1024*1024) -#define CG6_DHC_SZ 8192 -#define CG6_ALT_SZ 8192 - -/* - * Offsets of TEC/FHC into page - */ -#define CG6_TEC_POFF 0x1000 -#define CG6_THC_POFF 0x1000 - -/* - * Virtual (mmap offsets) addresses - */ -#define CG6_VBASE 0x70000000L /* nobody knows where */ - /* this comes from */ -#define CG6_VADDR(x) (CG6_VBASE + (x) * 8192) - -/* - * CG6 Virtual object addresses - */ -#define CG6_VADDR_FBC CG6_VADDR(0) -#define CG6_VADDR_TEC (CG6_VADDR_FBC + CG6_TEC_POFF) -#define CG6_VADDR_CMAP CG6_VADDR(1) -#define CG6_VADDR_FHC CG6_VADDR(2) -#define CG6_VADDR_THC (CG6_VADDR_FHC + CG6_THC_POFF) -#define CG6_VADDR_ROM CG6_VADDR(3) -#define CG6_VADDR_COLOR (CG6_VADDR_ROM + CG6_ROM_SZ) - /* KLUDGE: BIG gap here, to accomodate potential future framebuffers */ -#define CG6_VADDR_DHC CG6_VADDR(16384) -#define CG6_VADDR_ALT CG6_VADDR(16385) -#define CG6_VADDR_UART CG6_VADDR(16386) -#define CG6_VADDR_VRT CG6_VADDR(16387) /* vertical retrace page */ - -#define CG6_VADDR_FBCTEC CG6_VADDR_FBC -#define CG6_VADDR_FHCTHC CG6_VADDR_FHC -/* - * to map in all of lego, use mmapsize below, and offset CG6_VBASE - */ -#define MMAPSIZE(dfbsize) (CG6_VADDR_COLOR-CG6_VBASE+dfbsize) - -/* - * convert from address returned by pr_makefromfd (eg. mmap) - * to CG6 register set. - */ -#define CG6VA_TO_FBC(base) \ - ((struct fbc *)(((char *)base)+(CG6_VADDR_FBC-CG6_VBASE))) -#define CG6VA_TO_TEC(base) \ - ((struct tec *)(((char *)base)+(CG6_VADDR_TEC-CG6_VBASE))) -#define CG6VA_TO_FHC(base) \ - ((uint_t *)(((char *)base)+(CG6_VADDR_FHC-CG6_VBASE))) -#define CG6VA_TO_THC(base) \ - ((struct thc *)(((char *)base)+(CG6_VADDR_THC-CG6_VBASE))) -#define CG6VA_TO_DFB(base) \ - ((short *)(((char *)base)+(CG6_VADDR_COLOR-CG6_VBASE))) -#define CG6VA_TO_ROM(base) \ - ((uint_t *)(((char *)base)+(CG6_VADDR_ROM-CG6_VBASE))) -#define CG6VA_TO_CMAP(base) \ - ((struct cg6_cmap *)(((char *)base)+(CG6_VADDR_CMAP-CG6_VBASE))) - - -/* (Brooktree DAC) definitions */ - -/* number of colormap entries */ -#define CG6_CMAP_ENTRIES 256 - -struct cg6_cmap { - uint32_t addr; /* address register */ - uint32_t cmap; /* color map data register */ - uint32_t ctrl; /* control register */ - uint32_t omap; /* overlay map data register */ -}; - -#ifdef __cplusplus -} -#endif - -#endif /* _SYS_CG6REG_H */ diff --git a/usr/src/uts/sun/sys/cg6tec.h b/usr/src/uts/sun/sys/cg6tec.h deleted file mode 100644 index cd42288b32..0000000000 --- a/usr/src/uts/sun/sys/cg6tec.h +++ /dev/null @@ -1,742 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright (c) 1991,1997-1998 by Sun Microsystems, Inc. - * All rights reserved. - */ - -#ifndef _SYS_CG6TEC_H -#define _SYS_CG6TEC_H - -#pragma ident "%Z%%M% %I% %E% SMI" /* SunOS-4.1 1.2 */ - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * TEC register offsets from base address. These offsets are - * u_intended to be added to a pointer-to-integer whose value is the - * base address of the CG6 memory mapped register area. - */ - -/* base for transform data registers */ - -#define L_TEC_DATA_BASE (0x100/sizeof (uint32_t)) -#define L_TEC_DATA00 (0x100/sizeof (uint32_t)) -#define L_TEC_DATA01 (0x104/sizeof (uint32_t)) -#define L_TEC_DATA02 (0x108/sizeof (uint32_t)) -#define L_TEC_DATA03 (0x10C/sizeof (uint32_t)) -#define L_TEC_DATA04 (0x110/sizeof (uint32_t)) -#define L_TEC_DATA05 (0x114/sizeof (uint32_t)) -#define L_TEC_DATA06 (0x118/sizeof (uint32_t)) -#define L_TEC_DATA07 (0x11C/sizeof (uint32_t)) -#define L_TEC_DATA08 (0x120/sizeof (uint32_t)) -#define L_TEC_DATA09 (0x124/sizeof (uint32_t)) -#define L_TEC_DATA10 (0x128/sizeof (uint32_t)) -#define L_TEC_DATA11 (0x12C/sizeof (uint32_t)) -#define L_TEC_DATA12 (0x130/sizeof (uint32_t)) -#define L_TEC_DATA13 (0x134/sizeof (uint32_t)) -#define L_TEC_DATA14 (0x138/sizeof (uint32_t)) -#define L_TEC_DATA15 (0x13C/sizeof (uint32_t)) -#define L_TEC_DATA16 (0x140/sizeof (uint32_t)) -#define L_TEC_DATA17 (0x144/sizeof (uint32_t)) -#define L_TEC_DATA18 (0x148/sizeof (uint32_t)) -#define L_TEC_DATA19 (0x14C/sizeof (uint32_t)) -#define L_TEC_DATA20 (0x150/sizeof (uint32_t)) -#define L_TEC_DATA21 (0x154/sizeof (uint32_t)) -#define L_TEC_DATA22 (0x158/sizeof (uint32_t)) -#define L_TEC_DATA23 (0x15C/sizeof (uint32_t)) -#define L_TEC_DATA24 (0x160/sizeof (uint32_t)) -#define L_TEC_DATA25 (0x164/sizeof (uint32_t)) -#define L_TEC_DATA26 (0x168/sizeof (uint32_t)) -#define L_TEC_DATA27 (0x16C/sizeof (uint32_t)) -#define L_TEC_DATA28 (0x170/sizeof (uint32_t)) -#define L_TEC_DATA29 (0x174/sizeof (uint32_t)) -#define L_TEC_DATA30 (0x178/sizeof (uint32_t)) -#define L_TEC_DATA31 (0x17C/sizeof (uint32_t)) -#define L_TEC_DATA32 (0x180/sizeof (uint32_t)) -#define L_TEC_DATA33 (0x184/sizeof (uint32_t)) -#define L_TEC_DATA34 (0x188/sizeof (uint32_t)) -#define L_TEC_DATA35 (0x18C/sizeof (uint32_t)) -#define L_TEC_DATA36 (0x190/sizeof (uint32_t)) -#define L_TEC_DATA37 (0x194/sizeof (uint32_t)) -#define L_TEC_DATA38 (0x198/sizeof (uint32_t)) -#define L_TEC_DATA39 (0x19C/sizeof (uint32_t)) -#define L_TEC_DATA40 (0x1A0/sizeof (uint32_t)) -#define L_TEC_DATA41 (0x1A4/sizeof (uint32_t)) -#define L_TEC_DATA42 (0x1A8/sizeof (uint32_t)) -#define L_TEC_DATA43 (0x1AC/sizeof (uint32_t)) -#define L_TEC_DATA44 (0x1B0/sizeof (uint32_t)) -#define L_TEC_DATA45 (0x1B4/sizeof (uint32_t)) -#define L_TEC_DATA46 (0x1B8/sizeof (uint32_t)) -#define L_TEC_DATA47 (0x1BC/sizeof (uint32_t)) -#define L_TEC_DATA48 (0x1C0/sizeof (uint32_t)) -#define L_TEC_DATA49 (0x1C4/sizeof (uint32_t)) -#define L_TEC_DATA50 (0x1C8/sizeof (uint32_t)) -#define L_TEC_DATA51 (0x1CC/sizeof (uint32_t)) -#define L_TEC_DATA52 (0x1D0/sizeof (uint32_t)) -#define L_TEC_DATA53 (0x1D4/sizeof (uint32_t)) -#define L_TEC_DATA54 (0x1D8/sizeof (uint32_t)) -#define L_TEC_DATA55 (0x1DC/sizeof (uint32_t)) -#define L_TEC_DATA56 (0x1E0/sizeof (uint32_t)) -#define L_TEC_DATA57 (0x1E4/sizeof (uint32_t)) -#define L_TEC_DATA58 (0x1E8/sizeof (uint32_t)) -#define L_TEC_DATA59 (0x1EC/sizeof (uint32_t)) -#define L_TEC_DATA60 (0x1F0/sizeof (uint32_t)) -#define L_TEC_DATA61 (0x1F4/sizeof (uint32_t)) -#define L_TEC_DATA62 (0x1F8/sizeof (uint32_t)) -#define L_TEC_DATA63 (0x1FC/sizeof (uint32_t)) - - -/* matrix registers */ - -#define L_TEC_MV_MATRIX (0x000/sizeof (uint32_t)) -#define L_TEC_CLIPCHECK (0x004/sizeof (uint32_t)) -#define L_TEC_VDC_MATRIX (0x008/sizeof (uint32_t)) - - -/* command register */ - -#define L_TEC_COMMAND1 (0x0010/sizeof (uint32_t)) -#define L_TEC_COMMAND2 (0x0014/sizeof (uint32_t)) -#define L_TEC_COMMAND3 (0x0018/sizeof (uint32_t)) -#define L_TEC_COMMAND4 (0x001c/sizeof (uint32_t)) - - -/* uint32_teger indexed address registers */ - -#define L_TEC_IPOINTABSX (0x800 / sizeof (uint32_t)) -#define L_TEC_IPOINTABSY (0x804 / sizeof (uint32_t)) -#define L_TEC_IPOINTABSZ (0x808 / sizeof (uint32_t)) -#define L_TEC_IPOINTABSW (0x80C / sizeof (uint32_t)) -#define L_TEC_IPOINTRELX (0x810 / sizeof (uint32_t)) -#define L_TEC_IPOINTRELY (0x814 / sizeof (uint32_t)) -#define L_TEC_IPOINTRELZ (0x818 / sizeof (uint32_t)) -#define L_TEC_IPOINTRELW (0x81C / sizeof (uint32_t)) - -#define L_TEC_ILINEABSX (0x840 / sizeof (uint32_t)) -#define L_TEC_ILINEABSY (0x844 / sizeof (uint32_t)) -#define L_TEC_ILINEABSZ (0x848 / sizeof (uint32_t)) -#define L_TEC_ILINEABSW (0x84C / sizeof (uint32_t)) -#define L_TEC_ILINERELX (0x850 / sizeof (uint32_t)) -#define L_TEC_ILINERELY (0x854 / sizeof (uint32_t)) -#define L_TEC_ILINERELZ (0x858 / sizeof (uint32_t)) -#define L_TEC_ILINERELW (0x85C / sizeof (uint32_t)) - -#define L_TEC_ITRIABSX (0x880 / sizeof (uint32_t)) -#define L_TEC_ITRIABSY (0x884 / sizeof (uint32_t)) -#define L_TEC_ITRIABSZ (0x888 / sizeof (uint32_t)) -#define L_TEC_ITRIABSW (0x88C / sizeof (uint32_t)) -#define L_TEC_ITRIRELX (0x890 / sizeof (uint32_t)) -#define L_TEC_ITRIRELY (0x894 / sizeof (uint32_t)) -#define L_TEC_ITRIRELZ (0x898 / sizeof (uint32_t)) -#define L_TEC_ITRIRELW (0x89C / sizeof (uint32_t)) - -#define L_TEC_IQUADABSX (0x8C0 / sizeof (uint32_t)) -#define L_TEC_IQUADABSY (0x8C4 / sizeof (uint32_t)) -#define L_TEC_IQUADABSZ (0x8C8 / sizeof (uint32_t)) -#define L_TEC_IQUADABSW (0x8CC / sizeof (uint32_t)) -#define L_TEC_IQUADRELX (0x8D0 / sizeof (uint32_t)) -#define L_TEC_IQUADRELY (0x8D4 / sizeof (uint32_t)) -#define L_TEC_IQUADRELZ (0x8D8 / sizeof (uint32_t)) -#define L_TEC_IQUADRELW (0x8DC / sizeof (uint32_t)) - -#define L_TEC_IRECTABSX (0x900 / sizeof (uint32_t)) -#define L_TEC_IRECTABSY (0x904 / sizeof (uint32_t)) -#define L_TEC_IRECTABSZ (0x908 / sizeof (uint32_t)) -#define L_TEC_IRECTABSW (0x90C / sizeof (uint32_t)) -#define L_TEC_IRECTRELX (0x910 / sizeof (uint32_t)) -#define L_TEC_IRECTRELY (0x914 / sizeof (uint32_t)) -#define L_TEC_IRECTRELZ (0x918 / sizeof (uint32_t)) -#define L_TEC_IRECTRELW (0x91C / sizeof (uint32_t)) - -/* fixed pouint32_t indexed address registers */ - -#define L_TEC_BPOINTABSX (0xA00 / sizeof (uint32_t)) -#define L_TEC_BPOINTABSY (0xA04 / sizeof (uint32_t)) -#define L_TEC_BPOINTABSZ (0xA08 / sizeof (uint32_t)) -#define L_TEC_BPOINTABSW (0xA0C / sizeof (uint32_t)) -#define L_TEC_BPOINTRELX (0xA10 / sizeof (uint32_t)) -#define L_TEC_BPOINTRELY (0xA14 / sizeof (uint32_t)) -#define L_TEC_BPOINTRELZ (0xA18 / sizeof (uint32_t)) -#define L_TEC_BPOINTRELW (0xA1C / sizeof (uint32_t)) - -#define L_TEC_BLINEABSX (0xA40 / sizeof (uint32_t)) -#define L_TEC_BLINEABSY (0xA44 / sizeof (uint32_t)) -#define L_TEC_BLINEABSZ (0xA48 / sizeof (uint32_t)) -#define L_TEC_BLINEABSW (0xA4C / sizeof (uint32_t)) -#define L_TEC_BLINERELX (0xA50 / sizeof (uint32_t)) -#define L_TEC_BLINERELY (0xA54 / sizeof (uint32_t)) -#define L_TEC_BLINERELZ (0xA58 / sizeof (uint32_t)) -#define L_TEC_BLINERELW (0xA5C / sizeof (uint32_t)) - -#define L_TEC_BTRIABSX (0xA80 / sizeof (uint32_t)) -#define L_TEC_BTRIABSY (0xA84 / sizeof (uint32_t)) -#define L_TEC_BTRIABSZ (0xA88 / sizeof (uint32_t)) -#define L_TEC_BTRIABSW (0xA8C / sizeof (uint32_t)) -#define L_TEC_BTRIRELX (0xA90 / sizeof (uint32_t)) -#define L_TEC_BTRIRELY (0xA94 / sizeof (uint32_t)) -#define L_TEC_BTRIRELZ (0xA98 / sizeof (uint32_t)) -#define L_TEC_BTRIRELW (0xA9C / sizeof (uint32_t)) - -#define L_TEC_BQUADABSX (0xAC0 / sizeof (uint32_t)) -#define L_TEC_BQUADABSY (0xAC4 / sizeof (uint32_t)) -#define L_TEC_BQUADABSZ (0xAC8 / sizeof (uint32_t)) -#define L_TEC_BQUADABSW (0xACC / sizeof (uint32_t)) -#define L_TEC_BQUADRELX (0xAD0 / sizeof (uint32_t)) -#define L_TEC_BQUADRELY (0xAD4 / sizeof (uint32_t)) -#define L_TEC_BQUADRELZ (0xAD8 / sizeof (uint32_t)) -#define L_TEC_BQUADRELW (0xADC / sizeof (uint32_t)) - -#define L_TEC_BRECTABSX (0xB00 / sizeof (uint32_t)) -#define L_TEC_BRECTABSY (0xB04 / sizeof (uint32_t)) -#define L_TEC_BRECTABSZ (0xB08 / sizeof (uint32_t)) -#define L_TEC_BRECTABSW (0xB0C / sizeof (uint32_t)) -#define L_TEC_BRECTRELX (0xB10 / sizeof (uint32_t)) -#define L_TEC_BRECTRELY (0xB14 / sizeof (uint32_t)) -#define L_TEC_BRECTRELZ (0xB18 / sizeof (uint32_t)) -#define L_TEC_BRECTRELW (0xB1C / sizeof (uint32_t)) - -/* floating pouint32_t indexed address registers */ - -#define L_TEC_FPOINTABSX (0xC00 / sizeof (uint32_t)) -#define L_TEC_FPOINTABSY (0xC04 / sizeof (uint32_t)) -#define L_TEC_FPOINTABSZ (0xC08 / sizeof (uint32_t)) -#define L_TEC_FPOINTABSW (0xC0C / sizeof (uint32_t)) -#define L_TEC_FPOINTRELX (0xC10 / sizeof (uint32_t)) -#define L_TEC_FPOINTRELY (0xC14 / sizeof (uint32_t)) -#define L_TEC_FPOINTRELZ (0xC18 / sizeof (uint32_t)) -#define L_TEC_FPOINTRELW (0xC1C / sizeof (uint32_t)) - -#define L_TEC_FLINEABSX (0xC40 / sizeof (uint32_t)) -#define L_TEC_FLINEABSY (0xC44 / sizeof (uint32_t)) -#define L_TEC_FLINEABSZ (0xC48 / sizeof (uint32_t)) -#define L_TEC_FLINEABSW (0xC4C / sizeof (uint32_t)) -#define L_TEC_FLINERELX (0xC50 / sizeof (uint32_t)) -#define L_TEC_FLINERELY (0xC54 / sizeof (uint32_t)) -#define L_TEC_FLINERELZ (0xC58 / sizeof (uint32_t)) -#define L_TEC_FLINERELW (0xC5C / sizeof (uint32_t)) - -#define L_TEC_FTRIABSX (0xC80 / sizeof (uint32_t)) -#define L_TEC_FTRIABSY (0xC84 / sizeof (uint32_t)) -#define L_TEC_FTRIABSZ (0xC88 / sizeof (uint32_t)) -#define L_TEC_FTRIABSW (0xC8C / sizeof (uint32_t)) -#define L_TEC_FTRIRELX (0xC90 / sizeof (uint32_t)) -#define L_TEC_FTRIRELY (0xC94 / sizeof (uint32_t)) -#define L_TEC_FTRIRELZ (0xC98 / sizeof (uint32_t)) -#define L_TEC_FTRIRELW (0xC9C / sizeof (uint32_t)) - -#define L_TEC_FQUADABSX (0xCC0 / sizeof (uint32_t)) -#define L_TEC_FQUADABSY (0xCC4 / sizeof (uint32_t)) -#define L_TEC_FQUADABSZ (0xCC8 / sizeof (uint32_t)) -#define L_TEC_FQUADABSW (0xCCC / sizeof (uint32_t)) -#define L_TEC_FQUADRELX (0xCD0 / sizeof (uint32_t)) -#define L_TEC_FQUADRELY (0xCD4 / sizeof (uint32_t)) -#define L_TEC_FQUADRELZ (0xCD8 / sizeof (uint32_t)) -#define L_TEC_FQUADRELW (0xCDC / sizeof (uint32_t)) - -#define L_TEC_FRECTABSX (0xD00 / sizeof (uint32_t)) -#define L_TEC_FRECTABSY (0xD04 / sizeof (uint32_t)) -#define L_TEC_FRECTABSZ (0xD08 / sizeof (uint32_t)) -#define L_TEC_FRECTABSW (0xD0C / sizeof (uint32_t)) -#define L_TEC_FRECTRELX (0xD10 / sizeof (uint32_t)) -#define L_TEC_FRECTRELY (0xD14 / sizeof (uint32_t)) -#define L_TEC_FRECTRELZ (0xD18 / sizeof (uint32_t)) -#define L_TEC_FRECTRELW (0xD1C / sizeof (uint32_t)) - -/* - * Generic unsigned types for bit fields - */ -typedef enum { - L_TEC_UNUSED = 0 -} l_tec_unused_t; - -/* - * typedefs for entering index registers - */ -typedef enum { /* coordinate type of {pou_int,line,etc} */ - L_TEC_X = 0, - L_TEC_Y = 1, - L_TEC_Z = 2, - L_TEC_W = 3, /* used as index to store index writes in */ - /* tec_data array */ - L_TEC_X_MV = 4, - L_TEC_Y_MV = 5, - L_TEC_Z_MV = 6, - L_TEC_W_MV = 7, /* used as index to store xform results */ - L_TEC_X_VDC = 8, - L_TEC_Y_VDC = 9, - L_TEC_Z_VDC = 10, /* used as index to store VDC multiply result */ - L_TEC_SCRATCH = 11 /* scratch register */ -} l_tec_coord_t; - -typedef enum { /* index coordinate type */ - L_TEC_INT = 0, - L_TEC_FRAC = 1, - L_TEC_FLOAT = 2 -} l_tec_type_t; - -typedef enum { /* index object type */ - L_TEC_POINT = 0, - L_TEC_LINE = 1, - L_TEC_TRI = 2, - L_TEC_QUAD = 3, - L_TEC_RECT = 4 -} l_tec_object_t; - -typedef enum { - L_TEC_ABS = 0, - L_TEC_REL = 1 -} l_tec_mode_t; - - -/* - * TEC MV_MATRIX register bits. - */ - -typedef enum { - L_TEC_MV_DIV_OFF = 0, - L_TEC_MV_DIV_ON = 1 -} l_tec_mv_div_t; - -typedef enum { - L_TEC_MV_AUTO_OFF = 0, - L_TEC_MV_AUTO_ON = 1 -} l_tec_mv_auto_t; - -typedef enum { - L_TEC_MV_H_FALSE = 0, - L_TEC_MV_H_TRUE = 1 -} l_tec_mv_h_t; - -typedef enum { - L_TEC_MV_Z_FALSE = 0, L_TEC_MV_Z_TRUE = 1 -} l_tec_mv_z_t; - -typedef enum { - L_TEC_MV_I3 = 0, L_TEC_MV_I4 = 1 -} l_tec_mv_i_t; - -typedef enum { - L_TEC_MV_J1 = 0, L_TEC_MV_J2 = 1, L_TEC_MV_J3 = 2, L_TEC_MV_J4 = 3 -} l_tec_mv_j_t; - -typedef struct l_tec_mv { - l_tec_unused_t l_tec_mv_unused1 :16; /* NOT USED */ - l_tec_mv_div_t l_tec_mv_div : 1; /* divide enable */ - l_tec_mv_auto_t l_tec_mv_autoload : 1; /* autoload enable */ - l_tec_mv_h_t l_tec_mv_h : 1; /* pou_int size */ - l_tec_mv_z_t l_tec_mv_z : 1; /* pou_int size */ - l_tec_unused_t l_tec_mv_unused2 : 1; /* NOT USED */ - l_tec_mv_i_t l_tec_mv_i : 1; /* matrix rows */ - l_tec_mv_j_t l_tec_mv_j : 2; /* matrix columns */ - l_tec_unused_t l_tec_mv_unused3 : 2; /* NOT USED */ - uint32_t l_tec_mv_index : 6; /* matrix start data */ - /* register */ -} l_tec_mv_t; - -/* - * TEC CLIPCHECK bits. - */ - -typedef enum { - L_TEC_EXCEPTION_OFF = 0, L_TEC_EXCEPTION_ON = 1 -} l_tec_clip_exception_t; - -typedef enum { - L_TEC_HIDDEN_OFF = 0, L_TEC_HIDDEN_ON = 1 -} l_tec_clip_hidden_t; - -typedef enum { - L_TEC_INTERSECT_OFF = 0, L_TEC_INTERSECT_ON = 1 -} l_tec_clip_u_intersect_t; - -typedef enum { - L_TEC_VISIBLE_OFF = 0, L_TEC_VISIBLE_ON = 1 -} l_tec_clip_visible_t; - -typedef enum { - L_TEC_ACC_BACKSIDE_FALSE = 0, L_TEC_ACC_BACKSIDE_TRUE = 1 -} l_tec_clip_acc_backside_t; - -typedef enum { - L_TEC_ACC_LT_FALSE = 0, L_TEC_ACC_LT_TRUE = 1 -} l_tec_clip_acc_lt_t; - -typedef enum { - L_TEC_ACC_INSIDE_FALSE = 0, L_TEC_ACC_INSIDE_TRUE = 1 -} l_tec_clip_acc_inside_t; - -typedef enum { - L_TEC_ACC_GT_FALSE = 0, L_TEC_ACC_GT_TRUE = 1 -} l_tec_clip_acc_gt_t; - -typedef enum { - L_TEC_LT_FALSE = 0, L_TEC_LT_TRUE = 1 -} l_tec_clip_lt_t; - -typedef enum { - L_TEC_GT_FALSE = 0, L_TEC_GT_TRUE = 1 -} l_tec_clip_gt_t; - -typedef enum { - L_TEC_CLIP_OFF = 0, L_TEC_CLIP_ON = 1 -} l_tec_clip_enable_t; - -typedef struct l_tec_clip { /* big assumption here is compiler */ - /* assigns bit fields left to right */ - l_tec_clip_exception_t l_tec_clip_exception : 1; - l_tec_clip_hidden_t l_tec_clip_hidden : 1; - l_tec_clip_u_intersect_t l_tec_clip_intersect : 1; - l_tec_clip_visible_t l_tec_clip_visible : 1; - l_tec_unused_t l_tec_clip_unused1 : 3; - l_tec_clip_enable_t l_tec_clip_enable : 1; - - l_tec_clip_acc_backside_t l_tec_clip_acc_z_backside : 1; - l_tec_clip_acc_lt_t l_tec_clip_acc_z_lt_front : 1; - l_tec_clip_acc_inside_t l_tec_clip_acc_z_inside : 1; - l_tec_clip_acc_gt_t l_tec_clip_acc_z_gt_back : 1; - l_tec_clip_lt_t l_tec_clip_z_lt_front : 1; - l_tec_clip_gt_t l_tec_clip_z_gt_back : 1; - l_tec_clip_enable_t l_tec_clip_front : 1; - l_tec_clip_enable_t l_tec_clip_back : 1; - - l_tec_clip_acc_backside_t l_tec_clip_acc_y_backside : 1; - l_tec_clip_acc_lt_t l_tec_clip_acc_y_lt_bottom : 1; - l_tec_clip_acc_inside_t l_tec_clip_acc_y_inside : 1; - l_tec_clip_acc_gt_t l_tec_clip_acc_y_gt_top : 1; - l_tec_clip_lt_t l_tec_clip_y_lt_bottom : 1; - l_tec_clip_gt_t l_tec_clip_y_gt_top : 1; - l_tec_clip_enable_t l_tec_clip_bottom : 1; - l_tec_clip_enable_t l_tec_clip_top : 1; - - l_tec_clip_acc_backside_t l_tec_clip_acc_x_backside : 1; - l_tec_clip_acc_lt_t l_tec_clip_acc_x_lt_left : 1; - l_tec_clip_acc_inside_t l_tec_clip_acc_x_inside : 1; - l_tec_clip_acc_gt_t l_tec_clip_acc_x_gt_right : 1; - l_tec_clip_lt_t l_tec_clip_x_lt_left : 1; - l_tec_clip_gt_t l_tec_clip_x_gt_right : 1; - l_tec_clip_enable_t l_tec_clip_left : 1; - l_tec_clip_enable_t l_tec_clip_right : 1; -} l_tec_clip_t; - - -/* - * TEC VDC_MATRIX register bits. - */ - -typedef enum { - L_TEC_VDC_INT = 0, L_TEC_VDC_FIXED = 1, L_TEC_VDC_FLOAT = 2, - L_TEC_VDC_INTRNL0 = 4, L_TEC_VDC_INTRNL1 = 5 -}l_tec_vdc_type_t; - -typedef enum { - L_TEC_VDC_2D = 0, L_TEC_VDC_3D = 1 - }l_tec_vdc_k_t; - -typedef enum { - L_TEC_VDC_MUL_OFF = 0, L_TEC_VDC_MUL_ON = 1 - }l_tec_vdc_mul_t; - - -typedef struct l_tec_vdc { - l_tec_unused_t l_tec_vdc_unused1 : 16; /* NOT USED */ - l_tec_vdc_type_t l_tec_vdc_type : 3; /* reg. access type */ - l_tec_vdc_mul_t l_tec_vdc_mul : 1; /* enable VDC mult. */ - l_tec_unused_t l_tec_vdc_unused2 : 3; /* NOT USED */ - l_tec_vdc_k_t l_tec_vdc_k : 1; /* 2D/3D format */ - l_tec_unused_t l_tec_vdc_unused3 : 2; /* NOT USED */ - uint32_t l_tec_vdc_index : 6; /* matrix start data */ - /* register */ -} l_tec_vdc_t; - -/* - * TEC COMMAND register bits. - */ - -typedef enum { - L_TEC_CMD_M1 = 0, - L_TEC_CMD_M2 = 1, - L_TEC_CMD_M3 = 2, - L_TEC_CMD_M4 = 3 -}l_tec_cmd_m_t; - -typedef enum { - L_TEC_CMD_N1 = 0, - L_TEC_CMD_N2 = 1, - L_TEC_CMD_N3 = 2, - L_TEC_CMD_N4 = 3 -}l_tec_cmd_n_t; - -typedef enum { - L_TEC_CMD_I_POS = 0, - L_TEC_CMD_I_NEG = 1 -}l_tec_cmd_i_t; - -typedef struct l_tec_cmd { - l_tec_cmd_m_t l_tec_cmd_m : 2; /* matrix A columns */ - l_tec_cmd_n_t l_tec_cmd_n : 2; /* matrix B columns */ - l_tec_cmd_i_t l_tec_cmd_i11 : 1; /* identity diagonal sign */ - l_tec_cmd_i_t l_tec_cmd_i22 : 1; /* identity diagonal sign */ - l_tec_cmd_i_t l_tec_cmd_i33 : 1; /* identity diagonal sign */ - l_tec_cmd_i_t l_tec_cmd_i44 : 1; /* identity diagonal sign */ - l_tec_unused_t l_tec_cmd_unused1 : 2; /* NOT USED */ - uint32_t l_tec_cmd_Aindex : 6; /* A matrix start data reg. */ - l_tec_unused_t l_tec_cmd_unused2 : 2; /* NOT USED */ - uint32_t l_tec_cmd_Bindex : 6; /* B matrix start data reg. */ - l_tec_unused_t l_tec_cmd_unused3 : 2; /* NOT USED */ - uint32_t l_tec_cmd_Cindex : 6; /* C matrix start data reg. */ -} l_tec_cmd_t; - -/* - * TEC registers defined as a structure. - */ -struct tec { -#ifdef structures - struct l_tec_mv l_tec_mv; /* 0 */ - struct l_tec_clip l_tec_clip; /* 1 */ - struct l_tec_vdc l_tec_vdc; /* 2 */ - uint32_t l_tec_pad_3[4-3]; - struct l_tec_cmd l_tec_command1; /* 4 */ - struct l_tec_cmd l_tec_command2; /* 5 */ - struct l_tec_cmd l_tec_command3; /* 6 */ - struct l_tec_cmd l_tec_command4; /* 7 */ -#else - uint32_t l_tec_mv; /* 0 */ - uint32_t l_tec_clip; /* 1 */ - uint32_t l_tec_vdc; /* 2 */ - uint32_t l_tec_pad_3[4-3]; - uint32_t l_tec_command1; /* 4 */ - uint32_t l_tec_command2; /* 5 */ - uint32_t l_tec_command3; /* 6 */ - uint32_t l_tec_command4; /* 7 */ -#endif - uint32_t l_tec_pad_8[64-8]; - uint32_t l_tec_data00; /* 64 */ - uint32_t l_tec_data01; /* 65 */ - uint32_t l_tec_data02; /* 66 */ - uint32_t l_tec_data03; /* 67 */ - uint32_t l_tec_data04; /* 68 */ - uint32_t l_tec_data05; /* 69 */ - uint32_t l_tec_data06; /* 70 */ - uint32_t l_tec_data07; /* 71 */ - uint32_t l_tec_data08; /* 72 */ - uint32_t l_tec_data09; /* 73 */ - uint32_t l_tec_data10; /* 74 */ - uint32_t l_tec_data11; /* 75 */ - uint32_t l_tec_data12; /* 76 */ - uint32_t l_tec_data13; /* 77 */ - uint32_t l_tec_data14; /* 78 */ - uint32_t l_tec_data15; /* 79 */ - uint32_t l_tec_data16; /* 80 */ - uint32_t l_tec_data17; /* 81 */ - uint32_t l_tec_data18; /* 82 */ - uint32_t l_tec_data19; /* 83 */ - uint32_t l_tec_data20; /* 84 */ - uint32_t l_tec_data21; /* 85 */ - uint32_t l_tec_data22; /* 86 */ - uint32_t l_tec_data23; /* 87 */ - uint32_t l_tec_data24; /* 88 */ - uint32_t l_tec_data25; /* 89 */ - uint32_t l_tec_data26; /* 90 */ - uint32_t l_tec_data27; /* 91 */ - uint32_t l_tec_data28; /* 92 */ - uint32_t l_tec_data29; /* 93 */ - uint32_t l_tec_data30; /* 94 */ - uint32_t l_tec_data31; /* 95 */ - uint32_t l_tec_data32; /* 96 */ - uint32_t l_tec_data33; /* 97 */ - uint32_t l_tec_data34; /* 98 */ - uint32_t l_tec_data35; /* 99 */ - uint32_t l_tec_data36; /* 100 */ - uint32_t l_tec_data37; /* 101 */ - uint32_t l_tec_data38; /* 102 */ - uint32_t l_tec_data39; /* 103 */ - uint32_t l_tec_data40; /* 104 */ - uint32_t l_tec_data41; /* 105 */ - uint32_t l_tec_data42; /* 106 */ - uint32_t l_tec_data43; /* 107 */ - uint32_t l_tec_data44; /* 108 */ - uint32_t l_tec_data45; /* 109 */ - uint32_t l_tec_data46; /* 110 */ - uint32_t l_tec_data47; /* 111 */ - uint32_t l_tec_data48; /* 112 */ - uint32_t l_tec_data49; /* 113 */ - uint32_t l_tec_data50; /* 114 */ - uint32_t l_tec_data51; /* 115 */ - uint32_t l_tec_data52; /* 116 */ - uint32_t l_tec_data53; /* 117 */ - uint32_t l_tec_data54; /* 118 */ - uint32_t l_tec_data55; /* 119 */ - uint32_t l_tec_data56; /* 120 */ - uint32_t l_tec_data57; /* 121 */ - uint32_t l_tec_data58; /* 122 */ - uint32_t l_tec_data59; /* 123 */ - uint32_t l_tec_data60; /* 124 */ - uint32_t l_tec_data61; /* 125 */ - uint32_t l_tec_data62; /* 126 */ - uint32_t l_tec_data63; /* 127 */ - uint32_t l_tec_pad_128[512-128]; - uint32_t l_tec_ipointabsx; /* 512 */ - uint32_t l_tec_ipointabsy; /* 513 */ - uint32_t l_tec_ipointabsz; /* 514 */ - uint32_t l_tec_ipointabsw; /* 515 */ - uint32_t l_tec_ipointrelx; /* 516 */ - uint32_t l_tec_ipointrely; /* 517 */ - uint32_t l_tec_ipointrelz; /* 518 */ - uint32_t l_tec_ipointrelw; /* 519 */ - uint32_t l_tec_pad_520[528-520]; - uint32_t l_tec_ilineabsx; /* 528 */ - uint32_t l_tec_ilineabsy; /* 529 */ - uint32_t l_tec_ilineabsz; /* 530 */ - uint32_t l_tec_ilineabsw; /* 531 */ - uint32_t l_tec_ilinerelx; /* 532 */ - uint32_t l_tec_ilinerely; /* 533 */ - uint32_t l_tec_ilinerelz; /* 534 */ - uint32_t l_tec_ilinerelw; /* 535 */ - uint32_t l_tec_pad_536[544-536]; - uint32_t l_tec_itriabsx; /* 544 */ - uint32_t l_tec_itriabsy; /* 545 */ - uint32_t l_tec_itriabsz; /* 546 */ - uint32_t l_tec_itriabsw; /* 547 */ - uint32_t l_tec_itrirelx; /* 548 */ - uint32_t l_tec_itrirely; /* 549 */ - uint32_t l_tec_itrirelz; /* 550 */ - uint32_t l_tec_itrirelw; /* 551 */ - uint32_t l_tec_pad_552[560-552]; - uint32_t l_tec_iquadabsx; /* 560 */ - uint32_t l_tec_iquadabsy; /* 561 */ - uint32_t l_tec_iquadabsz; /* 562 */ - uint32_t l_tec_iquadabsw; /* 563 */ - uint32_t l_tec_iquadrelx; /* 564 */ - uint32_t l_tec_iquadrely; /* 565 */ - uint32_t l_tec_iquadrelz; /* 566 */ - uint32_t l_tec_iquadrelw; /* 567 */ - uint32_t l_tec_pad_568[576-568]; - uint32_t l_tec_irectabsx; /* 576 */ - uint32_t l_tec_irectabsy; /* 577 */ - uint32_t l_tec_irectabsz; /* 578 */ - uint32_t l_tec_irectabsw; /* 579 */ - uint32_t l_tec_irectrelx; /* 580 */ - uint32_t l_tec_irectrely; /* 581 */ - uint32_t l_tec_irectrelz; /* 582 */ - uint32_t l_tec_irectrelw; /* 583 */ - uint32_t l_tec_pad_584[640-584]; - uint32_t l_tec_bpointabsx; /* 640 */ - uint32_t l_tec_bpointabsy; /* 641 */ - uint32_t l_tec_bpointabsz; /* 642 */ - uint32_t l_tec_bpointabsw; /* 643 */ - uint32_t l_tec_bpointrelx; /* 644 */ - uint32_t l_tec_bpointrely; /* 645 */ - uint32_t l_tec_bpointrelz; /* 646 */ - uint32_t l_tec_bpointrelw; /* 647 */ - uint32_t l_tec_pad_648[656-648]; - uint32_t l_tec_blineabsx; /* 656 */ - uint32_t l_tec_blineabsy; /* 657 */ - uint32_t l_tec_blineabsz; /* 658 */ - uint32_t l_tec_blineabsw; /* 659 */ - uint32_t l_tec_blinerelx; /* 660 */ - uint32_t l_tec_blinerely; /* 661 */ - uint32_t l_tec_blinerelz; /* 662 */ - uint32_t l_tec_blinerelw; /* 663 */ - uint32_t l_tec_pad_664[672-664]; - uint32_t l_tec_btriabsx; /* 672 */ - uint32_t l_tec_btriabsy; /* 673 */ - uint32_t l_tec_btriabsz; /* 674 */ - uint32_t l_tec_btriabsw; /* 675 */ - uint32_t l_tec_btrirelx; /* 676 */ - uint32_t l_tec_btrirely; /* 677 */ - uint32_t l_tec_btrirelz; /* 678 */ - uint32_t l_tec_btrirelw; /* 679 */ - uint32_t l_tec_pad_680[688-680]; - uint32_t l_tec_bquadabsx; /* 688 */ - uint32_t l_tec_bquadabsy; /* 689 */ - uint32_t l_tec_bquadabsz; /* 690 */ - uint32_t l_tec_bquadabsw; /* 691 */ - uint32_t l_tec_bquadrelx; /* 692 */ - uint32_t l_tec_bquadrely; /* 693 */ - uint32_t l_tec_bquadrelz; /* 694 */ - uint32_t l_tec_bquadrelw; /* 695 */ - uint32_t l_tec_pad_696[704-696]; - uint32_t l_tec_brectabsx; /* 704 */ - uint32_t l_tec_brectabsy; /* 705 */ - uint32_t l_tec_brectabsz; /* 706 */ - uint32_t l_tec_brectabsw; /* 707 */ - uint32_t l_tec_brectrelx; /* 708 */ - uint32_t l_tec_brectrely; /* 709 */ - uint32_t l_tec_brectrelz; /* 710 */ - uint32_t l_tec_brectrelw; /* 711 */ - uint32_t l_tec_pad_712[768-712]; - uint32_t l_tec_fpointabsx; /* 768 */ - uint32_t l_tec_fpointabsy; /* 769 */ - uint32_t l_tec_fpointabsz; /* 770 */ - uint32_t l_tec_fpointabsw; /* 771 */ - uint32_t l_tec_fpointrelx; /* 772 */ - uint32_t l_tec_fpointrely; /* 773 */ - uint32_t l_tec_fpointrelz; /* 774 */ - uint32_t l_tec_fpointrelw; /* 775 */ - uint32_t l_tec_pad_776[784-776]; - uint32_t l_tec_flineabsx; /* 784 */ - uint32_t l_tec_flineabsy; /* 785 */ - uint32_t l_tec_flineabsz; /* 786 */ - uint32_t l_tec_flineabsw; /* 787 */ - uint32_t l_tec_flinerelx; /* 788 */ - uint32_t l_tec_flinerely; /* 789 */ - uint32_t l_tec_flinerelz; /* 790 */ - uint32_t l_tec_flinerelw; /* 791 */ - uint32_t l_tec_pad_792[800-792]; - uint32_t l_tec_ftriabsx; /* 800 */ - uint32_t l_tec_ftriabsy; /* 801 */ - uint32_t l_tec_ftriabsz; /* 802 */ - uint32_t l_tec_ftriabsw; /* 803 */ - uint32_t l_tec_ftrirelx; /* 804 */ - uint32_t l_tec_ftrirely; /* 805 */ - uint32_t l_tec_ftrirelz; /* 806 */ - uint32_t l_tec_ftrirelw; /* 807 */ - uint32_t l_tec_pad_808[816-808]; - uint32_t l_tec_fquadabsx; /* 816 */ - uint32_t l_tec_fquadabsy; /* 817 */ - uint32_t l_tec_fquadabsz; /* 818 */ - uint32_t l_tec_fquadabsw; /* 819 */ - uint32_t l_tec_fquadrelx; /* 820 */ - uint32_t l_tec_fquadrely; /* 821 */ - uint32_t l_tec_fquadrelz; /* 822 */ - uint32_t l_tec_fquadrelw; /* 823 */ - uint32_t l_tec_pad_824[832-824]; - uint32_t l_tec_frectabsx; /* 832 */ - uint32_t l_tec_frectabsy; /* 833 */ - uint32_t l_tec_frectabsz; /* 834 */ - uint32_t l_tec_frectabsw; /* 835 */ - uint32_t l_tec_frectrelx; /* 836 */ - uint32_t l_tec_frectrely; /* 837 */ - uint32_t l_tec_frectrelz; /* 838 */ - uint32_t l_tec_frectrelw; /* 839 */ -}; - -#define NUM_TEC_REGS (sizeof (struct l_tec)/sizeof (uint_t)) - -#ifdef __cplusplus -} -#endif - -#endif /* _SYS_CG6TEC_H */ diff --git a/usr/src/uts/sun/sys/cg6thc.h b/usr/src/uts/sun/sys/cg6thc.h deleted file mode 100644 index cb8be0b158..0000000000 --- a/usr/src/uts/sun/sys/cg6thc.h +++ /dev/null @@ -1,334 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 1989, Sun Microsystems, Inc. - */ - -#ifndef _SYS_CG6THC_H -#define _SYS_CG6THC_H - -#pragma ident "%Z%%M% %I% %E% SMI" - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * TEC Hardware Configuration registers. - * - * Hardware register offsets from base address. These offsets are - * intended to be added to a pointer-to-integer whose value is the - * base address of the CG6 memory mapped register area. - */ - -/* hardware configuration registers */ - -#define L_THC_HCHS (0x800 / sizeof (uint32_t)) -#define L_THC_HCHSDVB (0x804 / sizeof (uint32_t)) -#define L_THC_HCHD (0x808 / sizeof (uint32_t)) -#define L_THC_HCVS (0x80C / sizeof (uint32_t)) -#define L_THC_HCVD (0x810 / sizeof (uint32_t)) -#define L_THC_HCREFRESH (0x814 / sizeof (uint32_t)) -#define L_THC_HCMISC (0x818 / sizeof (uint32_t)) - -#define THC_HCMISC_REV_SHIFT 16 -#define THC_HCMISC_REV_MASK 15 -#define THC_HCMISC_RESET 0x1000 -#define THC_HCMISC_VIDEO 0x0400 -#define THC_HCMISC_SYNC 0x0200 -#define THC_HCMISC_VSYNC 0x0100 -#define THC_HCMISC_SYNCEN 0x0080 -#define THC_HCMISC_CURSOR_RES 0x0040 -#define THC_HCMISC_INTEN 0x0020 -#define THC_HCMISC_INT 0x0010 - -#define THC_HCMISC_INIT 0x009f -#define THC_HCMISC_CLEAR_VBLANK_IRQ 0x008f - -#define thc_set_video(thc, on) \ - ((thc)->l_thc_hcmisc = \ - (thc)->l_thc_hcmisc & ~THC_HCMISC_VIDEO | \ - ((on) ? THC_HCMISC_VIDEO : 0)) - -#define thc_get_video(thc) \ - ((thc)->l_thc_hcmisc & THC_HCMISC_VIDEO) - -#define thc_int_enable(thc) \ - ((thc)->l_thc_hcmisc |= THC_HCMISC_INTEN) - -#define thc_int_disable(thc) \ - ((thc)->l_thc_hcmisc = \ - (thc)->l_thc_hcmisc & ~THC_HCMISC_INTEN | THC_HCMISC_INT) - -#define thc_int_pending(thc) \ - ((thc)->l_thc_hcmisc & THC_HCMISC_INT) - -/* cursor address register */ -#define L_THC_ADDRESS (0x8FC / sizeof (uint32_t)) - -/* cursor data registers, plane A */ -#define L_THC_CURSORA00 (0x900 / sizeof (uint32_t)) -#define L_THC_CURSORA01 (0x904 / sizeof (uint32_t)) -#define L_THC_CURSORA02 (0x908 / sizeof (uint32_t)) -#define L_THC_CURSORA03 (0x90C / sizeof (uint32_t)) -#define L_THC_CURSORA04 (0x910 / sizeof (uint32_t)) -#define L_THC_CURSORA05 (0x914 / sizeof (uint32_t)) -#define L_THC_CURSORA06 (0x918 / sizeof (uint32_t)) -#define L_THC_CURSORA07 (0x91C / sizeof (uint32_t)) -#define L_THC_CURSORA08 (0x920 / sizeof (uint32_t)) -#define L_THC_CURSORA09 (0x924 / sizeof (uint32_t)) -#define L_THC_CURSORA10 (0x928 / sizeof (uint32_t)) -#define L_THC_CURSORA11 (0x92C / sizeof (uint32_t)) -#define L_THC_CURSORA12 (0x930 / sizeof (uint32_t)) -#define L_THC_CURSORA13 (0x934 / sizeof (uint32_t)) -#define L_THC_CURSORA14 (0x938 / sizeof (uint32_t)) -#define L_THC_CURSORA15 (0x93C / sizeof (uint32_t)) -#define L_THC_CURSORA16 (0x940 / sizeof (uint32_t)) -#define L_THC_CURSORA17 (0x944 / sizeof (uint32_t)) -#define L_THC_CURSORA18 (0x948 / sizeof (uint32_t)) -#define L_THC_CURSORA19 (0x94C / sizeof (uint32_t)) -#define L_THC_CURSORA20 (0x950 / sizeof (uint32_t)) -#define L_THC_CURSORA21 (0x954 / sizeof (uint32_t)) -#define L_THC_CURSORA22 (0x958 / sizeof (uint32_t)) -#define L_THC_CURSORA23 (0x95C / sizeof (uint32_t)) -#define L_THC_CURSORA24 (0x960 / sizeof (uint32_t)) -#define L_THC_CURSORA25 (0x964 / sizeof (uint32_t)) -#define L_THC_CURSORA26 (0x968 / sizeof (uint32_t)) -#define L_THC_CURSORA27 (0x96C / sizeof (uint32_t)) -#define L_THC_CURSORA28 (0x970 / sizeof (uint32_t)) -#define L_THC_CURSORA29 (0x974 / sizeof (uint32_t)) -#define L_THC_CURSORA30 (0x978 / sizeof (uint32_t)) -#define L_THC_CURSORA31 (0x97C / sizeof (uint32_t)) - -/* cursor data registers, plane B */ -#define L_THC_CURSORB00 (0x980 / sizeof (uint32_t)) -#define L_THC_CURSORB01 (0x984 / sizeof (uint32_t)) -#define L_THC_CURSORB02 (0x988 / sizeof (uint32_t)) -#define L_THC_CURSORB03 (0x98C / sizeof (uint32_t)) -#define L_THC_CURSORB04 (0x990 / sizeof (uint32_t)) -#define L_THC_CURSORB05 (0x994 / sizeof (uint32_t)) -#define L_THC_CURSORB06 (0x998 / sizeof (uint32_t)) -#define L_THC_CURSORB07 (0x99C / sizeof (uint32_t)) -#define L_THC_CURSORB08 (0x9A0 / sizeof (uint32_t)) -#define L_THC_CURSORB09 (0x9A4 / sizeof (uint32_t)) -#define L_THC_CURSORB10 (0x9A8 / sizeof (uint32_t)) -#define L_THC_CURSORB11 (0x9AC / sizeof (uint32_t)) -#define L_THC_CURSORB12 (0x9B0 / sizeof (uint32_t)) -#define L_THC_CURSORB13 (0x9B4 / sizeof (uint32_t)) -#define L_THC_CURSORB14 (0x9B8 / sizeof (uint32_t)) -#define L_THC_CURSORB15 (0x9BC / sizeof (uint32_t)) -#define L_THC_CURSORB16 (0x9C0 / sizeof (uint32_t)) -#define L_THC_CURSORB17 (0x9C4 / sizeof (uint32_t)) -#define L_THC_CURSORB18 (0x9C8 / sizeof (uint32_t)) -#define L_THC_CURSORB19 (0x9CC / sizeof (uint32_t)) -#define L_THC_CURSORB20 (0x9D0 / sizeof (uint32_t)) -#define L_THC_CURSORB21 (0x9D4 / sizeof (uint32_t)) -#define L_THC_CURSORB22 (0x9D8 / sizeof (uint32_t)) -#define L_THC_CURSORB23 (0x9DC / sizeof (uint32_t)) -#define L_THC_CURSORB24 (0x9E0 / sizeof (uint32_t)) -#define L_THC_CURSORB25 (0x9E4 / sizeof (uint32_t)) -#define L_THC_CURSORB26 (0x9E8 / sizeof (uint32_t)) -#define L_THC_CURSORB27 (0x9EC / sizeof (uint32_t)) -#define L_THC_CURSORB28 (0x9F0 / sizeof (uint32_t)) -#define L_THC_CURSORB29 (0x9F4 / sizeof (uint32_t)) -#define L_THC_CURSORB30 (0x9F8 / sizeof (uint32_t)) -#define L_THC_CURSORB31 (0x9FC / sizeof (uint32_t)) - -/* - * THC Cursor ADDRESS register bits. - */ - -struct l_thc_cursor { - uint32_t l_thc_cursor_x : 16; /* X co-ordinate */ - uint32_t l_thc_cursor_y : 16; /* Y co-ordinate */ -}; - -/* - * THC Video Timing registers bits. - */ - -struct l_thc_hchs { - uint32_t : 9; /* not used */ - uint32_t l_thc_hchs_hss : 7; /* hor. sync start */ - uint32_t : 9; /* not used */ - uint32_t l_thc_hchs_hse : 7; /* hor. sync end */ -}; - -struct l_thc_hchsdvs { - uint32_t : 9; /* not used */ - uint32_t l_thc_hchsdvs_hss : 7; /* hor. sync end DVS */ - uint32_t : 5; /* not used */ - uint32_t l_thc_hchsdvs_hse : 11; /* current vert. line */ -}; - -struct l_thc_hchd { - uint32_t : 9; /* not used */ - uint32_t l_thc_hchd_hds : 7; /* hor. display start */ - uint32_t : 9; /* not used */ - uint32_t l_thc_hchd_hde : 7; /* hor. display end */ -}; - -struct l_thc_hcvs { - uint32_t : 5; /* not used */ - uint32_t l_thc_hcvs_vss : 11; /* vert. sync start */ - uint32_t : 5; /* not used */ - uint32_t l_thc_hcvs_hse : 11; /* vert. sync end */ -}; - -struct l_thc_hcvd { - uint32_t : 5; /* not used */ - uint32_t l_thc_hcvd_vds : 11; /* vert. display start */ - uint32_t : 5; /* not used */ - uint32_t l_thc_hcvd_hde : 11; /* vert. display end */ -}; - -struct l_thc_hcr { - uint32_t : 21; /* not used */ - uint32_t l_thc_hcr_clk : 11; /* refresh counter */ -}; - -/* - * THC HCMISC register bits. - */ - -typedef enum { - L_THC_HCMISC_VID_BLANK, L_THC_HCMISC_VID_DISPLAY -} l_thc_hcmisc_vid_t; - -typedef enum { - L_THC_HCMISC_INTR_IGNORE, L_THC_HCMISC_INTR_CLEAR, - L_THC_HCMISC_INTR_SET -} l_thc_hcmisc_intr_t; - -struct l_thc_hcmisc { - uint32_t : 12; /* unused */ - uint32_t l_thc_hcmisc_rev : 4; /* chip revision */ - uint32_t : 3; /* unused */ - uint32_t l_thc_hcmisc_reset : 1; /* reset */ - uint32_t : 1; /* unused */ - l_thc_hcmisc_vid_t l_thc_hcmisc_vid : 1; /* enable video */ - uint32_t l_thc_hcmisc_sync : 1; /* sync */ - uint32_t l_thc_hcmisc_vsync : 1; /* vsync */ - uint32_t l_thc_hcmisc_ensync : 1; /* enable sync */ - uint32_t l_thc_hcmisc_cures : 1; /* cursor resolution */ - l_thc_hcmisc_intr_t l_thc_hcmisc_intr : 2; /* enable interrupt */ - uint32_t l_thc_hcmisc_cycles : 4; /* cycles before xfer */ -}; - -/* - * define THC registers as a structure. - */ - -struct thc { - uint32_t l_thc_pad_0[512-0]; -#ifdef structures - struct l_thc_hchs l_thc_hchs; /* 512 */ - struct l_thc_hchsdvs l_thc_hchsdvs; /* 513 */ - struct l_thc_hchd l_thc_hchd; /* 514 */ - struct l_thc_hcvs l_thc_hcvs; /* 515 */ - struct l_thc_hcvd l_thc_hcvd; /* 516 */ - struct l_thc_hcr l_thc_hcr; /* 517 */ - struct l_thc_hcmisc l_thc_hcmisc; /* 518 */ - uint32_t l_thc_pad_519[575-519]; - struct l_thc_cursor l_thc_cursor; /* 575 */ -#else - uint32_t l_thc_hchs; /* 512 */ - uint32_t l_thc_hchsdvs; /* 513 */ - uint32_t l_thc_hchd; /* 514 */ - uint32_t l_thc_hcvs; /* 515 */ - uint32_t l_thc_hcvd; /* 516 */ - uint32_t l_thc_hcr; /* 517 */ - uint32_t l_thc_hcmisc; /* 518 */ - uint32_t l_thc_pad_519[575-519]; - uint32_t l_thc_cursor; /* 575 */ -#endif - uint32_t l_thc_cursora00; /* 576 */ - uint32_t l_thc_cursora01; /* 577 */ - uint32_t l_thc_cursora02; /* 578 */ - uint32_t l_thc_cursora03; /* 579 */ - uint32_t l_thc_cursora04; /* 580 */ - uint32_t l_thc_cursora05; /* 581 */ - uint32_t l_thc_cursora06; /* 582 */ - uint32_t l_thc_cursora07; /* 583 */ - uint32_t l_thc_cursora08; /* 584 */ - uint32_t l_thc_cursora09; /* 585 */ - uint32_t l_thc_cursora10; /* 586 */ - uint32_t l_thc_cursora11; /* 587 */ - uint32_t l_thc_cursora12; /* 588 */ - uint32_t l_thc_cursora13; /* 589 */ - uint32_t l_thc_cursora14; /* 590 */ - uint32_t l_thc_cursora15; /* 591 */ - uint32_t l_thc_cursora16; /* 592 */ - uint32_t l_thc_cursora17; /* 593 */ - uint32_t l_thc_cursora18; /* 594 */ - uint32_t l_thc_cursora19; /* 595 */ - uint32_t l_thc_cursora20; /* 596 */ - uint32_t l_thc_cursora21; /* 597 */ - uint32_t l_thc_cursora22; /* 598 */ - uint32_t l_thc_cursora23; /* 599 */ - uint32_t l_thc_cursora24; /* 600 */ - uint32_t l_thc_cursora25; /* 601 */ - uint32_t l_thc_cursora26; /* 602 */ - uint32_t l_thc_cursora27; /* 603 */ - uint32_t l_thc_cursora28; /* 604 */ - uint32_t l_thc_cursora29; /* 605 */ - uint32_t l_thc_cursora30; /* 606 */ - uint32_t l_thc_cursora31; /* 607 */ - uint32_t l_thc_cursorb00; /* 608 */ - uint32_t l_thc_cursorb01; /* 609 */ - uint32_t l_thc_cursorb02; /* 610 */ - uint32_t l_thc_cursorb03; /* 611 */ - uint32_t l_thc_cursorb04; /* 612 */ - uint32_t l_thc_cursorb05; /* 613 */ - uint32_t l_thc_cursorb06; /* 614 */ - uint32_t l_thc_cursorb07; /* 615 */ - uint32_t l_thc_cursorb08; /* 616 */ - uint32_t l_thc_cursorb09; /* 617 */ - uint32_t l_thc_cursorb10; /* 618 */ - uint32_t l_thc_cursorb11; /* 619 */ - uint32_t l_thc_cursorb12; /* 620 */ - uint32_t l_thc_cursorb13; /* 621 */ - uint32_t l_thc_cursorb14; /* 622 */ - uint32_t l_thc_cursorb15; /* 623 */ - uint32_t l_thc_cursorb16; /* 624 */ - uint32_t l_thc_cursorb17; /* 625 */ - uint32_t l_thc_cursorb18; /* 626 */ - uint32_t l_thc_cursorb19; /* 627 */ - uint32_t l_thc_cursorb20; /* 628 */ - uint32_t l_thc_cursorb21; /* 629 */ - uint32_t l_thc_cursorb22; /* 630 */ - uint32_t l_thc_cursorb23; /* 631 */ - uint32_t l_thc_cursorb24; /* 632 */ - uint32_t l_thc_cursorb25; /* 633 */ - uint32_t l_thc_cursorb26; /* 634 */ - uint32_t l_thc_cursorb27; /* 635 */ - uint32_t l_thc_cursorb28; /* 636 */ - uint32_t l_thc_cursorb29; /* 637 */ - uint32_t l_thc_cursorb30; /* 638 */ - uint32_t l_thc_cursorb31; /* 639 */ -}; - -#ifdef __cplusplus -} -#endif - -#endif /* _SYS_CG6THC_H */ diff --git a/usr/src/uts/sun/sys/cg6var.h b/usr/src/uts/sun/sys/cg6var.h deleted file mode 100644 index 7bc3bd7c56..0000000000 --- a/usr/src/uts/sun/sys/cg6var.h +++ /dev/null @@ -1,167 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright (c) 1988-1989,1997-1998 by Sun Microsystems, Inc. - * All rights reserved. - */ - -#ifndef _SYS_CG6VAR_H -#define _SYS_CG6VAR_H - -#pragma ident "%Z%%M% %I% %E% SMI" /* SunOS-4.1 1.8 */ - -#ifdef __cplusplus -extern "C" { -#endif - -#ifndef FBC_REV0 -#define FBC_REV0 1 /* include FBC0 support if set */ -#endif - -#include -#include -#include - -#define CG6_DEPTH 8 - -#include -#include - -/* FBIOSATTR device specific array indices */ -#define FB_ATTR_CG6_SETOWNER_CMD 0 -#define FB_ATTR_CG6_SETOWNER_PID 1 - -#ifndef _KERNEL - -/* pixrect private data */ -struct cg6pr { - struct mprp_data mprp; /* memory pixrect simulator */ - int fd; /* device file descriptor */ - struct pr_size cg6_size; /* screen size */ - struct fbc *cg6_fbc; /* FBC base */ - struct tec *cg6_tec; /* TEC base */ -}; - -/* pixrect ops vector */ -extern struct pixrectops cg6_ops; - -Pixrect *cg6_make(); - -/* int cg6_rop(); */ -int cg6_stencil(); -int cg6_batchrop(); -int cg6_destroy(); -int cg6_get(); -int cg6_put(); -int cg6_vector(); -Pixrect *cg6_region(); -/* int cg6_putcolormap(); */ -int cg6_getcolormap(); -int cg6_putattributes(); -int cg6_getattributes(); - -/* macros */ - -#define cg6_d(pr) ((struct cg6pr *)(pr)->pr_data) - - - -#define cg6_waitidle(fbc) \ - do {; } while ((fbc)->l_fbc_status & L_FBC_BUSY) - -#define cg6_setfontxy(fbc, x0, x1, y) \ - ((fbc)->l_fbc_x0 = (x0), \ - (fbc)->l_fbc_x1 = (x1), \ - (fbc)->l_fbc_y0 = (y)) - -#define cg6_setinx(fbc, x, y) \ - ((fbc)->l_fbc_autoincx = (x), \ - (fbc)->l_fbc_autoincy = (y)) - -/* - * return draw status, if full loop until registers available before returning. - */ -#define cg6_draw_done(fbc, r) \ - do \ - (r) = (int)(fbc)->l_fbc_drawstatus; \ - while ((int)(r) < 0 && (r & L_FBC_FULL)) - -/* - * set clip area. - */ -#define cg6_clip(fbc, x_min, y_min, x_max, y_max) \ - ((fbc)->l_fbc_clipminx = (x_min), \ - (fbc)->l_fbc_clipminy = (y_min), \ - (fbc)->l_fbc_clipmaxx = (x_max), \ - (fbc)->l_fbc_clipmaxy = (y_max)) - -#define cg6_color_mode(fbc, mode) \ - (* ((uint32_t *)&(fbc)->l_fbc_misc) = \ - (uint32_t)L_FBC_MISC_BLIT_NOSRC << 20 | \ - ((uint32_t)(mode) & 3) << 17 | /* data */ \ - (uint32_t)L_FBC_MISC_DRAW_RENDER << 15) - -extern uint_t cg6_rop_table[]; - -#define cg6_setregs(fbc, x, y, rop, planemask, fcolor, patt, polyg) _STMT(\ - (fbc)->l_fbc_rasteroffx = (x); \ - (fbc)->l_fbc_rasteroffy = (y); \ - (fbc)->l_fbc_fcolor = (fcolor); \ - cg6_waitidle(fbc); \ - (fbc)->l_fbc_status = 0; \ - * ((uint32_t *)&(fbc)->l_fbc_rasterop) = \ - ((uint32_t)(patt) & 3) << 26 | \ - ((uint32_t)(polyg) & 3) << 24 | \ - (uint32_t)L_FBC_RASTEROP_ATTR_SUPP << 22 | \ - (uint32_t)L_FBC_RASTEROP_RAST_BOOL << 17 | \ - (uint32_t)cg6_rop_table[(rop)]; \ - (fbc)->l_fbc_planemask = (planemask); \ - /* can set this before idle in FBC1 */ \ - (fbc)->l_fbc_clipcheck = 0; \ -) - -/* - * FBC0 workarounds - */ -#if FBC_REV0 -int cg6_vector0(); - -#define fbc_rev0(fbc) ((((char *)(fbc))[1] & 0xf0) == 0) - -#define cg6_draw_done0(fbc, x0, x1, r) \ - if (((fbc)->l_fbc_status & L_FBC_DRAW_INTERSECT) && \ - ((x0) < 0 || (x1) < 0)) \ - (r) = L_FBC_DRAW_EXCEPTION; \ - else cg6_draw_done((fbc), (r)) -#else /* FBC_REV0 */ -#define fbc_rev0(fbc) (0) -#define cg6_draw_done0(fbc, x0, x1, r) \ - cg6_draw_done((fbc), (r)) -#endif /* FBC_REV0 */ - -#endif /* _KERNEL */ - -#ifdef __cplusplus -} -#endif - -#endif /* _SYS_CG6VAR_H */ diff --git a/usr/src/uts/sun/sys/memvar.h b/usr/src/uts/sun/sys/memvar.h deleted file mode 100644 index 5ee93c6811..0000000000 --- a/usr/src/uts/sun/sys/memvar.h +++ /dev/null @@ -1,191 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 1986-2003 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -#ifndef _SYS_MEMVAR_H -#define _SYS_MEMVAR_H - -#pragma ident "%Z%%M% %I% %E% SMI" /* SunOS4.1.2 1.45 */ - -#ifdef __cplusplus -extern "C" { -#endif - -/* - * A memory pixrect is a special type of pixrect. Its image resides in - * memory, in a publicly known format permitting more direct access to the - * image than possible with the general pixrectops. - * - * In the memory pixrect the image is stored in consecutive memory locations, - * across the row from left to right, and then from top to bottom. Each row - * is padded to a 16-bit or 32-bit boundary (for details refer to the Pixrect - * Reference Manual). - * - * The depth of a pixel is the number of bits required to represent it. - * Pixels are placed in consecutive fields of width the depth of each pixel, - * with placement being independent of word or byte boundaries. - */ -struct mpr_data { - int md_linebytes; /* number of bytes from one line to next */ - short *md_image; /* word address */ - struct pr_pos md_offset; - short md_primary; - short md_flags; /* Flag bits, see below */ -}; - -/* pixrect data for memory pixrect with plane mask (MP_PLANEMASK set) */ -struct mprp_data { - struct mpr_data mpr; - int planes; -}; - -#define mpr_d(pr) ((struct mpr_data *)(pr)->pr_data) -#define mprp_d(pr) ((struct mprp_data *)(pr)->pr_data) - -/* md_flags bits definitions */ - -#define MP_REVERSEVIDEO 1 /* Pixrect is reverse video */ - /* (should only be set if pr_depth = 1) */ -#define MP_DISPLAY 2 /* Pixrect is a frame buffer device */ -#define MP_PLANEMASK 4 /* Pixrect has a plane mask */ - /* (should only be set if pr_depth > 1) */ -#if defined(__i386) -#define MP_I386 8 /* Pixrect is for 386 architecture */ -#define MP_STATIC 16 /* Pixrect is a static pixrect */ -#endif -#define MP_FONT 32 /* Pixrect is a part of a Pixfont */ - /* (hint to pr_batchrop) */ - -/* - * Each line (row) of the pixrect is padded to be a multiple - * of this many bits - */ -#define MPR_LINEBITPAD 16 - -#define mpr_linebytes(x, depth) \ - (((pr_product(x, depth) + (MPR_LINEBITPAD-1)) >> 3) &~ 1) -#define mpr_prlinebytes(mpr) \ - mpr_linebytes((mpr)->pr_size.x, (mpr)->pr_depth) -#define mpr_mdlinebytes(mpr) \ - (mpr_d(mpr)->md_linebytes) - -#define mprd_addr(mprd, xo, yo) \ - ((short *)(\ - (int)(mprd)->md_image \ - + pr_product((mprd)->md_linebytes, (mprd)->md_offset.y+(yo)) \ - + (((mprd)->md_offset.x+(xo)) >> 3) &~ 1)) - -#define mprd8_addr(mprd, xo, yo, d) \ - ((uchar_t *)(\ - (int)(mprd)->md_image \ - + pr_product((mprd)->md_linebytes, (mprd)->md_offset.y+(yo)) \ - + (pr_product((mprd)->md_offset.x+(xo), (d)) >> 3))) - -#define mprd_skew(mprd, xo, yo) \ - (((mprd)->md_offset.x + (xo)) & 15) - -#define mprs_addr(mprs) _mprs_addr((struct pr_prpos *)&(mprs)) -#define mprs8_addr(mprs) _mprs8_addr((struct pr_prpos *)&(mprs)) -#define mprs_skew(mprs) _mprs_skew((struct pr_prpos *)&(mprs)) - -#if !defined __lint || !defined _KERNEL || defined(sun2) -short *_mprs_addr(); -uchar_t *_mprs8_addr(); -int _mprs_skew(); -#endif - -/* - * Static pixrects. A pixrect may be created at compile time using the - * mpr_static macro as part of the static declarations of a program. Thus - * mpr_static(cursor, 16, 16, 1, rawcursordata); - * will declare and initialize (using rawcursordata) the storage needed - * for a pixrect that may be referred to as 'cursor' subsequently in the - * same file, or as &cursor if a pointer to that pixrect is called for rather - * than the pixrect itself. - */ - -/* - * First a pair of utility macros that allow concatenation in a fashion that - * won't annoy lint (These belong in a standard header file!): - */ -#if defined(__STDC__) && !defined(__LIBCPP__) - -#ifndef CAT -#define CAT(a, b) a##b -#endif - -#else /* __STDC__ */ - -#ifndef CAT -#undef IDENT -#define IDENT(x) x -#define CAT(a, b) IDENT(a)b -#endif - -#endif /* __STDC__ */ - -#define mpr_static(name, w, h, d, image) \ - struct mpr_data CAT(name, _data) = \ - {mpr_linebytes(w, d), (short *)(image), {0, 0}, 0, 0}; \ - Pixrect name = {&mem_ops, w, h, d, (caddr_t)&CAT(name, _data)} - -/* static pixrect with variables declared "static" */ -#define mpr_static_static(name, w, h, d, image) \ - static struct mpr_data CAT(name, _data) = \ - {mpr_linebytes(w, d), (short *)(image), {0, 0}, 0, 0}; \ - static Pixrect name = {&mem_ops, w, h, d, (caddr_t)&CAT(name, _data)} - -/* - * During rop calls need to determine if dst/src is something that - * mem_rop() can handle. Use the following macro to find out. - */ -#define MP_NOTMPR(pr) ((pr)->pr_ops->pro_rop != mem_rop) - -extern struct pixrectops mem_ops; - -int mem_rop(); -#ifndef _KERNEL -int mem_stencil(); -int mem_batchrop(); -Pixrect *mem_create(); /* General mpr create routine */ -Pixrect *mem_point(); /* Even more general mpr create */ -int mem_destroy(); -int mem_get(); -int mem_put(); -int mem_vector(); -Pixrect *mem_region(); -#endif /* _KERNEL */ -int mem_putcolormap(); -int mem_putattributes(); -#ifndef _KERNEL -int mem_getcolormap(); -int mem_getattributes(); -#endif /* _KERNEL */ - -#ifdef __cplusplus -} -#endif - -#endif /* _SYS_MEMVAR_H */ diff --git a/usr/src/uts/sun/sys/pr_impl_util.h b/usr/src/uts/sun/sys/pr_impl_util.h deleted file mode 100644 index 95609772df..0000000000 --- a/usr/src/uts/sun/sys/pr_impl_util.h +++ /dev/null @@ -1,224 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms. - */ - -/* - * Pixrect implementation utilities - */ - -#ifndef _SYS_PR_IMPL_UTIL_H -#define _SYS_PR_IMPL_UTIL_H - -#pragma ident "%Z%%M% %I% %E% SMI" /* SunOS 1.10 */ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Reiser cpp concatenation macros (which don't work in ANSI-C) */ -#if defined(__STDC__) && !defined(__LIBCPP__) - -#ifndef _CAT -#define _CAT(a, b) a##b -#endif - -#else /* __STDC__ */ - -#ifndef _CAT -#undef _IDENT -#define _IDENT(x) x -#define _CAT(a, b) _IDENT(a)b -#endif - -#endif /* __STDC__ */ - -/* code selection macros */ -#define IFTRUE(a, b) a -#define IFFALSE(a, b) b - -/* and together multiple options */ -#define IFAND IFAND2 -#define IFAND2(opt1, opt2, a, b) opt1(opt2(a, b), b) -#define IFAND3(opt1, opt2, opt3, a, b) opt1(opt2(opt3(a, b), b), b) -#define IFAND4(opt1, opt2, opt3, opt4, a, b) \ - opt1(opt2(opt3(opt4(a, b), b), b), b) -#define IFAND5(opt1, opt2, opt3, opt4, opt5, a, b) \ - opt1(opt2(opt3(opt4(opt5(a, b), b), b), b), b) -#define IFAND6(opt1, opt2, opt3, opt4, opt5, opt6, a, b) \ - opt1(opt2(opt3(opt4(opt5(opt6(a, b), b), b), b), b), b) - -#ifdef _KERNEL -#define IFKERNEL IFTRUE -#else -#define IFKERNEL IFFALSE -#endif - -/* lint */ -#ifdef __lint - -#define IFLINT IFTRUE - -int _ZERO_; /* "constant in conditional context" workaround */ -#define _ONE_ (!_ZERO_) -int _loop; /* "_loop redefinition hides earlier one" */ - -#else /* __lint */ - -#define IFLINT IFFALSE - -#define _ZERO_ 0 -#define _ONE_ 1 - -#endif /* __lint */ - -/* portability aids */ -#ifdef mc68000 - -#define IF68000 IFTRUE - -typedef caddr_t INT_T; /* pseudo-integer type (address register) */ -typedef ulong_t PTR_T; /* pseudo-pointer type (data register) */ -typedef short LOOP_T; /* loop variable (for dbra loops) */ - -#define LOOP_DECR(var) (--(var) != -1) - -#else /* mc68000 */ - -#define IF68000 IFFALSE - -typedef int INT_T; -typedef caddr_t PTR_T; -typedef int LOOP_T; - -#define LOOP_DECR(var) (--(var) >= 0) - -#endif /* mc68000 */ - -#if defined(__sparc) -#define IFSPARC IFTRUE -#else -#define IFSPARC IFFALSE -#endif - -/* true if we can make 32 bit accesses on 16 bit boundaries */ -#ifndef SHORT_ALIGN -#define SHORT_ALIGN (!defined(__sparc)) -#endif - -#if SHORT_ALIGN -#define IFSHORT_ALIGN IFTRUE -#else -#define IFSHORT_ALIGN IFFALSE -#endif - - -#ifndef LITTLE_ENDIAN -#define LITTLE_ENDIAN (defined(__i386) || defined(__amd64)) -#endif - -#if LITTLE_ENDIAN -#define ENDIAN IFTRUE -#else -#define ENDIAN IFFALSE -#endif - -/* - * SunOS release number - * warning: these tests are fragile - */ -#if defined(__sun) && !defined(SUNOS) -#ifdef _sys_types_h -#define SUNOS 41 -#else /* _sys_types_h */ -#ifdef NFDBITS -#define SUNOS 40 -#else /* NFDBITS */ -#define SUNOS 35 -#endif /* NFDBITS */ -#endif /* _sys_types_h */ -#endif - -#if SUNOS >= 40 -#define IFSUNOS4 IFTRUE -#else -#define IFSUNOS4 IFFALSE -#endif - -#if SUNOS >= 41 -#define IFSUNOS41 IFTRUE -#else -#define IFSUNOS41 IFFALSE -#endif - - -/* - * misc. macros - */ - -/* statement macro */ -#define _STMT(op) do { op } while (_ZERO_) - -/* loop macros */ -#define PR_LOOPVP(var, op) do { op; } while (LOOP_DECR(var)) -#define PR_LOOPV(var, op) _STMT(while (LOOP_DECR(var)) { op; }) -#define PR_LOOPP(count, op) _STMT(\ - IFLINT(, register LOOP_T) _loop = (count); PR_LOOPVP(_loop, op); \ -) -#define PR_LOOP(count, op) _STMT(\ - IFLINT(, register LOOP_T) _loop = (count); PR_LOOPV(_loop, op); \ -) - -/* pointer manipulation */ -#define PTR_ADD(p, incr) ((caddr_t)(p) + (incr)) -#define PTR_INCR(type, p, incr) (p = (type) ((caddr_t)(p) + (incr))) - -/* unshifted pixrect op codes */ -#define PIX_OPSRC (12) -#define PIX_OPDST (10) -#define PIX_OPNOT(op) ((op) ^ 15) -#define PIX_OPCLR (0) -#define PIX_OPSET (15) - -/* extract color and op code fields */ -#define PIXOP_COLOR(op) ((op) >> 5) -#define PIXOP_OP(op) ((op) >> 1 & 15) - -/* reverse video src or dst */ -#define PIX_OP_REVERSESRC(op) (((op) & 3) << 2 | (op) >> 2 & 3) -#define PIX_OP_REVERSEDST(op) ((~(op) & 5) << 1 | ~(op) >> 1 & 0x5) - -/* determine if op needs src or dst */ -#define PIX_OP_NEEDS_SRC(op) (((op) >> 2 ^ (op)) & 3) -#define PIX_OP_NEEDS_DST(op) (((op) >> 1 ^ (op)) & 5) - -/* misc. data types */ -typedef short MPR_T; /* type used for memory pixrect data */ -typedef ushort_t UMPR_T; /* unsigned equivalent of MPR_T */ - -#ifdef __cplusplus -} -#endif - -#endif /* _SYS_PR_IMPL_UTIL_H */ diff --git a/usr/src/uts/sun/sys/pr_planegroups.h b/usr/src/uts/sun/sys/pr_planegroups.h deleted file mode 100644 index 1af243fc34..0000000000 --- a/usr/src/uts/sun/sys/pr_planegroups.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright 1986, by Sun Microsystems, Inc. - */ - -#ifndef _SYS_PR_PLANEGROUPS_H -#define _SYS_PR_PLANEGROUPS_H - -#pragma ident "%Z%%M% %I% %E% SMI" /* SunOS 1.13 */ - -#ifdef __cplusplus -extern "C" { -#endif - -/* Masks for frame buffer planes and plane group number */ -#define PIX_ALL_PLANES 0x00FFFFFF -#define PIX_GROUP_MASK 0x7F - -/* Macros to encode or extract group into or from attribute word */ -#define PIX_GROUP(g) ((g) << 25) -#define PIX_ATTRGROUP(attr) ((unsigned)(attr) >> 25) - -/* Flag bit which inhibits plane mask setting (for setting group only) */ -#define PIX_DONT_SET_PLANES (1 << 24) - -/* Plane groups definitions */ -/* !!! NOTE: Be sure to increment LAST_PLUS_ONE as new groups are added !!! */ - -#define PIXPG_CURRENT 0 -#define PIXPG_MONO 1 -#define PIXPG_8BIT_COLOR 2 -#define PIXPG_OVERLAY_ENABLE 3 -#define PIXPG_OVERLAY 4 -#define PIXPG_24BIT_COLOR 5 -#define PIXPG_VIDEO 6 -#define PIXPG_VIDEO_ENABLE 7 -#define PIXPG_TRANSPARENT_OVERLAY 8 -#define PIXPG_WID 9 /* Window Id */ -#define PIXPG_ZBUF 10 /* Z (depth) buffer */ -#define PIXPG_CURSOR_ENABLE 11 -#define PIXPG_CURSOR 12 -#define PIXPG_LAST_PLUS_ONE 13 /* array decls and loop termination */ -#define PIXPG_4BIT_OVERLAY 123 -#define PIXPG_ALT_COLOR 124 -#define PIXPG_A12BIT_COLOR 125 -#define PIXPG_B12BIT_COLOR 126 -#define PIXPG_INVALID 127 - -#define MAKEPLNGRP(pg) (1 << (pg)) - -/* Plane groups functions */ -extern int pr_available_plane_groups(); -extern int pr_get_plane_group(); -extern void pr_set_plane_group(); -extern void pr_set_planes(); - -#ifdef __cplusplus -} -#endif - -#endif /* _SYS_PR_PLANEGROUPS_H */ diff --git a/usr/src/uts/sun/sys/ramdac.h b/usr/src/uts/sun/sys/ramdac.h deleted file mode 100644 index 5bee804915..0000000000 --- a/usr/src/uts/sun/sys/ramdac.h +++ /dev/null @@ -1,94 +0,0 @@ -/* - * CDDL HEADER START - * - * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. - * - * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE - * or http://www.opensolaris.org/os/licensing. - * See the License for the specific language governing permissions - * and limitations under the License. - * - * When distributing Covered Code, include this CDDL HEADER in each - * file and include the License file at usr/src/OPENSOLARIS.LICENSE. - * If applicable, add the following below this CDDL HEADER, with the - * fields enclosed by brackets "[]" replaced with your own identifying - * information: Portions Copyright [yyyy] [name of copyright owner] - * - * CDDL HEADER END - */ -/* - * Copyright (c) 1991, by Sun Microsystems, Inc. - */ - -#ifndef _SYS_RAMDAC_H -#define _SYS_RAMDAC_H - -#pragma ident "%Z%%M% %I% %E% SMI" /* SunOS-4.1 1.2 */ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define RAMDAC_READMASK 04 -#define RAMDAC_BLINKMASK 05 -#define RAMDAC_COMMAND 06 -#define RAMDAC_CTRLTEST 07 - -/* 3 Brooktree ramdac 457 or 458 packed in a 32-bit register */ -/* fbunit defined in */ -struct ramdac { - union fbunit addr_reg, /* address register */ - lut_data, /* lut data port */ - command, /* command/control port */ - overlay; /* overlay lut port */ -}; - -#define ASSIGN_LUT(lut, value) (lut).packed = (value & 0xff) | \ - ((value & 0xff) << 8) | ((value & 0xff) << 16) -/* - * when "ctrl/test" is selected, the least significant 3 bits control - * which channel this ramdac is controlling. - * - * select 4:1 multiplexing to make enable/overlay possible, also makes - * the overlay transparent and display the overlay plane only. - * - * enable read and write to all planes - * - * no blinking - */ - -#define INIT_BT458(lut) { \ - ASSIGN_LUT((lut)->addr_reg, 0); \ - ASSIGN_LUT((lut)->addr_reg, RAMDAC_CTRLTEST); \ - ASSIGN_LUT((lut)->command, 04); \ - ASSIGN_LUT((lut)->addr_reg, RAMDAC_COMMAND); \ - ASSIGN_LUT((lut)->command, 0x43); \ - ASSIGN_LUT((lut)->addr_reg, RAMDAC_READMASK); \ - ASSIGN_LUT((lut)->command, 0xff); \ - ASSIGN_LUT((lut)->addr_reg, RAMDAC_BLINKMASK); \ - ASSIGN_LUT((lut)->command, 0); \ - } - -#define INIT_OCMAP(omap) { \ - (omap)[0].packed = 0x000000; \ - (omap)[1].packed = 0xffffff; \ - (omap)[2].packed = 0x00ff00; \ - (omap)[3].packed = 0x000000; \ - } - -#define INIT_CMAP(cmap, size) { \ - register int idx; \ - for (idx = 0; idx < size; idx++) \ - ASSIGN_LUT((cmap)[idx], idx); \ - } - -#ifdef __cplusplus -} -#endif - -#endif /* _SYS_RAMDAC_H */ -- cgit v1.2.3