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author | joerg <joerg@pkgsrc.org> | 2020-03-26 02:37:14 +0000 |
---|---|---|
committer | joerg <joerg@pkgsrc.org> | 2020-03-26 02:37:14 +0000 |
commit | c9ff0ffa57128b3e5e549a57e9e83ba7c98e5e9a (patch) | |
tree | 43ab28497dd854b1059babefc966ca85f1ff7143 | |
parent | 36597c9705b788f9fea7d8f92b273516dc7708c8 (diff) | |
download | pkgsrc-c9ff0ffa57128b3e5e549a57e9e83ba7c98e5e9a.tar.gz |
Fix racy bison use. Rename patch to match patched file.
-rw-r--r-- | cad/iverilog/distinfo | 9 | ||||
-rw-r--r-- | cad/iverilog/patches/patch-Makefile.in | 23 | ||||
-rw-r--r-- | cad/iverilog/patches/patch-ad | 25 | ||||
-rw-r--r-- | cad/iverilog/patches/patch-cadpli_Makefile.in (renamed from cad/iverilog/patches/patch-cadpli_Makefile) | 2 | ||||
-rw-r--r-- | cad/iverilog/patches/patch-tgt-pcb_Makefile.in | 17 | ||||
-rw-r--r-- | cad/iverilog/patches/patch-vhdlpp_Makefile.in | 17 | ||||
-rw-r--r-- | cad/iverilog/patches/patch-vvp_Makefile.in | 17 |
7 files changed, 81 insertions, 29 deletions
diff --git a/cad/iverilog/distinfo b/cad/iverilog/distinfo index 1ab4d3cb3c3..61990c1c291 100644 --- a/cad/iverilog/distinfo +++ b/cad/iverilog/distinfo @@ -1,9 +1,12 @@ -$NetBSD: distinfo,v 1.3 2020/02/18 17:44:26 joerg Exp $ +$NetBSD: distinfo,v 1.4 2020/03/26 02:37:14 joerg Exp $ SHA1 (verilog-10.1.1.tar.gz) = 7f4cead8cabb90cc4525951357c43866ca710749 RMD160 (verilog-10.1.1.tar.gz) = 77c933b712ab027b13a81e3eead7ee4f565741b7 SHA512 (verilog-10.1.1.tar.gz) = a57fdce3d870be8ce39eb3050dabd5a2d4d491c657b85ccbf775bef7fa9a6889a18bf4d2508341ef2cc17d872b5d6c802d4fd8585e4ec7952526699ebb24bfac Size (verilog-10.1.1.tar.gz) = 1684925 bytes +SHA1 (patch-Makefile.in) = 9e66fedfa8487be3b7f82c152504404545f8bd06 SHA1 (patch-aa) = cf075110416f6db0892129796cd83b8ae8de55fa -SHA1 (patch-ad) = bf7d227ed3b321021d8aff54cd008f4b2a1557b9 -SHA1 (patch-cadpli_Makefile) = ed21a5f529ac449c26b831cbd5fde052d9ed5466 +SHA1 (patch-cadpli_Makefile.in) = ed21a5f529ac449c26b831cbd5fde052d9ed5466 +SHA1 (patch-tgt-pcb_Makefile.in) = a1f77b1763cdcb19bc304708c83f34359f9a3917 +SHA1 (patch-vhdlpp_Makefile.in) = feed15f8e8e60c73b0f1f25a62d30fec7fa25a01 +SHA1 (patch-vvp_Makefile.in) = 67bef8f6bbf03c8cf548785f5d8124e03771026a diff --git a/cad/iverilog/patches/patch-Makefile.in b/cad/iverilog/patches/patch-Makefile.in new file mode 100644 index 00000000000..ab2b84a7f52 --- /dev/null +++ b/cad/iverilog/patches/patch-Makefile.in @@ -0,0 +1,23 @@ +$NetBSD: patch-Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $ + +--- Makefile.in.orig 2016-02-10 19:39:12.000000000 +0000 ++++ Makefile.in +@@ -249,14 +249,13 @@ version.exe: $(srcdir)/version.c $(srcdi + main.o: main.cc version_tag.h + + lexor.o: lexor.cc parse.h +- +-parse.o: parse.cc ++parse.o: parse.cc parse.h + + # Build this in two steps to avoid parallel build issues (see pr3462585) + parse.cc: $(srcdir)/parse.y +- $(YACC) --verbose -t -p VL -d -o $@ $< +-parse.h: parse.cc +- mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@ ++ $(YACC) --verbose -t -p VL -d -o parse-tmp1.cc $< && mv parse-tmp1.cc $@ ++parse.h: $(srcdir)/parse.y ++ $(YACC) --verbose -t -p VL -d -o parse-tmp2.cc $< && mv parse-tmp2.hh $@ + + syn-rules.cc: $(srcdir)/syn-rules.y + $(YACC) --verbose -t -p syn_ -o $@ $< diff --git a/cad/iverilog/patches/patch-ad b/cad/iverilog/patches/patch-ad deleted file mode 100644 index 33989a45190..00000000000 --- a/cad/iverilog/patches/patch-ad +++ /dev/null @@ -1,25 +0,0 @@ -$NetBSD: patch-ad,v 1.3 2020/02/18 17:44:26 joerg Exp $ - -make sure no one sneaks a -O* in on us via one of these variables -set in the environment - ---- Makefile.in.orig 2013-08-20 04:10:31.000000000 +0900 -+++ Makefile.in 2013-12-20 11:35:09.000000000 +0900 -@@ -222,6 +222,17 @@ - - lexor.o: lexor.cc parse.h - -+# make sure no one sneaks a -O* in on us via one of these variables -+# set in the environment -+CXX_NOOPT=$(CXX:-O%=) -+CPPFLAGS_NOOPT=$(CPPFLAGS:-O%=) -+CXXFLAGS_NOOPT=$(CXXFLAGS:-O%=) -+ -+parse.o: parse.cc -+ @[ -d dep ] || mkdir dep -+ $(CXX_NOOPT) $(CPPFLAGS_NOOPT) $(CXXFLAGS_NOOPT) -MD -c $< -o $*.o -+ mv $*.d dep/$*.d -+ - parse.o: parse.cc - - # Build this in two steps to avoid parallel build issues (see pr3462585) diff --git a/cad/iverilog/patches/patch-cadpli_Makefile b/cad/iverilog/patches/patch-cadpli_Makefile.in index 690208cd46a..75fb57eda85 100644 --- a/cad/iverilog/patches/patch-cadpli_Makefile +++ b/cad/iverilog/patches/patch-cadpli_Makefile.in @@ -1,4 +1,4 @@ -$NetBSD: patch-cadpli_Makefile,v 1.1 2016/10/08 23:01:45 kamil Exp $ +$NetBSD: patch-cadpli_Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $ gcc -std=gnu99 -shared -L/usr/lib -Wl,-R/usr/lib -L/usr/pkg/lib -Wl,-R/usr/pkg/lib -o cadpli.vpl cadpli.o ../libveriuser/libveriuser.o -L../vvp -lvpi mkdir: dep: Not a directory diff --git a/cad/iverilog/patches/patch-tgt-pcb_Makefile.in b/cad/iverilog/patches/patch-tgt-pcb_Makefile.in new file mode 100644 index 00000000000..969fe938708 --- /dev/null +++ b/cad/iverilog/patches/patch-tgt-pcb_Makefile.in @@ -0,0 +1,17 @@ +$NetBSD: patch-tgt-pcb_Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $ + +--- tgt-pcb/Makefile.in.orig 2020-03-25 22:40:55.245547401 +0000 ++++ tgt-pcb/Makefile.in +@@ -88,9 +88,9 @@ fp_lex.cc: $(srcdir)/fp.lex + $(LEX) -s -ofp_lex.cc $(srcdir)/fp.lex + + fp.cc: $(srcdir)/fp.y +- $(YACC) --verbose -t -p fp -d -o $@ $< +-fp.h: fp.cc +- mv fp.cc.h $@ 2>/dev/null || mv fp.hh $@ ++ $(YACC) --verbose -t -p fp -d -o fp-tmp1.cc $< && mv fp-tmp1.cc $@ ++fp.h: $(srcdir)/fp.y ++ $(YACC) --verbose -t -p fp -d -o fp-tmp1.cc $< && mv fp-tmp1.hh $@ + + ifeq (@WIN32@,yes) + TGTLDFLAGS=-L.. -livl diff --git a/cad/iverilog/patches/patch-vhdlpp_Makefile.in b/cad/iverilog/patches/patch-vhdlpp_Makefile.in new file mode 100644 index 00000000000..5ddeb339417 --- /dev/null +++ b/cad/iverilog/patches/patch-vhdlpp_Makefile.in @@ -0,0 +1,17 @@ +$NetBSD: patch-vhdlpp_Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $ + +--- vhdlpp/Makefile.in.orig 2020-03-25 22:02:30.283023254 +0000 ++++ vhdlpp/Makefile.in +@@ -117,9 +117,9 @@ lexor.cc: $(srcdir)/lexor.lex + + # Build this in two steps to avoid parallel build issues (see pr3462585) + parse.cc: $(srcdir)/parse.y +- $(YACC) --verbose -t -d -o $@ $< +-parse.h: parse.cc +- mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@ ++ $(YACC) --verbose -t -d -o parse-tmp1.cc $< && mv parse-tmp1.cc $@ ++parse.h: $(srcdir)/parse.y ++ $(YACC) --verbose -t -d -o parse-tmp2.cc $< && mv parse-tmp2.hh $@ + + lexor_keyword.o: lexor_keyword.cc parse.h + diff --git a/cad/iverilog/patches/patch-vvp_Makefile.in b/cad/iverilog/patches/patch-vvp_Makefile.in new file mode 100644 index 00000000000..1b779f9888a --- /dev/null +++ b/cad/iverilog/patches/patch-vvp_Makefile.in @@ -0,0 +1,17 @@ +$NetBSD: patch-vvp_Makefile.in,v 1.1 2020/03/26 02:37:14 joerg Exp $ + +--- vvp/Makefile.in.orig 2020-03-25 22:02:32.770254871 +0000 ++++ vvp/Makefile.in +@@ -165,9 +165,9 @@ tables.o: tables.cc + + # Build this in two steps to avoid parallel build issues (see pr3462585) + parse.cc: $(srcdir)/parse.y +- $(YACC) --verbose -t -d -o $@ $< +-parse.h: parse.cc +- mv parse.cc.h $@ 2>/dev/null || mv parse.hh $@ ++ $(YACC) --verbose -t -d -o parse-tmp1.cc $< && mv parse-tmp1.cc $@ ++parse.h: $(srcdir)/parse.y ++ $(YACC) --verbose -t -d -o parse-tmp2.cc $< && mv parse-tmp2.hh $@ + + lexor.cc: $(srcdir)/lexor.lex + $(LEX) -s -olexor.cc $(srcdir)/lexor.lex |