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authordrochner <drochner>2006-05-04 16:58:05 +0000
committerdrochner <drochner>2006-05-04 16:58:05 +0000
commitca8eab54f2048e7b88d788605235e62cd0f7239e (patch)
tree9638c148fc99728bfb25d4ddcfc812d6aa3337c4 /cad/MyHDL-iverilog/Makefile
parent73f6aa2dc8c5c56d73772b2f1ffcb20c589a2b1e (diff)
downloadpkgsrc-ca8eab54f2048e7b88d788605235e62cd0f7239e.tar.gz
update MyHDL to 0.5.1
There is no usable changelog; I've found one real bug closed in the tracker: A verilog '>>>' is generated as appropriate for signed numbers.
Diffstat (limited to 'cad/MyHDL-iverilog/Makefile')
-rw-r--r--cad/MyHDL-iverilog/Makefile6
1 files changed, 3 insertions, 3 deletions
diff --git a/cad/MyHDL-iverilog/Makefile b/cad/MyHDL-iverilog/Makefile
index c41502dd88d..c2397496707 100644
--- a/cad/MyHDL-iverilog/Makefile
+++ b/cad/MyHDL-iverilog/Makefile
@@ -1,8 +1,8 @@
-# $NetBSD: Makefile,v 1.2 2006/03/04 21:29:01 jlam Exp $
+# $NetBSD: Makefile,v 1.3 2006/05/04 16:58:05 drochner Exp $
#
-DISTNAME= myhdl-0.5
-PKGNAME= MyHDL-iverilog-0.5
+DISTNAME= myhdl-0.5.1
+PKGNAME= MyHDL-iverilog-0.5.1
CATEGORIES= cad python
MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:=myhdl/}