diff options
author | dmcmahill <dmcmahill@pkgsrc.org> | 2004-02-14 17:18:36 +0000 |
---|---|---|
committer | dmcmahill <dmcmahill@pkgsrc.org> | 2004-02-14 17:18:36 +0000 |
commit | 36fc34e730f1a92a749afe895084386c2383859d (patch) | |
tree | b3e484dc8593e0cecd950a5b0c70a0265a36538e /cad/gnucap | |
parent | 9a49cfff4ef19aeb821638c85e661d7371c90b66 (diff) | |
download | pkgsrc-36fc34e730f1a92a749afe895084386c2383859d.tar.gz |
update to gnucap-0.34. While here bl3ify.
Gnucap 0.34 release notes (02/01/2004)
This is a bug fix and compatibility release.
1. Fix bug causing incorrect interpolation of backwards tables.
2. Fix tanh overflow bug.
3. Fix some parsing bugs.
4. Fix occasional "double load" bug.
5. Fix AC sweep with one point.
6. Transient start time really works.
7. Fix occasional assert fail after option short is changed.
8. Fix memory leak resulting from failure to delete unused common.
9. Fix a Z probe bug that sometimes gave wrong answers.
10. Fix a limiting bug that sometimes caused non-convergence.
11. Configure handles isnan.
12. Improvements to logic initialization. It is still not correct.
Some things that are still partially implemented:
1. BSIM models, charge effects, "alpha0" parameter. (computed then
ignored)
2. Configure still doesn't handle everything.
3. The model compiler still requires too much raw coding.
4. Named nodes. If you set the option "namednodes", it will support
named nodes, but some things don't work, so it is off by default.
5. The preliminary IBIS code is now included. For now, it is a
standalone executable, that reads an IBIS file and generates a
netlist. The netlist requires some editing to use, and is not fully
compatible anyway. It is included in hopes of recruiting help in
finishing the project.
Bugs (nothing new, but needs repeating):
1. The transmission line initial conditions are not propagated until
the transient analysis runs.
2. An occasional bogus calculation in MOSFETS occurs when a device is
reversed. This sometimes causes nonconvergence.
3. Initialization is strange when repeating an analysis without an
intermediate edit.
Hot items for a future release (no promises, but highly probable):
1. Verilog-AMS and VHDL-AMS support.
Diffstat (limited to 'cad/gnucap')
-rw-r--r-- | cad/gnucap/Makefile | 19 | ||||
-rw-r--r-- | cad/gnucap/PLIST | 302 | ||||
-rw-r--r-- | cad/gnucap/distinfo | 7 | ||||
-rw-r--r-- | cad/gnucap/patches/patch-ab | 31 |
4 files changed, 131 insertions, 228 deletions
diff --git a/cad/gnucap/Makefile b/cad/gnucap/Makefile index 218386578ac..2efacbac7c1 100644 --- a/cad/gnucap/Makefile +++ b/cad/gnucap/Makefile @@ -1,15 +1,19 @@ -# $NetBSD: Makefile,v 1.8 2004/01/22 07:21:54 grant Exp $ +# $NetBSD: Makefile,v 1.9 2004/02/14 17:18:36 dmcmahill Exp $ # -DISTNAME= gnucap-0.33 +DISTNAME= gnucap-0.34 CATEGORIES= cad -MASTER_SITES= ${MASTER_SITE_GNU:=gnucap/} +MASTER_SITES= http://www.gnucap.org/ \ + http://www.geda.seul.org/dist/ \ + http://www.kettering.edu/~adavis/gnucap/ MAINTAINER= dmcmahill@NetBSD.org HOMEPAGE= http://www.geda.seul.org/tools/acs/index.html COMMENT= General purpose circuit simulator -USE_BUILDLINK2= YES +PKG_INSTALLATION_TYPES= overwrite pkgviews + +USE_BUILDLINK3= YES USE_GNU_TOOLS+= make USE_GNU_READLINE= YES @@ -18,17 +22,18 @@ do-build: @cd ${WRKSRC}/src && ${SETENV} ${MAKE_ENV} ${MAKE_PROGRAM} pkgsrc do-install: + ${INSTALL_PROGRAM_DIR} ${PREFIX}/bin ${INSTALL_PROGRAM} ${WRKSRC}/src/*/gnucap ${PREFIX}/bin/ ${INSTALL_DATA_DIR} ${PREFIX}/share/doc/gnucap ${INSTALL_DATA} ${WRKSRC}/doc/acs-tutorial ${PREFIX}/share/doc/gnucap - ${INSTALL_DATA} ${WRKSRC}/man/man.pdf ${PREFIX}/share/doc/gnucap + ${INSTALL_DATA} ${WRKSRC}/man/gnucap-man.pdf ${PREFIX}/share/doc/gnucap ${INSTALL_DATA} ${WRKSRC}/doc/whatisit ${PREFIX}/share/doc/gnucap - ${INSTALL_DATA} ${WRKSRC}/man/man/* ${PREFIX}/share/doc/gnucap + ${INSTALL_DATA} ${WRKSRC}/man/html/* ${PREFIX}/share/doc/gnucap ${INSTALL_DATA_DIR} ${PREFIX}/share/examples/gnucap ${INSTALL_DATA} ${WRKSRC}/examples/* ${PREFIX}/share/examples/gnucap do-test: cd ${WRKSRC}/test && ./test ../src/*/gnucap "" 0001 == -.include "../../devel/readline/buildlink2.mk" +.include "../../devel/readline/buildlink3.mk" .include "../../mk/bsd.pkg.mk" diff --git a/cad/gnucap/PLIST b/cad/gnucap/PLIST index 0193aa2cb9f..d27b204c163 100644 --- a/cad/gnucap/PLIST +++ b/cad/gnucap/PLIST @@ -1,190 +1,120 @@ -@comment $NetBSD: PLIST,v 1.3 2003/04/21 03:06:29 dmcmahill Exp $ +@comment $NetBSD: PLIST,v 1.4 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share/examples/gnucap/eq4-9217.tran-slow.ckt +share/examples/gnucap/eq4-9217.tran.ckt share/examples/gnucap/eq5-.tran.ckt share/examples/gnucap/eq5-.tran.fast.ckt share/examples/gnucap/eq5-.tran.like-spice.ckt @@ -223,5 +153,5 @@ share/examples/gnucap/opamp.doc share/examples/gnucap/runall share/examples/gnucap/runall.out share/examples/gnucap/sc18.ckt -@dirrm share/doc/gnucap @dirrm share/examples/gnucap +@dirrm share/doc/gnucap diff --git a/cad/gnucap/distinfo b/cad/gnucap/distinfo index 8345c93017b..87bfc8440d1 100644 --- a/cad/gnucap/distinfo +++ b/cad/gnucap/distinfo @@ -1,8 +1,7 @@ -$NetBSD: distinfo,v 1.4 2003/11/08 00:54:22 dmcmahill Exp $ +$NetBSD: distinfo,v 1.5 2004/02/14 17:18:36 dmcmahill Exp $ -SHA1 (gnucap-0.33.tar.gz) = 67fe6ccc4e16807d842c5f0377b66a16c2904edf -Size (gnucap-0.33.tar.gz) = 1387565 bytes +SHA1 (gnucap-0.34.tar.gz) = 2094c3b9d6bcc1c036ec2cef5ff35216da24868a +Size (gnucap-0.34.tar.gz) = 1412004 bytes SHA1 (patch-aa) = 404d6f926f4985a7d117e1361e9c2c9cabd6323b -SHA1 (patch-ab) = 519cd313b023be49ee19018d4eb88697fcb739e3 SHA1 (patch-ac) = b87c6eb33b427a154b03802e7633048b4ed003ab SHA1 (patch-ad) = 58ddab0864cc950e39f46c2230da2280ab26e19c diff --git a/cad/gnucap/patches/patch-ab b/cad/gnucap/patches/patch-ab deleted file mode 100644 index 849fea647ec..00000000000 --- a/cad/gnucap/patches/patch-ab +++ /dev/null @@ -1,31 +0,0 @@ -$NetBSD: patch-ab,v 1.1 2003/04/21 03:06:30 dmcmahill Exp $ - ---- src/bm_tanh.cc.orig Wed Nov 6 02:47:52 2002 -+++ src/bm_tanh.cc -@@ -65,13 +65,23 @@ void EVAL_BM_TANH::print(OMSTREAM& where - print_base(where); - } - /*--------------------------------------------------------------------------*/ -+const double LOGBIGBIG = log(BIGBIG); - void EVAL_BM_TANH::tr_eval(ELEMENT* d)const - { - double x = ioffset(d->_y0.x); - double aa = x * _gain/_limit; -- double cosine = cosh(aa); -- double f1 = _gain / (cosine*cosine); -- double f0 = _limit * tanh(aa); -+ double f1, f0; -+ {if (aa > LOGBIGBIG) { -+ f1 = 0; -+ f0 = _limit; -+ }else if (aa < -LOGBIGBIG) { -+ f1 = 0; -+ f0 = -_limit; -+ }else{ -+ double cosine = cosh(aa); -+ f1 = _gain / (cosine*cosine); -+ f0 = _limit * tanh(aa); -+ }} - d->_y0 = FPOLY1(x, f0, f1); - tr_final_adjust(&(d->_y0), d->f_is_value()); - } |