diff options
| author | drochner <drochner@pkgsrc.org> | 2005-01-05 15:20:10 +0000 |
|---|---|---|
| committer | drochner <drochner@pkgsrc.org> | 2005-01-05 15:20:10 +0000 |
| commit | 154f18aa7daf3f2aef2697c6c0acd7794862e32e (patch) | |
| tree | fbf8a4e75b09174b530c71d67084f5fb6acf013c /cad/py-MyHDL/distinfo | |
| parent | 28db861b64a3b63cea68e623be1134767152fe8e (diff) | |
| download | pkgsrc-154f18aa7daf3f2aef2697c6c0acd7794862e32e.tar.gz | |
update to 0.4.1
changes:
* VCD output for waveform viewing
- function additions
- needs Python 2.3, 2.4 is OK
* Conversion to Verilog to provide a path to implementation
* Added cosimulation support for the cver Verilog simulator.
- bugfixes
Diffstat (limited to 'cad/py-MyHDL/distinfo')
| -rw-r--r-- | cad/py-MyHDL/distinfo | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/cad/py-MyHDL/distinfo b/cad/py-MyHDL/distinfo index 9fdab523298..0d8df5a8848 100644 --- a/cad/py-MyHDL/distinfo +++ b/cad/py-MyHDL/distinfo @@ -1,4 +1,4 @@ -$NetBSD: distinfo,v 1.1.1.1 2003/06/05 18:50:54 drochner Exp $ +$NetBSD: distinfo,v 1.2 2005/01/05 15:20:10 drochner Exp $ -SHA1 (myhdl-0.2.tar.gz) = e9c09d8cac1478eec4986f7a159e2af506a286a8 -Size (myhdl-0.2.tar.gz) = 358159 bytes +SHA1 (myhdl-0.4.1.tar.gz) = 84096c83351152b1354a331a0b8c3c1bf4098dde +Size (myhdl-0.4.1.tar.gz) = 1205572 bytes |