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author | rillig <rillig@pkgsrc.org> | 2005-11-01 23:08:42 +0000 |
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committer | rillig <rillig@pkgsrc.org> | 2005-11-01 23:08:42 +0000 |
commit | 61d017f3a0554d87f895f898f3187bc24906cc67 (patch) | |
tree | 0d6ff7c6d07ff5b34227bc4e12670b52f9de4bec /cad/verilog-mode | |
parent | 56a4a05945fce9121e385b4416d889c89a81a238 (diff) | |
download | pkgsrc-61d017f3a0554d87f895f898f3187bc24906cc67.tar.gz |
Updated pkglint to 4.32.2.
Added a check for invalid uses of MASTER_SITE_* variables.
Diffstat (limited to 'cad/verilog-mode')
0 files changed, 0 insertions, 0 deletions