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| author | dmcmahill <dmcmahill> | 2000-05-10 23:19:00 +0000 |
|---|---|---|
| committer | dmcmahill <dmcmahill> | 2000-05-10 23:19:00 +0000 |
| commit | 9743035e35161965060b54f7dbd65a65b3364586 (patch) | |
| tree | c94a31442ac5e004a34bd02be9a68ede0d9d67f4 /cad/verilog | |
| parent | d06f86db6f7f21ffe3f427d32e2993aebdb23abf (diff) | |
| download | pkgsrc-9743035e35161965060b54f7dbd65a65b3364586.tar.gz | |
distinguish these 2 packages as "development snapshot" and "released" so
its more obvious of the difference.
Diffstat (limited to 'cad/verilog')
| -rw-r--r-- | cad/verilog/pkg/COMMENT | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cad/verilog/pkg/COMMENT b/cad/verilog/pkg/COMMENT index 1762c44bef6..4b8d214ad3e 100644 --- a/cad/verilog/pkg/COMMENT +++ b/cad/verilog/pkg/COMMENT @@ -1 +1 @@ -Verilog simulation and synthesis tool +Verilog simulation and synthesis tool (stable release version) |