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authordmcmahill <dmcmahill@pkgsrc.org>2002-12-15 01:57:12 +0000
committerdmcmahill <dmcmahill@pkgsrc.org>2002-12-15 01:57:12 +0000
commitfe2c5b1c959ebd3e093365fef8f206c2761be4c0 (patch)
tree169374e729dd74436c02734f349cf590500a8dcf /cad
parent5dcda1ae5bf5f07650749fa1c4a5f83e4ca15c40 (diff)
downloadpkgsrc-fe2c5b1c959ebd3e093365fef8f206c2761be4c0.tar.gz
update to verilog-0.7
This release represents many bug fixes, expanded language coverage, greatly enhanced xilinx fpga synthesis and several performance enhancements. The complete list is rather long.
Diffstat (limited to 'cad')
-rw-r--r--cad/verilog/Makefile13
-rw-r--r--cad/verilog/PLIST17
-rw-r--r--cad/verilog/distinfo6
3 files changed, 14 insertions, 22 deletions
diff --git a/cad/verilog/Makefile b/cad/verilog/Makefile
index 8f50752d746..aa28bad22e8 100644
--- a/cad/verilog/Makefile
+++ b/cad/verilog/Makefile
@@ -1,9 +1,9 @@
-# $NetBSD: Makefile,v 1.12 2002/02/08 01:48:31 dmcmahill Exp $
+# $NetBSD: Makefile,v 1.13 2002/12/15 01:57:12 dmcmahill Exp $
#
-DISTNAME= verilog-0.6
+DISTNAME= verilog-0.7
CATEGORIES= cad
-MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v0.6/
+MASTER_SITES= ftp://icarus.com/pub/eda/verilog/v0.7/
MAINTAINER= dmcmahill@netbsd.org
HOMEPAGE= http://icarus.com/eda/verilog/index.html
@@ -24,10 +24,7 @@ USE_GMAKE= yes
#CONFIGURE_ENV+= CPPFLAGS="${CPPFLAGS}" LDFLAGS+="${LDFLAGS}"
CONFIGURE_ARGS+= --without-ipal
YACC= ${LOCALBASE}/bin/bison
-
-test: build
- cd ${WRKSRC} && \
- ${MAKE_ENV} ${MAKE_PROGRAM} check 2>&1 | \
- tee ${WRKDIR}/tests.log
+TEST_DIRS= ${WRKSRC}
+TEST_TARGET= check
.include "../../mk/bsd.pkg.mk"
diff --git a/cad/verilog/PLIST b/cad/verilog/PLIST
index 4d99fc6fae9..67766e16766 100644
--- a/cad/verilog/PLIST
+++ b/cad/verilog/PLIST
@@ -1,19 +1,13 @@
-@comment $NetBSD: PLIST,v 1.2 2002/02/08 01:48:32 dmcmahill Exp $
+@comment $NetBSD: PLIST,v 1.3 2002/12/15 01:57:12 dmcmahill Exp $
bin/iverilog
+bin/iverilog-vpi
bin/vvp
+include/acc_user.h
include/ivl_target.h
-include/vpi_priv.h
+include/veriuser.h
include/vpi_user.h
-include/vvm.h
-include/vvm_calltf.h
-include/vvm_func.h
-include/vvm_gates.h
-include/vvm_nexus.h
-include/vvm_signal.h
-include/vvm_thread.h
+lib/libveriuser.a
lib/libvpi.a
-lib/libvpip.a
-lib/libvvm.a
lib/ivl/fpga.tgt
lib/ivl/ivl
lib/ivl/iverilog.conf
@@ -22,5 +16,6 @@ lib/ivl/null.tgt
lib/ivl/system.vpi
lib/ivl/vvp.tgt
man/man1/iverilog.1
+man/man1/iverilog-vpi.1
man/man1/vvp.1
@dirrm lib/ivl
diff --git a/cad/verilog/distinfo b/cad/verilog/distinfo
index 396094e8e61..48e5c93bcc3 100644
--- a/cad/verilog/distinfo
+++ b/cad/verilog/distinfo
@@ -1,5 +1,5 @@
-$NetBSD: distinfo,v 1.4 2002/02/08 01:48:32 dmcmahill Exp $
+$NetBSD: distinfo,v 1.5 2002/12/15 01:57:12 dmcmahill Exp $
-SHA1 (verilog-0.6.tar.gz) = 1b6cc6488414497af225732d6574070271e985cc
-Size (verilog-0.6.tar.gz) = 730983 bytes
+SHA1 (verilog-0.7.tar.gz) = e7e88078b3232ccc888db5c94bdbc06801ee85cb
+Size (verilog-0.7.tar.gz) = 846998 bytes
SHA1 (patch-ad) = 3c035d32d011d81520e428e3dd9adae435fc63e7