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authorrillig <rillig@pkgsrc.org>2020-01-18 23:30:05 +0000
committerrillig <rillig@pkgsrc.org>2020-01-18 23:30:05 +0000
commitb831c01fc9da1c5001588ec465faa98afe3bf1c8 (patch)
treebc9d7f24b9a4d046704f52f30922bbfce87279a2 /cad
parent5cc0fec1a826d6c92df3c3e772b38bd28114cab0 (diff)
downloadpkgsrc-b831c01fc9da1c5001588ec465faa98afe3bf1c8.tar.gz
all: migrate several HOMEPAGEs to https
pkglint --only "https instead of http" -r -F With manual adjustments afterwards since pkglint 19.4.4 fixed a few indentations in unrelated lines. This mainly affects projects hosted at SourceForce, as well as freedesktop.org, CTAN and GNU.
Diffstat (limited to 'cad')
-rw-r--r--cad/adms/Makefile4
-rw-r--r--cad/atlc/Makefile4
-rw-r--r--cad/cascade/Makefile4
-rw-r--r--cad/covered/Makefile4
-rw-r--r--cad/electric/Makefile4
-rw-r--r--cad/felt/Makefile4
-rw-r--r--cad/gplcver/Makefile4
-rw-r--r--cad/gtkwave/Makefile4
-rw-r--r--cad/mcalc/Makefile4
-rw-r--r--cad/ng-spice/Makefile4
-rw-r--r--cad/tnt-mmtl/Makefile4
-rw-r--r--cad/transcalc/Makefile4
-rw-r--r--cad/wcalc/Makefile.common4
13 files changed, 26 insertions, 26 deletions
diff --git a/cad/adms/Makefile b/cad/adms/Makefile
index 3ed9aaa89d2..f6f06c32262 100644
--- a/cad/adms/Makefile
+++ b/cad/adms/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.9 2014/10/09 14:06:01 wiz Exp $
+# $NetBSD: Makefile,v 1.10 2020/01/18 23:30:09 rillig Exp $
#
DISTNAME= adms-2.2.5
@@ -7,7 +7,7 @@ CATEGORIES= cad
MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:=mot-adms/}
MAINTAINER= dmcmahill@NetBSD.org
-HOMEPAGE= http://mot-adms.sourceforge.net/
+HOMEPAGE= https://mot-adms.sourceforge.net/
COMMENT= Compact device model code generator for SPICE
AUTOMAKE_OVERRIDE= NO
diff --git a/cad/atlc/Makefile b/cad/atlc/Makefile
index ba1e78eee82..df569f0973f 100644
--- a/cad/atlc/Makefile
+++ b/cad/atlc/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.15 2019/06/08 11:04:27 rillig Exp $
+# $NetBSD: Makefile,v 1.16 2020/01/18 23:30:09 rillig Exp $
#
DISTNAME= atlc-4.6.0
@@ -7,7 +7,7 @@ CATEGORIES= cad
MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:=atlc/}
MAINTAINER= dmcmahill@NetBSD.org
-HOMEPAGE= http://atlc.sourceforge.net/
+HOMEPAGE= https://atlc.sourceforge.net/
COMMENT= Calculates the impedance of arbitrary cross section transmission lines
MAKE_JOBS_SAFE= no
diff --git a/cad/cascade/Makefile b/cad/cascade/Makefile
index 75e03e51e14..55df638314a 100644
--- a/cad/cascade/Makefile
+++ b/cad/cascade/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.10 2014/10/09 14:06:01 wiz Exp $
+# $NetBSD: Makefile,v 1.11 2020/01/18 23:30:10 rillig Exp $
#
DISTNAME= cascade-1.4
@@ -7,7 +7,7 @@ CATEGORIES= cad
MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:=rfcascade/}
MAINTAINER= dmcmahill@NetBSD.org
-HOMEPAGE= http://rfcascade.sourceforge.net/
+HOMEPAGE= https://rfcascade.sourceforge.net/
COMMENT= Simple tool to analyze noise and distortion of a RF system
GNU_CONFIGURE= YES
diff --git a/cad/covered/Makefile b/cad/covered/Makefile
index 366afee70b8..bf7da6b4d28 100644
--- a/cad/covered/Makefile
+++ b/cad/covered/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.27 2018/03/12 11:16:07 wiz Exp $
+# $NetBSD: Makefile,v 1.28 2020/01/18 23:30:10 rillig Exp $
#
DISTNAME= covered-0.7.10
@@ -7,7 +7,7 @@ CATEGORIES= cad
MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:=covered/}
MAINTAINER= dmcmahill@NetBSD.org
-HOMEPAGE= http://covered.sourceforge.net/
+HOMEPAGE= https://covered.sourceforge.net/
COMMENT= Verilog code coverage analyzer (stable release version)
LICENSE= gnu-gpl-v2
diff --git a/cad/electric/Makefile b/cad/electric/Makefile
index 060e0b1797a..c6613dab87d 100644
--- a/cad/electric/Makefile
+++ b/cad/electric/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.21 2019/06/08 11:04:27 rillig Exp $
+# $NetBSD: Makefile,v 1.22 2020/01/18 23:30:10 rillig Exp $
#
DISTNAME= electric-7.00
@@ -7,7 +7,7 @@ CATEGORIES= cad
MASTER_SITES= ${MASTER_SITE_GNU:=electric/}
MAINTAINER= pkgsrc-users@NetBSD.org
-HOMEPAGE= http://www.gnu.org/software/electric/electric.html
+HOMEPAGE= https://www.gnu.org/software/electric/electric.html
COMMENT= Electrical CAD system
GNU_CONFIGURE= YES
diff --git a/cad/felt/Makefile b/cad/felt/Makefile
index d374475f923..f54976f012f 100644
--- a/cad/felt/Makefile
+++ b/cad/felt/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.40 2015/12/29 04:54:37 dholland Exp $
+# $NetBSD: Makefile,v 1.41 2020/01/18 23:30:10 rillig Exp $
DISTNAME= felt-3.05.src
PKGNAME= felt-3.05
@@ -8,7 +8,7 @@ MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:=felt/}
DISTFILES= felt-3.05.src.tar.gz felt-3.05.ps.gz
MAINTAINER= pkgsrc-users@NetBSD.org
-HOMEPAGE= http://felt.sourceforge.net/
+HOMEPAGE= https://felt.sourceforge.net/
COMMENT= Free system for introductory level finite element analysis
EXTRACT_ONLY= felt-3.05.src.tar.gz
diff --git a/cad/gplcver/Makefile b/cad/gplcver/Makefile
index 094c1c07598..6dfe6a2907a 100644
--- a/cad/gplcver/Makefile
+++ b/cad/gplcver/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.11 2014/12/02 13:26:23 mef Exp $
+# $NetBSD: Makefile,v 1.12 2020/01/18 23:30:10 rillig Exp $
#
DISTNAME= gplcver-2.12a.src
@@ -9,7 +9,7 @@ MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:=gplcver/}
EXTRACT_SUFX= .tar.bz2
MAINTAINER= pkgsrc-users@NetBSD.org
-HOMEPAGE= http://sourceforge.net/p/gplcver/wiki/Home/
+HOMEPAGE= https://sourceforge.net/p/gplcver/wiki/Home/
COMMENT= Verilog simulator
BUILD_DIRS= src
diff --git a/cad/gtkwave/Makefile b/cad/gtkwave/Makefile
index 8a7f4e0b029..5904f762192 100644
--- a/cad/gtkwave/Makefile
+++ b/cad/gtkwave/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.102 2019/11/16 12:48:19 mef Exp $
+# $NetBSD: Makefile,v 1.103 2020/01/18 23:30:10 rillig Exp $
#
DISTNAME= gtkwave-3.3.103
@@ -7,7 +7,7 @@ MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:=gtkwave/}
#MASTER_SITES= http://home.nc.rr.com/gtkwave/
MAINTAINER= pkgsrc-users@NetBSD.org
-HOMEPAGE= http://gtkwave.sourceforge.net/
+HOMEPAGE= https://gtkwave.sourceforge.net/
COMMENT= Electronic waveform viewer
LICENSE= gnu-gpl-v3
diff --git a/cad/mcalc/Makefile b/cad/mcalc/Makefile
index 6f1f8cbe3f4..6d71697809d 100644
--- a/cad/mcalc/Makefile
+++ b/cad/mcalc/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.10 2014/10/09 14:06:01 wiz Exp $
+# $NetBSD: Makefile,v 1.11 2020/01/18 23:30:10 rillig Exp $
#
DISTNAME= mcalc-1.6
@@ -6,7 +6,7 @@ CATEGORIES= cad
MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:=mcalc/}
MAINTAINER= dmcmahill@NetBSD.org
-HOMEPAGE= http://mcalc.sourceforge.net/
+HOMEPAGE= https://mcalc.sourceforge.net/
COMMENT= JavaScript based microstrip analysis/synthesis calculator
NO_BUILD= yes
diff --git a/cad/ng-spice/Makefile b/cad/ng-spice/Makefile
index 514a4c638aa..f6f9a23c0da 100644
--- a/cad/ng-spice/Makefile
+++ b/cad/ng-spice/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.46 2020/01/14 09:15:42 hauke Exp $
+# $NetBSD: Makefile,v 1.47 2020/01/18 23:30:10 rillig Exp $
DISTNAME= ngspice-31
PKGNAME= ng-spice-31
@@ -7,7 +7,7 @@ CATEGORIES= cad
MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:=ngspice/}
MAINTAINER= dmcmahill@NetBSD.org
-HOMEPAGE= http://ngspice.sourceforge.net/
+HOMEPAGE= https://ngspice.sourceforge.net/
COMMENT= Next generation circuit simulation program
USE_LIBTOOL= YES
diff --git a/cad/tnt-mmtl/Makefile b/cad/tnt-mmtl/Makefile
index 4b3bbc45fa6..dae69b3468a 100644
--- a/cad/tnt-mmtl/Makefile
+++ b/cad/tnt-mmtl/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.30 2019/12/28 12:35:45 wiz Exp $
+# $NetBSD: Makefile,v 1.31 2020/01/18 23:30:11 rillig Exp $
DISTNAME= tnt-1.2.2
PKGNAME= ${DISTNAME:S/tnt/tnt-mmtl/}
@@ -7,7 +7,7 @@ CATEGORIES= cad
MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:=mmtl/}
MAINTAINER= dmcmahill@NetBSD.org
-HOMEPAGE= http://mmtl.sourceforge.net/
+HOMEPAGE= https://mmtl.sourceforge.net/
COMMENT= Multilayer Multiconductor Transmission Line 2-D and 2.5-D simulator
BUILD_DEPENDS+= latex2html-[0-9]*:../../textproc/latex2html
diff --git a/cad/transcalc/Makefile b/cad/transcalc/Makefile
index 12185ba11f7..a8134751e0a 100644
--- a/cad/transcalc/Makefile
+++ b/cad/transcalc/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.51 2019/07/21 22:24:31 wiz Exp $
+# $NetBSD: Makefile,v 1.52 2020/01/18 23:30:11 rillig Exp $
#
DISTNAME= transcalc-0.14
@@ -8,7 +8,7 @@ MASTER_SITES= http://transcalc.sourceforge.net/
#MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:=transcalc/}
MAINTAINER= dmcmahill@NetBSD.org
-HOMEPAGE= http://transcalc.sourceforge.net/
+HOMEPAGE= https://transcalc.sourceforge.net/
COMMENT= Transmission line analysis/synthesis
GNU_CONFIGURE= YES
diff --git a/cad/wcalc/Makefile.common b/cad/wcalc/Makefile.common
index 0bcebee67cb..14a33391263 100644
--- a/cad/wcalc/Makefile.common
+++ b/cad/wcalc/Makefile.common
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile.common,v 1.10 2019/06/08 11:04:30 rillig Exp $
+# $NetBSD: Makefile.common,v 1.11 2020/01/18 23:30:11 rillig Exp $
#
# used by cad/wcalc/Makefile
# used by cad/wcalc-docs/Makefile
@@ -15,7 +15,7 @@ CATEGORIES= cad
MASTER_SITES= ${MASTER_SITE_SOURCEFORGE:=wcalc/}
MAINTAINER= dmcmahill@NetBSD.org
-HOMEPAGE= http://wcalc.sourceforge.net/
+HOMEPAGE= https://wcalc.sourceforge.net/
DISTINFO_FILE= ${.CURDIR}/../../cad/wcalc/distinfo
PATCHDIR= ${.CURDIR}/../../cad/wcalc/patches