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authordmcmahill <dmcmahill>2002-11-10 01:57:48 +0000
committerdmcmahill <dmcmahill>2002-11-10 01:57:48 +0000
commit42c503f432f2c61d1f67ec1474db9230ab1cc2b5 (patch)
treeaf89ff3a7f5f2ca99779ae7bdf33fc36b9f0e30a /cad
parentec32d3c9181b8f41a68c22534b137cc465d12325 (diff)
downloadpkgsrc-42c503f432f2c61d1f67ec1474db9230ab1cc2b5.tar.gz
add buildlink2.mk file in preparation for some coming pkgs which need it
Diffstat (limited to 'cad')
-rw-r--r--cad/verilog-current/buildlink2.mk36
1 files changed, 36 insertions, 0 deletions
diff --git a/cad/verilog-current/buildlink2.mk b/cad/verilog-current/buildlink2.mk
new file mode 100644
index 00000000000..e82db3c9772
--- /dev/null
+++ b/cad/verilog-current/buildlink2.mk
@@ -0,0 +1,36 @@
+# $NetBSD: buildlink2.mk,v 1.1 2002/11/10 01:57:48 dmcmahill Exp $
+#
+# This Makefile fragment is included by packages that use verilog-current.
+#
+# This file was created automatically using createbuildlink 2.2.
+#
+
+.if !defined(VERILOG_CURRENT_BUILDLINK2_MK)
+VERILOG_CURRENT_BUILDLINK2_MK= # defined
+
+BUILDLINK_PACKAGES+= verilog-current
+BUILDLINK_DEPENDS.verilog-current?= verilog-current>=20021019
+BUILDLINK_PKGSRCDIR.verilog-current?= ../../cad/verilog-current
+
+EVAL_PREFIX+= BUILDLINK_PREFIX.verilog-current=verilog-current
+BUILDLINK_PREFIX.verilog-current_DEFAULT= ${LOCALBASE}
+BUILDLINK_FILES.verilog-current+= include/acc_user.h
+BUILDLINK_FILES.verilog-current+= include/ivl_target.h
+BUILDLINK_FILES.verilog-current+= include/veriuser.h
+BUILDLINK_FILES.verilog-current+= include/vpi_user.h
+BUILDLINK_FILES.verilog-current+= lib/ivl/fpga.tgt
+BUILDLINK_FILES.verilog-current+= lib/ivl/iverilog.conf
+BUILDLINK_FILES.verilog-current+= lib/ivl/ivl
+BUILDLINK_FILES.verilog-current+= lib/ivl/ivlpp
+BUILDLINK_FILES.verilog-current+= lib/ivl/null.tgt
+BUILDLINK_FILES.verilog-current+= lib/ivl/system.vpi
+BUILDLINK_FILES.verilog-current+= lib/ivl/vvp.tgt
+BUILDLINK_FILES.verilog-current+= lib/libveriuser.*
+BUILDLINK_FILES.verilog-current+= lib/libvpi.*
+
+
+BUILDLINK_TARGETS+= verilog-current-buildlink
+
+verilog-current-buildlink: _BUILDLINK_USE
+
+.endif # VERILOG_CURRENT_BUILDLINK2_MK