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author | jnemeth <jnemeth> | 2016-10-13 04:10:16 +0000 |
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committer | jnemeth <jnemeth> | 2016-10-13 04:10:16 +0000 |
commit | 09a3687c308a64581029d15526192b5aa4052fc7 (patch) | |
tree | 922060f326ed002bd97e2b2b93c51e764b295c43 /cad | |
parent | f53eb76a8b536bcecc8e9c630b03ad323ac25c3e (diff) | |
download | pkgsrc-09a3687c308a64581029d15526192b5aa4052fc7.tar.gz |
verilog is no longer
Diffstat (limited to 'cad')
-rw-r--r-- | cad/Makefile | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/cad/Makefile b/cad/Makefile index c568146736e..0df3829a89b 100644 --- a/cad/Makefile +++ b/cad/Makefile @@ -1,4 +1,4 @@ -# $NetBSD: Makefile,v 1.91 2016/10/09 13:15:03 kamil Exp $ +# $NetBSD: Makefile,v 1.92 2016/10/13 04:10:16 jnemeth Exp $ # COMMENT= CAD tools @@ -62,7 +62,6 @@ SUBDIR+= stdio-wcalc SUBDIR+= tkgate SUBDIR+= tnt-mmtl SUBDIR+= transcalc -SUBDIR+= verilog SUBDIR+= verilog-mode SUBDIR+= veriwell SUBDIR+= vipec |