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authorjmmv <jmmv>2003-05-06 17:40:18 +0000
committerjmmv <jmmv>2003-05-06 17:40:18 +0000
commit5a79423b6feb188f48299ebbaf981575b33d3f48 (patch)
tree37ae7d212f46ef8018a7bd8c13edba7da1a47ed9 /emulators/spim
parentf58f4f25565243e0fcd6ee359261be2e3cfc7286 (diff)
downloadpkgsrc-5a79423b6feb188f48299ebbaf981575b33d3f48.tar.gz
Drop trailing whitespace. Ok'ed by wiz.
Diffstat (limited to 'emulators/spim')
-rw-r--r--emulators/spim/DESCR2
1 files changed, 1 insertions, 1 deletions
diff --git a/emulators/spim/DESCR b/emulators/spim/DESCR
index 69a95976e32..7345e277543 100644
--- a/emulators/spim/DESCR
+++ b/emulators/spim/DESCR
@@ -5,7 +5,7 @@ like interface to the classical MIPS RISC CPU. The virtual machine
it provides can be either the one presented by the MIPS assembler or the
one of the bare hardware. The simulator can also be built to simulate the
pipeline architecture of the MIPS machine (both the control and floating
-point pipelines). When built for this, it also simulates and displays
+point pipelines). When built for this, it also simulates and displays
an instruction and data cache.
This simulator is useful in CS and EE classes, including providing a