the MIPS 4Kc, 4KEc, 5Kc and 5KE cpus don't have an FPU.

this will break the MALTA kernel in gxemul, but the real hardware does
not have an FPU..

bump pkg revision.

3 files changed, 21 insertions, 3 deletions

diff --git a/emulators/gxemul/Makefile b/emulators/gxemul/Makefile
index 191712d6cc9..f7b3616d51a 100644
--- a/emulators/gxemul/Makefile
+++ b/emulators/gxemul/Makefile
@@ -1,7 +1,7 @@
-# $NetBSD: Makefile,v 1.58 2017/07/16 14:10:58 christos Exp $
+# $NetBSD: Makefile,v 1.59 2017/08/24 22:52:55 mrg Exp $
 
 DISTNAME=	gxemul-0.6.0.1
-PKGREVISION=	5
+PKGREVISION=	6
 CATEGORIES=	emulators
 MASTER_SITES=	http://gxemul.sourceforge.net/src/
 
diff --git a/emulators/gxemul/distinfo b/emulators/gxemul/distinfo
index 07c85fe9579..b0c828364a4 100644
--- a/emulators/gxemul/distinfo
+++ b/emulators/gxemul/distinfo
@@ -1,4 +1,4 @@
-$NetBSD: distinfo,v 1.49 2017/07/16 16:36:09 christos Exp $
+$NetBSD: distinfo,v 1.50 2017/08/24 22:52:55 mrg Exp $
 
 SHA1 (gxemul-0.6.0.1.tar.gz) = 8a9b7a6c08628c2a59a6e7e9c7c449c3826b4744
 RMD160 (gxemul-0.6.0.1.tar.gz) = 6943173d4149bfe40218715b8ed2c82b5b361e50
@@ -19,5 +19,6 @@ SHA1 (patch-src_devices_dev__sh4.cc) = fffd194470bbe830369c814595e0bea968f43809
 SHA1 (patch-src_include_components_CPUDyntransComponent.h) = 4fa3c327c4ce5ee9e39e7bc49ce6029b2a7da100
 SHA1 (patch-src_include_components_M88K__CPUComponent.h) = afd07ae4df33d0c0a9d3d8c15dca4ef9ee7dd916
 SHA1 (patch-src_include_components_MIPS__CPUComponent.h) = 4e49da9af0d220a1ea7c4520d8e7e53d8d84c155
+SHA1 (patch-src_include_mips_cpu_types.h) = acf54e162d22d996a1489869bd1f985eab46de99
 SHA1 (patch-src_include_refcount__ptr.h) = 8021524ff16d3a9de65bb6188fb8c07296c5c3b7
 SHA1 (patch-src_machines_machine__pmax.cc) = 19b97031837f9fa911b02d624f824834ce8c0e89
diff --git a/emulators/gxemul/patches/patch-src_include_mips_cpu_types.h b/emulators/gxemul/patches/patch-src_include_mips_cpu_types.h
new file mode 100644
index 00000000000..eb92c833543
--- /dev/null
+++ b/emulators/gxemul/patches/patch-src_include_mips_cpu_types.h
@@ -0,0 +1,17 @@
+--- src/include/mips_cpu_types.h.orig	2014-08-17 01:45:13.000000000 -0700
++++ src/include/mips_cpu_types.h	2017-08-24 15:38:11.739142000 -0700
+@@ -98,10 +98,10 @@
+ 	{ "RM7900",	0x34 /*?*/,  0x0 /* ? */,DCOUNT,EXC4K, MMU4K,	4, 0,	64, 4,14,5,1,14,5,1,18, 6, 1 }, /*  instrs/cycle? cachelinesize? assoc = 4ways for all  */ \
+ 	{ "RM9000",	0x34 /*?*/,  0x0 /* ? */,DCOUNT,EXC4K, MMU4K,	4, 0,	48, 4,14,5,1,14,5,1,18, 6, 1 }, /*  This is totally bogus  */ \
+ 	{ "RC32334",	MIPS_RC32300,0x00,	0,	EXC32, MMU4K,  32, 1,	16, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, \
+-	{ "4Kc",	0x100+MIPS_4Kc, 1,	0,	EXC32, MMU32,  32, 1,	16, 4,14,4,2,14,4,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
+-	{ "4KEc",	0x100+MIPS_4KEc_R2, 1,	0,	EXC32, MMU32,  32, 2,	16, 4,14,4,2,14,4,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
+-	{ "5Kc",	0x100+MIPS_5Kc, 1,	0,	EXC64, MMU64,  64, 1,	48, 4,15,5,2,15,5,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
+-	{ "5KE",	0x100+MIPS_5KE, 1,	0,	EXC64, MMU64,  64, 2,	48, 4,15,5,2,15,5,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
++	{ "4Kc",	0x100+MIPS_4Kc, 1,	NOFPU,	EXC32, MMU32,  32, 1,	16, 4,14,4,2,14,4,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
++	{ "4KEc",	0x100+MIPS_4KEc_R2, 1,	NOFPU,	EXC32, MMU32,  32, 2,	16, 4,14,4,2,14,4,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
++	{ "5Kc",	0x100+MIPS_5Kc, 1,	NOFPU,	EXC64, MMU64,  64, 1,	48, 4,15,5,2,15,5,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
++	{ "5KE",	0x100+MIPS_5KE, 1,	NOFPU,	EXC64, MMU64,  64, 2,	48, 4,15,5,2,15,5,2, 0, 0, 0 }, /*  DCOUNT?  instrs/cycle? BOGUS, TODO  */ \
+ 	{ "BCM4710",	0x000240,   0x00,       0,	EXC32, MMU32,  32, 1,	32, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /*  TODO: this is just bogus  */ \
+ 	{ "BCM4712",	0x000290,   0x07,       0,	EXC32, MMU32,  32, 1,	32, 2,13,4,1,12,4,1, 0, 0, 0 }, /*  2ways I, 2ways D  */ \
+ 	{ "AU1000",	0x00302,    0x01,       0,	EXC32, MMU32,  32, 1,	32, 2,14,5,2,14,5,2, 0, 0, 0 }, /*  TODO: this is just bogus  */ \