diff options
author | thorpej <thorpej@pkgsrc.org> | 2019-07-03 14:38:13 +0000 |
---|---|---|
committer | thorpej <thorpej@pkgsrc.org> | 2019-07-03 14:38:13 +0000 |
commit | 222108e7d8b3361d098478d24e20682c8458d053 (patch) | |
tree | 845a70a1d0573bc16b625d15efa38bbefd573615 /emulators | |
parent | f079caca73ad24b00f5ad2510a1163ab681d521f (diff) | |
download | pkgsrc-222108e7d8b3361d098478d24e20682c8458d053.tar.gz |
Fix building on NetBSD/arm by extracting the FSR from siginfo_t::si_trap
rathar than an mcontext field that NetBSD/arm doesn't have.
Diffstat (limited to 'emulators')
-rw-r--r-- | emulators/qemu/distinfo | 3 | ||||
-rw-r--r-- | emulators/qemu/patches/patch-accel_tcg_user-exec.c | 42 |
2 files changed, 44 insertions, 1 deletions
diff --git a/emulators/qemu/distinfo b/emulators/qemu/distinfo index 43f56c137fc..7eb165dc40c 100644 --- a/emulators/qemu/distinfo +++ b/emulators/qemu/distinfo @@ -1,10 +1,11 @@ -$NetBSD: distinfo,v 1.149 2019/06/28 17:11:14 jperkin Exp $ +$NetBSD: distinfo,v 1.150 2019/07/03 14:38:13 thorpej Exp $ SHA1 (qemu-4.0.0.tar.xz) = 74cfb8f4724d9651fdd354560f2d291887b32cad RMD160 (qemu-4.0.0.tar.xz) = 58135f00c391823edce780d55a816f29dd73c34b SHA512 (qemu-4.0.0.tar.xz) = 952e94194ce9e64c15388c59035cb31fb9f761d30095c2fb9441012b609c18c9976285727b93bf37b95e15675802d73f8e1c4619ebecd23606675bb503646b13 Size (qemu-4.0.0.tar.xz) = 55628624 bytes SHA1 (patch-Makefile) = b3899fb8d0dd2f29bf3edd843836612e6e6c019c +SHA1 (patch-accel_tcg_user-exec.c) = 86ee62f6e5c8cd7942cf0aa9c9f64e4b0879ff33 SHA1 (patch-audio_audio.c) = 98a1de2fd48638886b5d16f6a61dc72910e98b41 SHA1 (patch-configure) = 14c09363622bcee113b7fda5bd3f031bd9ff6b90 SHA1 (patch-contrib_ivshmem-client_ivshmem-client.c) = 40c8751607cbf66a37e4c4e08f2664b864e2e984 diff --git a/emulators/qemu/patches/patch-accel_tcg_user-exec.c b/emulators/qemu/patches/patch-accel_tcg_user-exec.c new file mode 100644 index 00000000000..5a92f1274a2 --- /dev/null +++ b/emulators/qemu/patches/patch-accel_tcg_user-exec.c @@ -0,0 +1,42 @@ +$NetBSD: patch-accel_tcg_user-exec.c,v 1.1 2019/07/03 14:38:13 thorpej Exp $ + +Fix building on NetBSD/arm by extracting the FSR value from the +correct siginfo_t field. + +--- accel/tcg/user-exec.c.orig 2019-07-03 13:09:53.530028621 +0000 ++++ accel/tcg/user-exec.c 2019-07-03 13:22:13.179596536 +0000 +@@ -448,6 +448,7 @@ int cpu_signal_handler(int host_signum, + + #if defined(__NetBSD__) + #include <ucontext.h> ++#include <sys/siginfo.h> + #endif + + int cpu_signal_handler(int host_signum, void *pinfo, +@@ -456,6 +457,7 @@ int cpu_signal_handler(int host_signum, + siginfo_t *info = pinfo; + #if defined(__NetBSD__) + ucontext_t *uc = puc; ++ siginfo_t *si = pinfo; + #else + ucontext_t *uc = puc; + #endif +@@ -470,10 +472,18 @@ int cpu_signal_handler(int host_signum, + pc = uc->uc_mcontext.arm_pc; + #endif + ++#if defined(__NetBSD__) ++ /* siginfo_t::si_trap is the FSR value, in which bit 11 is WnR ++ * (assuming a v6 or later processor; on v5 we will always report ++ * this as a read). ++ */ ++ is_write = extract32(si->si_trap, 11, 1); ++#else + /* error_code is the FSR value, in which bit 11 is WnR (assuming a v6 or + * later processor; on v5 we will always report this as a read). + */ + is_write = extract32(uc->uc_mcontext.error_code, 11, 1); ++#endif + return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); + } + |