diff options
| author | pho <pho@pkgsrc.org> | 2014-01-10 07:21:16 +0000 |
|---|---|---|
| committer | pho <pho@pkgsrc.org> | 2014-01-10 07:21:16 +0000 |
| commit | fcbb1b0c659e7c9577f9965e9723d690255e6160 (patch) | |
| tree | 568169e8faaea22add9d52d9824431b0abcf0c1a /graphics/MesaLib | |
| parent | 0d124e88e0ad58b250424cdf9ba5e190fd971110 (diff) | |
| download | pkgsrc-fcbb1b0c659e7c9577f9965e9723d690255e6160.tar.gz | |
Fix build of MesaLib on PowerPC platforms without GCC >= 4.1 (like MacOS X 10.5).
Diffstat (limited to 'graphics/MesaLib')
| -rw-r--r-- | graphics/MesaLib/distinfo | 3 | ||||
| -rw-r--r-- | graphics/MesaLib/patches/patch-src_gallium_auxiliary_util_u__atomic.h | 107 |
2 files changed, 109 insertions, 1 deletions
diff --git a/graphics/MesaLib/distinfo b/graphics/MesaLib/distinfo index 7d4e3479a47..37fd397ba4c 100644 --- a/graphics/MesaLib/distinfo +++ b/graphics/MesaLib/distinfo @@ -1,4 +1,4 @@ -$NetBSD: distinfo,v 1.83 2013/12/12 14:44:10 is Exp $ +$NetBSD: distinfo,v 1.84 2014/01/10 07:21:16 pho Exp $ SHA1 (Mesa-7.11.2/MesaGLUT-7.11.2.tar.bz2) = 2e6e730204800a0748b301a5f58b86332699788b RMD160 (Mesa-7.11.2/MesaGLUT-7.11.2.tar.bz2) = bb2b140375aa13df79fcdb60a7ad0a63622dc531 @@ -10,6 +10,7 @@ SHA1 (patch-af) = da0bd412b81d4b826b6d9b4bb8d98ca1fe0006ba SHA1 (patch-bin_mklib) = 8c54bf5382541cab9d971b0e0e627035db1af468 SHA1 (patch-configure.ac) = 0e3f9a1f21ba3a50161312683e9a0ad36f9f3e61 SHA1 (patch-include_GL_gl.h) = a97ab309556c78d818d0b8bd867b5f2412c141b0 +SHA1 (patch-src_gallium_auxiliary_util_u__atomic.h) = 68ba9694aca506add2aa96a6892a7227481c2c11 SHA1 (patch-src_gallium_include_pipe_p__config.h) = 934e2505fe299e1a25da6def2f971fa1302840c0 SHA1 (patch-src_glsl_ir__constant__expression.cpp) = 281e281f51afed244b1a29b92942d572fc095124 SHA1 (patch-src_glu_sgi_glu.exports) = 66609d2ea59b02fc46b41311b0042fe4a2da517f diff --git a/graphics/MesaLib/patches/patch-src_gallium_auxiliary_util_u__atomic.h b/graphics/MesaLib/patches/patch-src_gallium_auxiliary_util_u__atomic.h new file mode 100644 index 00000000000..7d21f38cfb2 --- /dev/null +++ b/graphics/MesaLib/patches/patch-src_gallium_auxiliary_util_u__atomic.h @@ -0,0 +1,107 @@ +$NetBSD: patch-src_gallium_auxiliary_util_u__atomic.h,v 1.1 2014/01/10 07:21:16 pho Exp $ + +Add atomic operations for PowerPC platforms without GCC >= 4.1. This +should probably be sent to the upstream. + +--- src/gallium/auxiliary/util/u_atomic.h.orig 2014-01-10 06:56:00.000000000 +0000 ++++ src/gallium/auxiliary/util/u_atomic.h +@@ -31,6 +31,8 @@ + #define PIPE_ATOMIC_ASM_GCC_X86 + #elif (defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86_64)) + #define PIPE_ATOMIC_ASM_GCC_X86_64 ++#elif (defined(PIPE_CC_GCC) && defined(PIPE_ARCH_PPC)) ++#define PIPE_ATOMIC_ASM_GCC_PPC + #elif defined(PIPE_CC_GCC) && (PIPE_CC_GCC_VERSION >= 401) + #define PIPE_ATOMIC_GCC_INTRINSIC + #else +@@ -131,6 +133,90 @@ p_atomic_cmpxchg(int32_t *v, int32_t old + #endif + + ++#if defined(PIPE_ATOMIC_ASM_GCC_PPC) ++ ++#define PIPE_ATOMIC "GCC ppc assembly" ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#define p_atomic_set(_v, _i) (*(_v) = (_i)) ++#define p_atomic_read(_v) (*(_v)) ++ ++static INLINE boolean ++p_atomic_dec_zero(int32_t *v) ++{ ++ int32_t c; ++ ++ __asm__ __volatile__( ++ "1: lwarx %0,0,%1\n" ++ " addic %0,%0,-1\n" ++ " stwcx. %0,0,%1\n" ++ " bne- 1b" ++ : "=&r" (c) ++ : "r" (v) ++ : "cc", "memory"); ++ ++ return c != 0; ++} ++ ++static INLINE void ++p_atomic_inc(int32_t *v) ++{ ++ int32_t c; ++ ++ __asm__ __volatile__( ++ "1: lwarx %0,0,%1\n" ++ " addic %0,%0,1\n" ++ " stwcx. %0,0,%1\n" ++ " bne- 1b" ++ : "=&r" (c) ++ : "r" (v) ++ : "cc", "memory"); ++} ++ ++static INLINE void ++p_atomic_dec(int32_t *v) ++{ ++ int32_t c; ++ ++ __asm__ __volatile__( ++ "1: lwarx %0,0,%1\n" ++ " addic %0,%0,-1\n" ++ " stwcx. %0,0,%1\n" ++ " bne- 1b" ++ : "=&r" (c) ++ : "r" (v) ++ : "cc", "memory"); ++} ++ ++static INLINE int32_t ++p_atomic_cmpxchg(int32_t *v, int32_t old, int32_t _new) ++{ ++ int32_t oldval; ++ ++ __asm__ __volatile__( ++ "1: lwarx %0,0,%2\n" ++ " cmpw 0,%0,%3\n" ++ " bne- 2f\n" ++ " stwcx. %4,0,%2\n" ++ " bne- 1b\n" ++ "2:\n" ++ : "=&r" (oldval), "+m" (*v) ++ : "r" (v), "r" (old), "r" (_new) ++ : "cc", "memory"); ++ ++ return oldval; ++} ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* PIPE_ATOMIC_ASM_PPC */ ++ ++ + + /* Implementation using GCC-provided synchronization intrinsics + */ |