diff options
| author | apb <apb@pkgsrc.org> | 2012-09-27 10:28:14 +0000 |
|---|---|---|
| committer | apb <apb@pkgsrc.org> | 2012-09-27 10:28:14 +0000 |
| commit | 48df881cf3601fc826472b37d280a379b57ac502 (patch) | |
| tree | aed519e177c74f4dc06b417716f149469d730ff7 /multimedia | |
| parent | 6f3f3c42fbcd2dd50ad7f5dae7f52e0950849b5d (diff) | |
| download | pkgsrc-48df881cf3601fc826472b37d280a379b57ac502.tar.gz | |
In affine_1d_MMX(), move the initialisation of %mm3 and %mm4 registers
into a separate asm statement, to give the compiler more freedom
for register allocation. Fixes a problem with gcc-4.5.4 on NetBSD/i386
in which gcc complained:
eq2.c: In function 'affine_1d_MMX':
eq2.c:128:5: error: can't find a register in class 'GENERAL_REGS' while reloading 'asm'
eq2.c:128:5: error: 'asm' operand has impossible constraints
Diffstat (limited to 'multimedia')
| -rw-r--r-- | multimedia/xine-lib/distinfo | 4 | ||||
| -rw-r--r-- | multimedia/xine-lib/patches/patch-src-post-planar-eq2.c | 40 |
2 files changed, 39 insertions, 5 deletions
diff --git a/multimedia/xine-lib/distinfo b/multimedia/xine-lib/distinfo index be04b3e80e8..92a42bb5b91 100644 --- a/multimedia/xine-lib/distinfo +++ b/multimedia/xine-lib/distinfo @@ -1,4 +1,4 @@ -$NetBSD: distinfo,v 1.87 2012/09/20 15:33:40 jperkin Exp $ +$NetBSD: distinfo,v 1.88 2012/09/27 10:28:14 apb Exp $ SHA1 (xine-lib-1.2.2.tar.xz) = a349cbb0b72256bb262377796a022dcf63829b4c RMD160 (xine-lib-1.2.2.tar.xz) = 3f11df3fa8a8946bdcc9cdecd6952dc76b834d14 @@ -32,7 +32,7 @@ SHA1 (patch-src-post-mosaico-switch.c) = 11dd1ec387c298693fc82feba1f16a316648e58 SHA1 (patch-src-post-planar-boxblur.c) = 1bcaec011aaf581394ad42c9ff324ec0a3d28ecb SHA1 (patch-src-post-planar-denoise3d.c) = 05059a1864278f749a5796661075db522c2e202c SHA1 (patch-src-post-planar-eq.c) = 85f6f72bc5fbc52f0ae48751b20fb100d5d6f27b -SHA1 (patch-src-post-planar-eq2.c) = 7d2bab3cfc0d7d03c84e48985c2c55ebf1582126 +SHA1 (patch-src-post-planar-eq2.c) = 2230c493fb6e586d13d4c7c0660113eb22a6bf3b SHA1 (patch-src-post-planar-expand.c) = 7c532feeae4078f40d6f9a28dfa207e5cbee60a1 SHA1 (patch-src-post-planar-noise.c) = b3baf82e150ca9a27e73753398c18839066748f1 SHA1 (patch-src-post-planar-pp.c) = 147dc05a09ff851af99c488112c6a77926ae5afb diff --git a/multimedia/xine-lib/patches/patch-src-post-planar-eq2.c b/multimedia/xine-lib/patches/patch-src-post-planar-eq2.c index dfe50106e23..5294baa8b22 100644 --- a/multimedia/xine-lib/patches/patch-src-post-planar-eq2.c +++ b/multimedia/xine-lib/patches/patch-src-post-planar-eq2.c @@ -1,8 +1,42 @@ -$NetBSD: patch-src-post-planar-eq2.c,v 1.1 2011/09/04 14:34:52 joerg Exp $ +$NetBSD: patch-src-post-planar-eq2.c,v 1.2 2012/09/27 10:28:14 apb Exp $ ---- src/post/planar/eq2.c.orig 2011-08-30 13:13:49.000000000 +0000 +In affine_1d_MMX(), move the initialisation of %mm3 and %mm4 registers +into a separate asm statement, to give the compiler more freedom +for register allocation. Fixes a problem with gcc-4.5.4 on NetBSD/i386 +in which gcc complained: + +eq2.c: In function 'affine_1d_MMX': +eq2.c:128:5: error: can't find a register in class 'GENERAL_REGS' while reloading 'asm' +eq2.c:128:5: error: 'asm' operand has impossible constraints + +--- src/post/planar/eq2.c.orig 2012-02-05 19:17:02.000000000 +0000 +++ src/post/planar/eq2.c -@@ -288,19 +288,26 @@ typedef struct eq2_parameters_s { +@@ -126,8 +126,13 @@ void affine_1d_MMX (eq2_param_t *par, un + + while (h-- > 0) { + asm volatile ( +- "movq (%5), %%mm3 \n\t" +- "movq (%6), %%mm4 \n\t" ++ "movq (%0), %%mm3 \n\t" ++ "movq (%1), %%mm4 \n\t" ++ : ++ : "r" (brvec), "r" (contvec) ++ : ++ ); ++ asm volatile ( + "pxor %%mm0, %%mm0 \n\t" + "movl %4, %%eax\n\t" + ASMALIGN(4) +@@ -149,7 +154,7 @@ void affine_1d_MMX (eq2_param_t *par, un + "decl %%eax \n\t" + "jnz 1b \n\t" + : "=r" (src), "=r" (dst) +- : "0" (src), "1" (dst), "r" (w >> 3), "r" (brvec), "r" (contvec) ++ : "0" (src), "1" (dst), "r" (w >> 3) + : "%eax" + ); + +@@ -288,19 +293,26 @@ typedef struct eq2_parameters_s { * description of params struct */ START_PARAM_DESCR( eq2_parameters_t ) |