summaryrefslogtreecommitdiff
path: root/cad/verilog-current/Makefile
diff options
context:
space:
mode:
Diffstat (limited to 'cad/verilog-current/Makefile')
-rw-r--r--cad/verilog-current/Makefile4
1 files changed, 2 insertions, 2 deletions
diff --git a/cad/verilog-current/Makefile b/cad/verilog-current/Makefile
index 77b4db69518..b00f04c20bc 100644
--- a/cad/verilog-current/Makefile
+++ b/cad/verilog-current/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.33 2003/07/14 09:51:48 drochner Exp $
+# $NetBSD: Makefile,v 1.34 2003/07/17 21:25:27 grant Exp $
#
DISTNAME= verilog-${SNAPDATE}
@@ -6,7 +6,7 @@ PKGNAME= verilog-current-${SNAPDATE}
CATEGORIES= cad
MASTER_SITES= ftp://icarus.com/pub/eda/verilog/snapshots/
-MAINTAINER= dmcmahill@netbsd.org
+MAINTAINER= dmcmahill@NetBSD.org
HOMEPAGE= http://icarus.com/eda/verilog/index.html
COMMENT= Verilog simulation and synthesis tool (development snapshot version)