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-rw-r--r--cad/verilog/Makefile5
1 files changed, 4 insertions, 1 deletions
diff --git a/cad/verilog/Makefile b/cad/verilog/Makefile
index cfad53170ce..7899add7d1d 100644
--- a/cad/verilog/Makefile
+++ b/cad/verilog/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.32 2009/05/20 00:58:07 wiz Exp $
+# $NetBSD: Makefile,v 1.33 2010/02/01 02:19:35 joerg Exp $
#
DISTNAME= verilog-0.8.7
@@ -11,6 +11,7 @@ HOMEPAGE= http://icarus.com/eda/verilog/index.html
COMMENT= Verilog simulation and synthesis tool (stable release version)
PKG_INSTALLATION_TYPES= overwrite pkgviews
+PKG_DESTDIR_SUPPORT= user-destdir
CONFLICTS+= verilog-current-[0-9]*
@@ -21,6 +22,8 @@ USE_TOOLS+= gmake bison lex
CONFIGURE_ARGS+= --without-ipal
TEST_TARGET= check
+INSTALL_MAKE_FLAGS+= prefix=${DESTDIR}${PREFIX} mandir=${DESTDIR}${PREFIX}/${PKGMANDIR}
+
.include "../../devel/zlib/buildlink3.mk"
.include "../../archivers/bzip2/buildlink3.mk"
.include "../../devel/gperf/buildlink3.mk"