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-rw-r--r--cad/verilog/Makefile4
1 files changed, 1 insertions, 3 deletions
diff --git a/cad/verilog/Makefile b/cad/verilog/Makefile
index f8910c691d9..2de40094c00 100644
--- a/cad/verilog/Makefile
+++ b/cad/verilog/Makefile
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile,v 1.39 2014/06/28 21:05:11 dholland Exp $
+# $NetBSD: Makefile,v 1.40 2014/10/09 14:06:02 wiz Exp $
#
DISTNAME= verilog-0.9.7
@@ -10,8 +10,6 @@ HOMEPAGE= http://iverilog.icarus.com/
COMMENT= Verilog simulation and synthesis tool (stable release version)
LICENSE= gnu-gpl-v2
-PKG_INSTALLATION_TYPES= overwrite pkgviews
-
CONFLICTS+= verilog-current-[0-9]*
USE_LANGUAGES= c c++