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-rw-r--r--cad/verilog/PLIST70
1 files changed, 35 insertions, 35 deletions
diff --git a/cad/verilog/PLIST b/cad/verilog/PLIST
index 1327e91cff3..6207a76cc5e 100644
--- a/cad/verilog/PLIST
+++ b/cad/verilog/PLIST
@@ -1,35 +1,35 @@
-@comment $NetBSD: PLIST,v 1.6 2006/05/21 08:00:50 rillig Exp $
-bin/iverilog
-bin/iverilog-vpi
-bin/vvp
-include/_pli_types.h
-include/acc_user.h
-include/ivl_target.h
-include/veriuser.h
-include/vpi_user.h
-lib/ivl/cadpli.vpl
-lib/ivl/edif-s.conf
-lib/ivl/edif.conf
-lib/ivl/edif.tgt
-lib/ivl/fpga-s.conf
-lib/ivl/fpga.conf
-lib/ivl/fpga.tgt
-lib/ivl/ivl
-lib/ivl/ivlpp
-lib/ivl/null-s.conf
-lib/ivl/null.conf
-lib/ivl/null.tgt
-lib/ivl/system.sft
-lib/ivl/system.vpi
-lib/ivl/vvp-s.conf
-lib/ivl/vvp.conf
-lib/ivl/vvp.tgt
-lib/ivl/xnf-s.conf
-lib/ivl/xnf.conf
-lib/libveriuser.a
-lib/libvpi.a
-man/man1/iverilog-fpga.1
-man/man1/iverilog-vpi.1
-man/man1/iverilog.1
-man/man1/vvp.1
-@dirrm lib/ivl
+@comment $NetBSD: PLIST,v 1.7 2009/03/11 02:08:08 dmcmahill Exp $
+bin/iverilog-0.8
+bin/iverilog-vpi-0.8
+bin/vvp-0.8
+include/iverilog-0.8/_pli_types.h
+include/iverilog-0.8/acc_user.h
+include/iverilog-0.8/ivl_target.h
+include/iverilog-0.8/veriuser.h
+include/iverilog-0.8/vpi_user.h
+lib/ivl-0.8/cadpli.vpl
+lib/ivl-0.8/edif-s.conf
+lib/ivl-0.8/edif.conf
+lib/ivl-0.8/edif.tgt
+lib/ivl-0.8/fpga-s.conf
+lib/ivl-0.8/fpga.conf
+lib/ivl-0.8/fpga.tgt
+lib/ivl-0.8/ivl
+lib/ivl-0.8/ivlpp
+lib/ivl-0.8/null-s.conf
+lib/ivl-0.8/null.conf
+lib/ivl-0.8/null.tgt
+lib/ivl-0.8/system.sft
+lib/ivl-0.8/system.vpi
+lib/ivl-0.8/vvp-s.conf
+lib/ivl-0.8/vvp.conf
+lib/ivl-0.8/vvp.tgt
+lib/ivl-0.8/xnf-s.conf
+lib/ivl-0.8/xnf.conf
+lib/libveriuser-0.8.a
+lib/libvpi-0.8.a
+man/man1/iverilog-fpga-0.8.1
+man/man1/iverilog-vpi-0.8.1
+man/man1/iverilog-0.8.1
+man/man1/vvp-0.8.1
+@dirrm lib/ivl-0.8